diff --git a/toolchain/gcc/patches-12.x/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches-12.x/800-arm_v5te_no_ldrd_strd.patch
new file mode 100644
index 00000000000..e83cb1bebbb
--- /dev/null
+++ b/toolchain/gcc/patches-12.x/800-arm_v5te_no_ldrd_strd.patch
@@ -0,0 +1,11 @@
+--- a/gcc/config/arm/arm.h
++++ b/gcc/config/arm/arm.h
+@@ -165,7 +165,7 @@ emission of floating point pcs attribute
+ /* Thumb-1 only.  */
+ #define TARGET_THUMB1_ONLY		(TARGET_THUMB1 && !arm_arch_notm)
+ 
+-#define TARGET_LDRD			(arm_arch5te && ARM_DOUBLEWORD_ALIGN \
++#define TARGET_LDRD			(arm_arch6 && ARM_DOUBLEWORD_ALIGN \
+                                          && !TARGET_THUMB1)
+ 
+ #define TARGET_CRC32			(arm_arch_crc)
diff --git a/toolchain/gcc/patches-13.x/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches-13.x/800-arm_v5te_no_ldrd_strd.patch
new file mode 100644
index 00000000000..e83cb1bebbb
--- /dev/null
+++ b/toolchain/gcc/patches-13.x/800-arm_v5te_no_ldrd_strd.patch
@@ -0,0 +1,11 @@
+--- a/gcc/config/arm/arm.h
++++ b/gcc/config/arm/arm.h
+@@ -165,7 +165,7 @@ emission of floating point pcs attribute
+ /* Thumb-1 only.  */
+ #define TARGET_THUMB1_ONLY		(TARGET_THUMB1 && !arm_arch_notm)
+ 
+-#define TARGET_LDRD			(arm_arch5te && ARM_DOUBLEWORD_ALIGN \
++#define TARGET_LDRD			(arm_arch6 && ARM_DOUBLEWORD_ALIGN \
+                                          && !TARGET_THUMB1)
+ 
+ #define TARGET_CRC32			(arm_arch_crc)
diff --git a/toolchain/gcc/patches-14.x/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches-14.x/800-arm_v5te_no_ldrd_strd.patch
new file mode 100644
index 00000000000..e83cb1bebbb
--- /dev/null
+++ b/toolchain/gcc/patches-14.x/800-arm_v5te_no_ldrd_strd.patch
@@ -0,0 +1,11 @@
+--- a/gcc/config/arm/arm.h
++++ b/gcc/config/arm/arm.h
+@@ -165,7 +165,7 @@ emission of floating point pcs attribute
+ /* Thumb-1 only.  */
+ #define TARGET_THUMB1_ONLY		(TARGET_THUMB1 && !arm_arch_notm)
+ 
+-#define TARGET_LDRD			(arm_arch5te && ARM_DOUBLEWORD_ALIGN \
++#define TARGET_LDRD			(arm_arch6 && ARM_DOUBLEWORD_ALIGN \
+                                          && !TARGET_THUMB1)
+ 
+ #define TARGET_CRC32			(arm_arch_crc)
diff --git a/toolchain/gcc/patches-15.x/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches-15.x/800-arm_v5te_no_ldrd_strd.patch
new file mode 100644
index 00000000000..e83cb1bebbb
--- /dev/null
+++ b/toolchain/gcc/patches-15.x/800-arm_v5te_no_ldrd_strd.patch
@@ -0,0 +1,11 @@
+--- a/gcc/config/arm/arm.h
++++ b/gcc/config/arm/arm.h
+@@ -165,7 +165,7 @@ emission of floating point pcs attribute
+ /* Thumb-1 only.  */
+ #define TARGET_THUMB1_ONLY		(TARGET_THUMB1 && !arm_arch_notm)
+ 
+-#define TARGET_LDRD			(arm_arch5te && ARM_DOUBLEWORD_ALIGN \
++#define TARGET_LDRD			(arm_arch6 && ARM_DOUBLEWORD_ALIGN \
+                                          && !TARGET_THUMB1)
+ 
+ #define TARGET_CRC32			(arm_arch_crc)