qualcommax: ipq50xx: backport upstreamed patches for IPQ5018 tsens support
Use upstreamed v6.16 patches for IPQ5018 tsens support. Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/18884 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
parent
37d434238b
commit
b5f0cba751
11 changed files with 568 additions and 225 deletions
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@ -0,0 +1,297 @@
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From ff0cf0ab9073727a67f9902dba77a758654ae895 Mon Sep 17 00:00:00 2001
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From: Praveenkumar I <quic_ipkumar@quicinc.com>
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Date: Mon, 10 Feb 2025 17:34:32 +0530
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Subject: [PATCH] thermal/drivers/tsens: Add TSENS enable and calibration
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support for V2
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SoCs without RPM need to enable sensors and calibrate them from the kernel.
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The IPQ5332 and IPQ5424 use the tsens v2.3.3 IP and do not have RPM.
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Therefore, add a new calibration function for V2, as the tsens.c calib
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function only supports V1. Also add new feature_config, ops and data for
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IPQ5332, IPQ5424.
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Although the TSENS IP supports 16 sensors, not all are used. The hw_id
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is used to enable the relevant sensors.
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
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Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
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Link: https://lore.kernel.org/r/20250210120436.821684-3-quic_mmanikan@quicinc.com
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Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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---
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drivers/thermal/qcom/tsens-v2.c | 178 ++++++++++++++++++++++++++++++++
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drivers/thermal/qcom/tsens.c | 8 +-
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drivers/thermal/qcom/tsens.h | 3 +
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3 files changed, 188 insertions(+), 1 deletion(-)
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--- a/drivers/thermal/qcom/tsens-v2.c
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+++ b/drivers/thermal/qcom/tsens-v2.c
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@@ -4,13 +4,32 @@
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* Copyright (c) 2018, Linaro Limited
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*/
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+#include <linux/bitfield.h>
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#include <linux/bitops.h>
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+#include <linux/nvmem-consumer.h>
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#include <linux/regmap.h>
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#include "tsens.h"
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/* ----- SROT ------ */
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#define SROT_HW_VER_OFF 0x0000
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#define SROT_CTRL_OFF 0x0004
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+#define SROT_MEASURE_PERIOD 0x0008
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+#define SROT_Sn_CONVERSION 0x0060
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+#define V2_SHIFT_DEFAULT 0x0003
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+#define V2_SLOPE_DEFAULT 0x0cd0
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+#define V2_CZERO_DEFAULT 0x016a
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+#define ONE_PT_SLOPE 0x0cd0
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+#define TWO_PT_SHIFTED_GAIN 921600
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+#define ONE_PT_CZERO_CONST 94
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+#define SW_RST_DEASSERT 0x0
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+#define SW_RST_ASSERT 0x1
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+#define MEASURE_PERIOD_2mSEC 0x1
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+#define RESULT_FORMAT_TEMP 0x1
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+#define TSENS_ENABLE 0x1
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+#define SENSOR_CONVERSION(n) (((n) * 4) + SROT_Sn_CONVERSION)
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+#define CONVERSION_SHIFT_MASK GENMASK(24, 23)
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+#define CONVERSION_SLOPE_MASK GENMASK(22, 10)
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+#define CONVERSION_CZERO_MASK GENMASK(9, 0)
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/* ----- TM ------ */
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#define TM_INT_EN_OFF 0x0004
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@@ -50,6 +69,17 @@ static struct tsens_features ipq8074_fea
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.trip_max_temp = 204000,
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};
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+static struct tsens_features ipq5332_feat = {
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+ .ver_major = VER_2_X_NO_RPM,
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+ .crit_int = 1,
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+ .combo_int = 1,
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+ .adc = 0,
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+ .srot_split = 1,
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+ .max_sensors = 16,
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+ .trip_min_temp = 0,
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+ .trip_max_temp = 204000,
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+};
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+
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static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
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/* ----- SROT ------ */
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/* VERSION */
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@@ -59,6 +89,10 @@ static const struct reg_field tsens_v2_r
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/* CTRL_OFF */
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[TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
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[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
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+ [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 18),
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+ [CODE_OR_TEMP] = REG_FIELD(SROT_CTRL_OFF, 21, 21),
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+
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+ [MAIN_MEASURE_PERIOD] = REG_FIELD(SROT_MEASURE_PERIOD, 0, 7),
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/* ----- TM ------ */
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/* INTERRUPT ENABLE */
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@@ -104,6 +138,128 @@ static const struct reg_field tsens_v2_r
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[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
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};
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+static int tsens_v2_calibrate_sensor(struct device *dev, struct tsens_sensor *sensor,
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+ struct regmap *map, u32 mode, u32 base0, u32 base1)
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+{
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+ u32 shift = V2_SHIFT_DEFAULT;
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+ u32 slope = V2_SLOPE_DEFAULT;
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+ u32 czero = V2_CZERO_DEFAULT;
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+ char name[20];
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+ u32 val;
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+ int ret;
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+
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+ /* Read offset value */
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+ ret = snprintf(name, sizeof(name), "tsens_sens%d_off", sensor->hw_id);
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+ if (ret < 0)
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+ return ret;
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+
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+ ret = nvmem_cell_read_variable_le_u32(dev, name, &sensor->offset);
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+ if (ret)
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+ return ret;
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+
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+ /* Based on calib mode, program SHIFT, SLOPE and CZERO */
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+ switch (mode) {
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+ case TWO_PT_CALIB:
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+ slope = (TWO_PT_SHIFTED_GAIN / (base1 - base0));
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+
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+ czero = (base0 + sensor->offset - ((base1 - base0) / 3));
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+
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+ break;
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+ case ONE_PT_CALIB2:
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+ czero = base0 + sensor->offset - ONE_PT_CZERO_CONST;
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+
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+ slope = ONE_PT_SLOPE;
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+
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+ break;
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+ default:
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+ dev_dbg(dev, "calibrationless mode\n");
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+ }
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+
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+ val = FIELD_PREP(CONVERSION_SHIFT_MASK, shift) |
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+ FIELD_PREP(CONVERSION_SLOPE_MASK, slope) |
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+ FIELD_PREP(CONVERSION_CZERO_MASK, czero);
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+
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+ regmap_write(map, SENSOR_CONVERSION(sensor->hw_id), val);
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+
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+ return 0;
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+}
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+
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+static int tsens_v2_calibration(struct tsens_priv *priv)
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+{
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+ struct device *dev = priv->dev;
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+ u32 mode, base0, base1;
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+ int i, ret;
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+
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+ if (priv->num_sensors > MAX_SENSORS)
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+ return -EINVAL;
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+
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+ ret = nvmem_cell_read_variable_le_u32(priv->dev, "mode", &mode);
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+ if (ret == -ENOENT)
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+ dev_warn(priv->dev, "Calibration data not present in DT\n");
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+ if (ret < 0)
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+ return ret;
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+
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+ dev_dbg(priv->dev, "calibration mode is %d\n", mode);
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+
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+ ret = nvmem_cell_read_variable_le_u32(priv->dev, "base0", &base0);
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+ if (ret < 0)
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+ return ret;
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+
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+ ret = nvmem_cell_read_variable_le_u32(priv->dev, "base1", &base1);
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+ if (ret < 0)
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+ return ret;
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+
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+ /* Calibrate each sensor */
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+ for (i = 0; i < priv->num_sensors; i++) {
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+ ret = tsens_v2_calibrate_sensor(dev, &priv->sensor[i], priv->srot_map,
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+ mode, base0, base1);
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+ if (ret < 0)
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+ return ret;
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+ }
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+
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+ return 0;
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+}
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+
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+static int __init init_tsens_v2_no_rpm(struct tsens_priv *priv)
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+{
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+ struct device *dev = priv->dev;
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+ int i, ret;
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+ u32 val = 0;
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+
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+ ret = init_common(priv);
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+ if (ret < 0)
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+ return ret;
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+
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+ priv->rf[CODE_OR_TEMP] = devm_regmap_field_alloc(dev, priv->srot_map,
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+ priv->fields[CODE_OR_TEMP]);
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+ if (IS_ERR(priv->rf[CODE_OR_TEMP]))
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+ return PTR_ERR(priv->rf[CODE_OR_TEMP]);
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+
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+ priv->rf[MAIN_MEASURE_PERIOD] = devm_regmap_field_alloc(dev, priv->srot_map,
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+ priv->fields[MAIN_MEASURE_PERIOD]);
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+ if (IS_ERR(priv->rf[MAIN_MEASURE_PERIOD]))
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+ return PTR_ERR(priv->rf[MAIN_MEASURE_PERIOD]);
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+
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+ regmap_field_write(priv->rf[TSENS_SW_RST], SW_RST_ASSERT);
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+
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+ regmap_field_write(priv->rf[MAIN_MEASURE_PERIOD], MEASURE_PERIOD_2mSEC);
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+
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+ /* Enable available sensors */
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+ for (i = 0; i < priv->num_sensors; i++)
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+ val |= 1 << priv->sensor[i].hw_id;
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+
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+ regmap_field_write(priv->rf[SENSOR_EN], val);
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+
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+ /* Select temperature format, unit is deci-Celsius */
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+ regmap_field_write(priv->rf[CODE_OR_TEMP], RESULT_FORMAT_TEMP);
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+
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+ regmap_field_write(priv->rf[TSENS_SW_RST], SW_RST_DEASSERT);
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+
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+ regmap_field_write(priv->rf[TSENS_EN], TSENS_ENABLE);
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+
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+ return 0;
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+}
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+
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static const struct tsens_ops ops_generic_v2 = {
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.init = init_common,
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.get_temp = get_temp_tsens_valid,
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@@ -122,6 +278,28 @@ struct tsens_plat_data data_ipq8074 = {
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.fields = tsens_v2_regfields,
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};
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+static const struct tsens_ops ops_ipq5332 = {
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+ .init = init_tsens_v2_no_rpm,
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+ .get_temp = get_temp_tsens_valid,
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+ .calibrate = tsens_v2_calibration,
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+};
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+
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+const struct tsens_plat_data data_ipq5332 = {
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+ .num_sensors = 5,
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+ .ops = &ops_ipq5332,
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+ .hw_ids = (unsigned int []){11, 12, 13, 14, 15},
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+ .feat = &ipq5332_feat,
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+ .fields = tsens_v2_regfields,
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+};
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+
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+const struct tsens_plat_data data_ipq5424 = {
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+ .num_sensors = 7,
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+ .ops = &ops_ipq5332,
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+ .hw_ids = (unsigned int []){9, 10, 11, 12, 13, 14, 15},
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+ .feat = &ipq5332_feat,
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+ .fields = tsens_v2_regfields,
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+};
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+
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/* Kept around for backward compatibility with old msm8996.dtsi */
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struct tsens_plat_data data_8996 = {
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.num_sensors = 13,
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--- a/drivers/thermal/qcom/tsens.c
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+++ b/drivers/thermal/qcom/tsens.c
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@@ -975,7 +975,7 @@ int __init init_common(struct tsens_priv
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ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
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if (ret)
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goto err_put_device;
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- if (!enabled) {
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+ if (!enabled && (tsens_version(priv) != VER_2_X_NO_RPM)) {
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dev_err(dev, "%s: device not enabled\n", __func__);
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ret = -ENODEV;
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goto err_put_device;
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@@ -1102,6 +1102,12 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, t
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static const struct of_device_id tsens_table[] = {
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{
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+ .compatible = "qcom,ipq5332-tsens",
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+ .data = &data_ipq5332,
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+ }, {
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+ .compatible = "qcom,ipq5424-tsens",
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+ .data = &data_ipq5424,
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+ }, {
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.compatible = "qcom,ipq8064-tsens",
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.data = &data_8960,
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}, {
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--- a/drivers/thermal/qcom/tsens.h
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+++ b/drivers/thermal/qcom/tsens.h
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@@ -35,6 +35,7 @@ enum tsens_ver {
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VER_0_1,
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VER_1_X,
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VER_2_X,
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+ VER_2_X_NO_RPM,
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};
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enum tsens_irq_type {
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@@ -168,6 +169,7 @@ enum regfield_ids {
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TSENS_SW_RST,
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SENSOR_EN,
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CODE_OR_TEMP,
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+ MAIN_MEASURE_PERIOD,
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/* ----- TM ------ */
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/* TRDY */
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@@ -651,5 +653,6 @@ extern struct tsens_plat_data data_tsens
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/* TSENS v2 targets */
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extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2;
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+extern const struct tsens_plat_data data_ipq5332, data_ipq5424;
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#endif /* __QCOM_TSENS_H__ */
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@ -0,0 +1,69 @@
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From e3f90f167a49902cda2408f7e91cca0dcfd5040a Mon Sep 17 00:00:00 2001
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From: George Moussalem <george.moussalem@outlook.com>
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Date: Fri, 28 Feb 2025 09:11:36 +0400
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Subject: [PATCH] thermal/drivers/qcom/tsens: Update conditions to strictly
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evaluate for IP v2+
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TSENS v2.0+ leverage features not available to prior versions such as
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updated interrupts init routine, masked interrupts, and watchdog.
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Currently, the checks in place evaluate whether the IP version is greater
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than v1 which invalidates when updates to v1 or v1 minor versions are
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implemented. As such, update the conditional statements to strictly
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evaluate whether the version is greater than or equal to v2 (inclusive).
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Reviewed-by: Amit Kucheria <amitk@kernel.org>
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Link: https://lore.kernel.org/r/DS7PR19MB8883434CAA053648E22AA8AC9DCC2@DS7PR19MB8883.namprd19.prod.outlook.com
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Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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---
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drivers/thermal/qcom/tsens.c | 10 +++++-----
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1 file changed, 5 insertions(+), 5 deletions(-)
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--- a/drivers/thermal/qcom/tsens.c
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+++ b/drivers/thermal/qcom/tsens.c
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@@ -447,7 +447,7 @@ static void tsens_set_interrupt(struct t
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dev_dbg(priv->dev, "[%u] %s: %s -> %s\n", hw_id, __func__,
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irq_type ? ((irq_type == 1) ? "UP" : "CRITICAL") : "LOW",
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enable ? "en" : "dis");
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- if (tsens_version(priv) > VER_1_X)
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+ if (tsens_version(priv) >= VER_2_X)
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tsens_set_interrupt_v2(priv, hw_id, irq_type, enable);
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else
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tsens_set_interrupt_v1(priv, hw_id, irq_type, enable);
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@@ -499,7 +499,7 @@ static int tsens_read_irq_state(struct t
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ret = regmap_field_read(priv->rf[LOW_INT_CLEAR_0 + hw_id], &d->low_irq_clear);
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if (ret)
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return ret;
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- if (tsens_version(priv) > VER_1_X) {
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+ if (tsens_version(priv) >= VER_2_X) {
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ret = regmap_field_read(priv->rf[UP_INT_MASK_0 + hw_id], &d->up_irq_mask);
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if (ret)
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return ret;
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@@ -543,7 +543,7 @@ static int tsens_read_irq_state(struct t
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static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver)
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{
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- if (ver > VER_1_X)
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+ if (ver >= VER_2_X)
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return mask & (1 << hw_id);
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/* v1, v0.1 don't have a irq mask register */
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@@ -733,7 +733,7 @@ static int tsens_set_trips(struct therma
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static int tsens_enable_irq(struct tsens_priv *priv)
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{
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int ret;
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- int val = tsens_version(priv) > VER_1_X ? 7 : 1;
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+ int val = tsens_version(priv) >= VER_2_X ? 7 : 1;
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ret = regmap_field_write(priv->rf[INT_EN], val);
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if (ret < 0)
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@@ -1040,7 +1040,7 @@ int __init init_common(struct tsens_priv
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}
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}
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- if (tsens_version(priv) > VER_1_X && ver_minor > 2) {
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+ if (tsens_version(priv) >= VER_2_X && ver_minor > 2) {
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/* Watchdog is present only on v2.3+ */
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priv->feat->has_watchdog = 1;
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for (i = WDOG_BARK_STATUS; i <= CC_MON_MASK; i++) {
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@ -0,0 +1,121 @@
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From 19f9b02ebc8fe3babefbe76a37c74c5f4c174de1 Mon Sep 17 00:00:00 2001
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From: George Moussalem <george.moussalem@outlook.com>
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Date: Fri, 28 Feb 2025 09:11:37 +0400
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Subject: [PATCH] thermal/drivers/qcom/tsens: Add support for tsens v1 without
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RPM
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Adding generic support for SoCs with tsens v1.0 IP with no RPM.
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Due to lack of RPM, tsens has to be reset and enabled in the driver
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init. SoCs can have support for more sensors than those which will
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actually be enabled. As such, init will only enable those explicitly
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added to the hw_ids array.
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Co-developed-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
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Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
|
||||
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
||||
Link: https://lore.kernel.org/r/DS7PR19MB8883C5D7974C7735E23923769DCC2@DS7PR19MB8883.namprd19.prod.outlook.com
|
||||
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
|
||||
---
|
||||
drivers/thermal/qcom/tsens-v1.c | 48 +++++++++++++++++++++++++++++++++
|
||||
drivers/thermal/qcom/tsens.c | 14 +++++++---
|
||||
drivers/thermal/qcom/tsens.h | 1 +
|
||||
3 files changed, 59 insertions(+), 4 deletions(-)
|
||||
|
||||
--- a/drivers/thermal/qcom/tsens-v1.c
|
||||
+++ b/drivers/thermal/qcom/tsens-v1.c
|
||||
@@ -79,6 +79,17 @@ static struct tsens_features tsens_v1_fe
|
||||
.trip_max_temp = 120000,
|
||||
};
|
||||
|
||||
+static struct tsens_features tsens_v1_no_rpm_feat = {
|
||||
+ .ver_major = VER_1_X_NO_RPM,
|
||||
+ .crit_int = 0,
|
||||
+ .combo_int = 0,
|
||||
+ .adc = 1,
|
||||
+ .srot_split = 1,
|
||||
+ .max_sensors = 11,
|
||||
+ .trip_min_temp = -40000,
|
||||
+ .trip_max_temp = 120000,
|
||||
+};
|
||||
+
|
||||
static const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] = {
|
||||
/* ----- SROT ------ */
|
||||
/* VERSION */
|
||||
@@ -150,6 +161,43 @@ static int __init init_8956(struct tsens
|
||||
return init_common(priv);
|
||||
}
|
||||
|
||||
+static int __init init_tsens_v1_no_rpm(struct tsens_priv *priv)
|
||||
+{
|
||||
+ int i, ret;
|
||||
+ u32 mask = 0;
|
||||
+
|
||||
+ ret = init_common(priv);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(priv->dev, "Init common failed %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = regmap_field_write(priv->rf[TSENS_SW_RST], 1);
|
||||
+ if (ret) {
|
||||
+ dev_err(priv->dev, "Reset failed\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ for (i = 0; i < priv->num_sensors; i++)
|
||||
+ mask |= BIT(priv->sensor[i].hw_id);
|
||||
+
|
||||
+ ret = regmap_field_update_bits(priv->rf[SENSOR_EN], mask, mask);
|
||||
+ if (ret) {
|
||||
+ dev_err(priv->dev, "Sensor Enable failed\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = regmap_field_write(priv->rf[TSENS_EN], 1);
|
||||
+ if (ret) {
|
||||
+ dev_err(priv->dev, "Enable failed\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = regmap_field_write(priv->rf[TSENS_SW_RST], 0);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
static const struct tsens_ops ops_generic_v1 = {
|
||||
.init = init_common,
|
||||
.calibrate = calibrate_v1,
|
||||
--- a/drivers/thermal/qcom/tsens.c
|
||||
+++ b/drivers/thermal/qcom/tsens.c
|
||||
@@ -975,10 +975,16 @@ int __init init_common(struct tsens_priv
|
||||
ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
|
||||
if (ret)
|
||||
goto err_put_device;
|
||||
- if (!enabled && (tsens_version(priv) != VER_2_X_NO_RPM)) {
|
||||
- dev_err(dev, "%s: device not enabled\n", __func__);
|
||||
- ret = -ENODEV;
|
||||
- goto err_put_device;
|
||||
+ if (!enabled) {
|
||||
+ switch (tsens_version(priv)) {
|
||||
+ case VER_1_X_NO_RPM:
|
||||
+ case VER_2_X_NO_RPM:
|
||||
+ break;
|
||||
+ default:
|
||||
+ dev_err(dev, "%s: device not enabled\n", __func__);
|
||||
+ ret = -ENODEV;
|
||||
+ goto err_put_device;
|
||||
+ }
|
||||
}
|
||||
|
||||
priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
|
||||
--- a/drivers/thermal/qcom/tsens.h
|
||||
+++ b/drivers/thermal/qcom/tsens.h
|
||||
@@ -34,6 +34,7 @@ enum tsens_ver {
|
||||
VER_0 = 0,
|
||||
VER_0_1,
|
||||
VER_1_X,
|
||||
+ VER_1_X_NO_RPM,
|
||||
VER_2_X,
|
||||
VER_2_X_NO_RPM,
|
||||
};
|
|
@ -0,0 +1,64 @@
|
|||
From 04b31cc53fe0df0e87a37d18a3c0363d7dee218f Mon Sep 17 00:00:00 2001
|
||||
From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
Date: Fri, 28 Feb 2025 09:11:38 +0400
|
||||
Subject: [PATCH] thermal/drivers/qcom/tsens: Add support for IPQ5018 tsens
|
||||
|
||||
IPQ5018 has tsens IP V1.0, 5 sensors of which 4 are in use and 1
|
||||
interrupt. The IP does not have a RPM, hence use init routine for
|
||||
tsens v1.0 without RPM which does not early enable.
|
||||
|
||||
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
||||
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
|
||||
Link: https://lore.kernel.org/r/DS7PR19MB8883BD0E36C08DD1D03CE1CB9DCC2@DS7PR19MB8883.namprd19.prod.outlook.com
|
||||
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
|
||||
---
|
||||
drivers/thermal/qcom/tsens-v1.c | 14 ++++++++++++++
|
||||
drivers/thermal/qcom/tsens.c | 3 +++
|
||||
drivers/thermal/qcom/tsens.h | 3 +++
|
||||
3 files changed, 20 insertions(+)
|
||||
|
||||
--- a/drivers/thermal/qcom/tsens-v1.c
|
||||
+++ b/drivers/thermal/qcom/tsens-v1.c
|
||||
@@ -242,3 +242,17 @@ struct tsens_plat_data data_8976 = {
|
||||
.feat = &tsens_v1_feat,
|
||||
.fields = tsens_v1_regfields,
|
||||
};
|
||||
+
|
||||
+const struct tsens_ops ops_ipq5018 = {
|
||||
+ .init = init_tsens_v1_no_rpm,
|
||||
+ .calibrate = tsens_calibrate_common,
|
||||
+ .get_temp = get_temp_tsens_valid,
|
||||
+};
|
||||
+
|
||||
+const struct tsens_plat_data data_ipq5018 = {
|
||||
+ .num_sensors = 5,
|
||||
+ .ops = &ops_ipq5018,
|
||||
+ .hw_ids = (unsigned int []){0, 1, 2, 3, 4},
|
||||
+ .feat = &tsens_v1_no_rpm_feat,
|
||||
+ .fields = tsens_v1_regfields,
|
||||
+};
|
||||
--- a/drivers/thermal/qcom/tsens.c
|
||||
+++ b/drivers/thermal/qcom/tsens.c
|
||||
@@ -1108,6 +1108,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, t
|
||||
|
||||
static const struct of_device_id tsens_table[] = {
|
||||
{
|
||||
+ .compatible = "qcom,ipq5018-tsens",
|
||||
+ .data = &data_ipq5018,
|
||||
+ }, {
|
||||
.compatible = "qcom,ipq5332-tsens",
|
||||
.data = &data_ipq5332,
|
||||
}, {
|
||||
--- a/drivers/thermal/qcom/tsens.h
|
||||
+++ b/drivers/thermal/qcom/tsens.h
|
||||
@@ -652,6 +652,9 @@ extern struct tsens_plat_data data_8226,
|
||||
/* TSENS v1 targets */
|
||||
extern struct tsens_plat_data data_tsens_v1, data_8937, data_8976, data_8956;
|
||||
|
||||
+/* TSENS v1 with no RPM targets */
|
||||
+extern const struct tsens_plat_data data_ipq5018;
|
||||
+
|
||||
/* TSENS v2 targets */
|
||||
extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2;
|
||||
extern const struct tsens_plat_data data_ipq5332, data_ipq5424;
|
|
@ -1,14 +1,17 @@
|
|||
From: George Moussalem <george.moussalem@outlook.com>
|
||||
Date: Fri, 28 Feb 2025 09:11:39 +0400
|
||||
Subject: [PATCH v9 6/6] arm64: dts: qcom: ipq5018: Add tsens node
|
||||
|
||||
From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
Subject: [PATCH] arm64: dts: qcom: ipq5018: Add tsens node
|
||||
Date: Fri, 22 Sep 2023 17:21:16 +0530
|
||||
|
||||
IPQ5018 has tsens V1.0 IP with 4 sensors.
|
||||
IPQ5018 has tsens V1.0 IP with 5 sensors, though 4 are in use.
|
||||
There is no RPM, so tsens has to be manually enabled. Adding the tsens
|
||||
and nvmem node and IPQ5018 has 4 thermal sensors (zones). With the
|
||||
critical temperature being 120'C and action is to reboot. Adding all
|
||||
the 4 zones here.
|
||||
and nvmem nodes and adding 4 thermal sensors (zones). With the
|
||||
critical temperature being 120'C and action is to reboot.
|
||||
|
||||
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
||||
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
|
||||
---
|
||||
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 169 ++++++++++++++++++++++++++
|
||||
1 file changed, 169 insertions(+)
|
||||
|
@ -21,22 +24,22 @@ Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
|||
|
||||
+ qfprom: qfprom@a0000 {
|
||||
+ compatible = "qcom,ipq5018-qfprom", "qcom,qfprom";
|
||||
+ reg = <0xa0000 0x1000>;
|
||||
+ reg = <0x000a0000 0x1000>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+
|
||||
+ tsens_mode: mode@249 {
|
||||
+ reg = <0x249 1>;
|
||||
+ reg = <0x249 0x1>;
|
||||
+ bits = <0 3>;
|
||||
+ };
|
||||
+
|
||||
+ tsens_base1: base1@249 {
|
||||
+ reg = <0x249 2>;
|
||||
+ reg = <0x249 0x2>;
|
||||
+ bits = <3 8>;
|
||||
+ };
|
||||
+
|
||||
+ tsens_base2: base2@24a {
|
||||
+ reg = <0x24a 2>;
|
||||
+ reg = <0x24a 0x2>;
|
||||
+ bits = <3 8>;
|
||||
+ };
|
||||
+
|
||||
|
@ -93,8 +96,8 @@ Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
|||
+
|
||||
+ tsens: thermal-sensor@4a9000 {
|
||||
+ compatible = "qcom,ipq5018-tsens";
|
||||
+ reg = <0x4a9000 0x1000>, /* TM */
|
||||
+ <0x4a8000 0x1000>; /* SROT */
|
||||
+ reg = <0x004a9000 0x1000>, /* TM */
|
||||
+ <0x004a8000 0x1000>; /* SROT */
|
||||
+
|
||||
+ nvmem-cells = <&tsens_mode>,
|
||||
+ <&tsens_base1>,
|
|
@ -1,22 +0,0 @@
|
|||
From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
Subject: [PATCH V2 1/1] dt-bindings: nvmem: Add compatible for IPQ5018
|
||||
Date: Fri, 15 Sep 2023 17:31:20 +0530
|
||||
|
||||
Document the QFPROM on IPQ5018.
|
||||
|
||||
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
---
|
||||
Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
--- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
|
||||
+++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
|
||||
@@ -19,6 +19,7 @@ properties:
|
||||
- enum:
|
||||
- qcom,apq8064-qfprom
|
||||
- qcom,apq8084-qfprom
|
||||
+ - qcom,ipq5018-qfprom
|
||||
- qcom,ipq5332-qfprom
|
||||
- qcom,ipq6018-qfprom
|
||||
- qcom,ipq8064-qfprom
|
|
@ -1,26 +0,0 @@
|
|||
From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
Date: Fri, 22 Sep 2023 17:21:13 +0530
|
||||
Subject: [PATCH] dt-bindings: thermal: qcom-tsens: Add ipq5018 compatible
|
||||
|
||||
IPQ5018 has tsens v1.0 block with 4 sensors and 1 interrupt.
|
||||
|
||||
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
---
|
||||
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
|
||||
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
|
||||
@@ -39,6 +39,7 @@ properties:
|
||||
- description: v1 of TSENS
|
||||
items:
|
||||
- enum:
|
||||
+ - qcom,ipq5018-tsens
|
||||
- qcom,msm8956-tsens
|
||||
- qcom,msm8976-tsens
|
||||
- qcom,qcs404-tsens
|
||||
@@ -234,6 +235,7 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
+ - qcom,ipq5018-tsens
|
||||
- qcom,ipq8064-tsens
|
||||
- qcom,msm8960-tsens
|
||||
- qcom,tsens-v0_1
|
|
@ -1,45 +0,0 @@
|
|||
From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
Subject: [PATCH] thermal/drivers/qcom: Add new feat for soc without rpm
|
||||
Date: Fri, 22 Sep 2023 17:21:14 +0530
|
||||
|
||||
In IPQ5018, Tsens IP doesn't have RPM. Hence the early init to
|
||||
enable tsens would not be done. So add a flag for that in feat
|
||||
and skip enable checks. Without this, tsens probe fails.
|
||||
|
||||
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
||||
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
---
|
||||
drivers/thermal/qcom/tsens.c | 2 +-
|
||||
drivers/thermal/qcom/tsens.h | 3 +++
|
||||
2 files changed, 4 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/thermal/qcom/tsens.c
|
||||
+++ b/drivers/thermal/qcom/tsens.c
|
||||
@@ -975,7 +975,7 @@ int __init init_common(struct tsens_priv
|
||||
ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
|
||||
if (ret)
|
||||
goto err_put_device;
|
||||
- if (!enabled) {
|
||||
+ if (!enabled && !(priv->feat->ignore_enable)) {
|
||||
dev_err(dev, "%s: device not enabled\n", __func__);
|
||||
ret = -ENODEV;
|
||||
goto err_put_device;
|
||||
--- a/drivers/thermal/qcom/tsens.h
|
||||
+++ b/drivers/thermal/qcom/tsens.h
|
||||
@@ -505,6 +505,8 @@ enum regfield_ids {
|
||||
* @srot_split: does the IP neatly splits the register space into SROT and TM,
|
||||
* with SROT only being available to secure boot firmware?
|
||||
* @has_watchdog: does this IP support watchdog functionality?
|
||||
+ * @ignore_enable: does this IP reside in a soc that does not have rpm to
|
||||
+ * do pre-init.
|
||||
* @max_sensors: maximum sensors supported by this version of the IP
|
||||
* @trip_min_temp: minimum trip temperature supported by this version of the IP
|
||||
* @trip_max_temp: maximum trip temperature supported by this version of the IP
|
||||
@@ -516,6 +518,7 @@ struct tsens_features {
|
||||
unsigned int adc:1;
|
||||
unsigned int srot_split:1;
|
||||
unsigned int has_watchdog:1;
|
||||
+ unsigned int ignore_enable:1;
|
||||
unsigned int max_sensors;
|
||||
int trip_min_temp;
|
||||
int trip_max_temp;
|
|
@ -1,118 +0,0 @@
|
|||
From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
Subject: [PATCH] thermal/drivers/tsens: Add support for IPQ5018 tsens
|
||||
Date: Fri, 22 Sep 2023 17:21:15 +0530
|
||||
|
||||
IPQ5018 has tsens IP V1.0, 4 sensors and 1 interrupt.
|
||||
The soc does not have a RPM, hence tsens has to be reset and
|
||||
enabled in the driver init. Adding the driver support for same.
|
||||
|
||||
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
|
||||
---
|
||||
drivers/thermal/qcom/tsens-v1.c | 60 +++++++++++++++++++++++++++++++++
|
||||
drivers/thermal/qcom/tsens.c | 3 ++
|
||||
drivers/thermal/qcom/tsens.h | 2 +-
|
||||
3 files changed, 64 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/thermal/qcom/tsens-v1.c
|
||||
+++ b/drivers/thermal/qcom/tsens-v1.c
|
||||
@@ -79,6 +79,18 @@ static struct tsens_features tsens_v1_fe
|
||||
.trip_max_temp = 120000,
|
||||
};
|
||||
|
||||
+static struct tsens_features tsens_v1_ipq5018_feat = {
|
||||
+ .ver_major = VER_1_X,
|
||||
+ .crit_int = 0,
|
||||
+ .combo_int = 0,
|
||||
+ .adc = 1,
|
||||
+ .srot_split = 1,
|
||||
+ .max_sensors = 11,
|
||||
+ .trip_min_temp = -40000,
|
||||
+ .trip_max_temp = 120000,
|
||||
+ .ignore_enable = 1,
|
||||
+};
|
||||
+
|
||||
static const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] = {
|
||||
/* ----- SROT ------ */
|
||||
/* VERSION */
|
||||
@@ -150,6 +162,41 @@ static int __init init_8956(struct tsens
|
||||
return init_common(priv);
|
||||
}
|
||||
|
||||
+static int __init init_ipq5018(struct tsens_priv *priv)
|
||||
+{
|
||||
+ int ret;
|
||||
+ u32 mask;
|
||||
+
|
||||
+ ret = init_common(priv);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(priv->dev, "Init common failed %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = regmap_field_write(priv->rf[TSENS_SW_RST], 1);
|
||||
+ if (ret) {
|
||||
+ dev_err(priv->dev, "Reset failed\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ mask = GENMASK(priv->num_sensors, 0);
|
||||
+ ret = regmap_field_update_bits(priv->rf[SENSOR_EN], mask, mask);
|
||||
+ if (ret) {
|
||||
+ dev_err(priv->dev, "Sensor Enable failed\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = regmap_field_write(priv->rf[TSENS_EN], 1);
|
||||
+ if (ret) {
|
||||
+ dev_err(priv->dev, "Enable failed\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = regmap_field_write(priv->rf[TSENS_SW_RST], 0);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
static const struct tsens_ops ops_generic_v1 = {
|
||||
.init = init_common,
|
||||
.calibrate = calibrate_v1,
|
||||
@@ -194,3 +241,16 @@ struct tsens_plat_data data_8976 = {
|
||||
.feat = &tsens_v1_feat,
|
||||
.fields = tsens_v1_regfields,
|
||||
};
|
||||
+
|
||||
+const struct tsens_ops ops_ipq5018 = {
|
||||
+ .init = init_ipq5018,
|
||||
+ .calibrate = tsens_calibrate_common,
|
||||
+ .get_temp = get_temp_tsens_valid,
|
||||
+};
|
||||
+
|
||||
+struct tsens_plat_data data_ipq5018 = {
|
||||
+ .num_sensors = 5,
|
||||
+ .ops = &ops_ipq5018,
|
||||
+ .feat = &tsens_v1_ipq5018_feat,
|
||||
+ .fields = tsens_v1_regfields,
|
||||
+};
|
||||
--- a/drivers/thermal/qcom/tsens.c
|
||||
+++ b/drivers/thermal/qcom/tsens.c
|
||||
@@ -1102,6 +1102,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, t
|
||||
|
||||
static const struct of_device_id tsens_table[] = {
|
||||
{
|
||||
+ .compatible = "qcom,ipq5018-tsens",
|
||||
+ .data = &data_ipq5018,
|
||||
+ }, {
|
||||
.compatible = "qcom,ipq8064-tsens",
|
||||
.data = &data_8960,
|
||||
}, {
|
||||
--- a/drivers/thermal/qcom/tsens.h
|
||||
+++ b/drivers/thermal/qcom/tsens.h
|
||||
@@ -650,7 +650,7 @@ extern struct tsens_plat_data data_8960;
|
||||
extern struct tsens_plat_data data_8226, data_8909, data_8916, data_8939, data_8974, data_9607;
|
||||
|
||||
/* TSENS v1 targets */
|
||||
-extern struct tsens_plat_data data_tsens_v1, data_8937, data_8976, data_8956;
|
||||
+extern struct tsens_plat_data data_tsens_v1, data_8937, data_8976, data_8956, data_ipq5018;
|
||||
|
||||
/* TSENS v2 targets */
|
||||
extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2;
|
|
@ -22,4 +22,4 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
|
|||
+
|
||||
tsens: thermal-sensor@4a9000 {
|
||||
compatible = "qcom,ipq5018-tsens";
|
||||
reg = <0x4a9000 0x1000>, /* TM */
|
||||
reg = <0x004a9000 0x1000>, /* TM */
|
||||
|
|
|
@ -42,4 +42,4 @@ Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
|
|||
+
|
||||
qfprom: qfprom@a0000 {
|
||||
compatible = "qcom,ipq5018-qfprom", "qcom,qfprom";
|
||||
reg = <0xa0000 0x1000>;
|
||||
reg = <0x000a0000 0x1000>;
|
||||
|
|
Loading…
Reference in a new issue