ath79: rename pcie-controller to pcie

pcie-controller was renamed to pcie since at least kernel 4.14. Match it
here to get rid of dtc warnings.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
This commit is contained in:
Rosen Penev 2023-12-01 12:42:00 -08:00 committed by Christian Marangi
parent a94abfadc4
commit b07b8aade7
No known key found for this signature in database
GPG key ID: AC001D09ADBFEAD7
10 changed files with 11 additions and 11 deletions

View file

@ -113,7 +113,7 @@
#reset-cells = <1>;
};
pcie0: pcie-controller@17010000 {
pcie0: pcie@17010000 {
compatible = "qca,ar7100-pci";
#address-cells = <3>;
#size-cells = <2>;

View file

@ -121,7 +121,7 @@
#reset-cells = <1>;
};
pcie: pcie-controller@180c0000 {
pcie: pcie@180c0000 {
compatible = "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;

View file

@ -32,7 +32,7 @@
};
&ahb {
pcie: pcie-controller@180c0000 {
pcie: pcie@180c0000 {
compatible = "qcom,ar9340-pci", "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;

View file

@ -150,7 +150,7 @@
reg = <0x18070000 0x4>;
};
pcie0: pcie-controller@180c0000 {
pcie0: pcie@180c0000 {
compatible = "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;

View file

@ -185,7 +185,7 @@
reg = <0x18070000 0x58>;
};
pcie0: pcie-controller@180c0000 {
pcie0: pcie@180c0000 {
compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;
@ -222,7 +222,7 @@
status = "disabled";
};
pcie1: pcie-controller@18250000 {
pcie1: pcie@18250000 {
compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;

View file

@ -157,7 +157,7 @@
status = "disabled";
};
pcie: pcie-controller@18250000 {
pcie: pcie@18250000 {
compatible = "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;

View file

@ -37,7 +37,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
+- interrupt-parent: phandle to the MIPS IRQ controller
+
+* Example for ar7100
+ pcie-controller@180c0000 {
+ pcie@180c0000 {
+ compatible = "qca,ar7100-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;

View file

@ -39,7 +39,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
+- interrupt-controller: define to enable the builtin IRQ cascade.
+
+* Example for qca9557
+ pcie-controller@180c0000 {
+ pcie@180c0000 {
+ compatible = "qcom,ar7240-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;

View file

@ -37,7 +37,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
+- interrupt-parent: phandle to the MIPS IRQ controller
+
+* Example for ar7100
+ pcie-controller@180c0000 {
+ pcie@180c0000 {
+ compatible = "qca,ar7100-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;

View file

@ -39,7 +39,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
+- interrupt-controller: define to enable the builtin IRQ cascade.
+
+* Example for qca9557
+ pcie-controller@180c0000 {
+ pcie@180c0000 {
+ compatible = "qcom,ar7240-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;