mcs814x: implement MULTI_IRQ_HANDLER
Allows us to get rid of the IRQ entry point assembly Signed-off-by: Florian Fainelli <florian@openwrt.org> SVN-Revision: 36060
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18908139f3
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4 changed files with 24 additions and 25 deletions
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@ -40,5 +40,6 @@ DT_MACHINE_START(mcs8140_dt, "Moschip MCS8140 board")
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.init_machine = mcs814x_dt_device_init,
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.init_machine = mcs814x_dt_device_init,
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.restart = mcs814x_restart,
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.restart = mcs814x_restart,
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.dt_compat = mcs8140_dt_board_compat,
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.dt_compat = mcs8140_dt_board_compat,
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.handle_irq = mcs814x_handle_irq,
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MACHINE_END
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MACHINE_END
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@ -4,26 +4,3 @@
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.macro arch_ret_to_user, tmp1, tmp2
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =mcs814x_intc_base @ base virtual address of AIC peripheral
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ldr \base, [\base]
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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mov \tmp, #MCS814X_IRQ_STS0 @ load tmp with STS0 register offset
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ldr \irqstat, [\base, \tmp] @ load value at base + tmp
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tst \irqstat, \irqstat @ test if no active IRQ's
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beq 1002f @ if no active irqs return with status 0
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mov \irqnr, #0 @ start from irq zero
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mov \tmp, #1 @ the mask initially 1
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1001:
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tst \irqstat, \tmp @ and with mask
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addeq \irqnr, \irqnr, #1 @ if zero then add one to nr
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moveq \tmp, \tmp, lsl #1 @ shift mask one to left
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beq 1001b @ if zero then loop again
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mov \irqstat, \tmp @ save the return mask
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mov \tmp, #MCS814X_IRQ_STS0 @ load tmp with ICR offset
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str \irqstat, [\base, \tmp] @ clear irq with selected mask
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1002:
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.endm
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@ -16,7 +16,7 @@
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#include <asm/mach/irq.h>
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#include <asm/mach/irq.h>
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#include <mach/mcs814x.h>
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#include <mach/mcs814x.h>
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void __iomem *mcs814x_intc_base;
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static void __iomem *mcs814x_intc_base;
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static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
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static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
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unsigned int num)
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unsigned int num)
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@ -43,6 +43,26 @@ static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
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writel_relaxed(0xffffffff, base + MCS814X_IRQ_ICR);
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writel_relaxed(0xffffffff, base + MCS814X_IRQ_ICR);
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}
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}
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asmlinkage void __exception_irq_entry mcs814x_handle_irq(struct pt_regs *regs)
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{
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u32 status, irq;
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do {
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/* read the status register */
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status = __raw_readl(mcs814x_intc_base + MCS814X_IRQ_STS0);
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if (!status)
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break;
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irq = ffs(status) - 1;
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status |= (1 << irq);
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/* clear the interrupt */
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__raw_writel(status, mcs814x_intc_base + MCS814X_IRQ_STS0);
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/* call the generic handler */
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handle_IRQ(irq, regs);
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} while (1);
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}
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static const struct of_device_id mcs814x_intc_ids[] = {
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static const struct of_device_id mcs814x_intc_ids[] = {
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{ .compatible = "moschip,mcs814x-intc" },
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{ .compatible = "moschip,mcs814x-intc" },
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{ /* sentinel */ },
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{ /* sentinel */ },
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@ -1,6 +1,6 @@
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--- a/arch/arm/Kconfig
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -869,6 +869,21 @@ config ARCH_EXYNOS
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@@ -869,6 +869,22 @@ config ARCH_EXYNOS
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help
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help
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Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
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Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
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@ -16,6 +16,7 @@
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+ select NEED_MACH_MEMORY_H
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+ select NEED_MACH_MEMORY_H
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+ select USB_ARCH_HAS_OHCI
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+ select USB_ARCH_HAS_OHCI
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+ select USB_ARCH_HAS_EHCI
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+ select USB_ARCH_HAS_EHCI
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+ select MULTI_IRQ_HANDLER
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+ help
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+ help
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+ Support for Moschip MCS814x SoCs (MCS8140).
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+ Support for Moschip MCS814x SoCs (MCS8140).
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+
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+
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