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kernel: update bcma to code from v3.17-rc1

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This is needed for some new patches.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

SVN-Revision: 42221
This commit is contained in:
Hauke Mehrtens 2014-08-19 20:06:24 +00:00
parent 9ba6cd186a
commit a8bdf2f1e0
5 changed files with 146 additions and 26 deletions
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6
target/linux/bcm53xx/patches-3.14/142-bcma-add-support-for-chipcommon-B-core.patch
View file

@ -109,7 +109,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
switch (core->id.id) { switch (core->id.id) {
case BCMA_CORE_4706_CHIPCOMMON: case BCMA_CORE_4706_CHIPCOMMON:
case BCMA_CORE_CHIPCOMMON: case BCMA_CORE_CHIPCOMMON:
+ case BCMA_CORE_CHIPCOMMON_B: + case BCMA_CORE_NS_CHIPCOMMON_B:
case BCMA_CORE_PCI: case BCMA_CORE_PCI:
case BCMA_CORE_PCIE: case BCMA_CORE_PCIE:
case BCMA_CORE_PCIE2: case BCMA_CORE_PCIE2:
@ -118,7 +118,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
} }
+ /* Init CC core */ + /* Init CC core */
+ core = bcma_find_core(bus, BCMA_CORE_CHIPCOMMON_B); + core = bcma_find_core(bus, BCMA_CORE_NS_CHIPCOMMON_B);
+ if (core) { + if (core) {
+ bus->drv_cc_b.core = core; + bus->drv_cc_b.core = core;
+ bcma_core_chipcommon_b_init(&bus->drv_cc_b); + bcma_core_chipcommon_b_init(&bus->drv_cc_b);
@ -142,7 +142,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
/* Some specific cores don't need wrappers */ /* Some specific cores don't need wrappers */
switch (core->id.id) { switch (core->id.id) {
case BCMA_CORE_4706_MAC_GBIT_COMMON: case BCMA_CORE_4706_MAC_GBIT_COMMON:
+ case BCMA_CORE_CHIPCOMMON_B: + case BCMA_CORE_NS_CHIPCOMMON_B:
/* Not used yet: case BCMA_CORE_OOB_ROUTER: */ /* Not used yet: case BCMA_CORE_OOB_ROUTER: */
break; break;
default: default:

2
target/linux/bcm53xx/patches-3.14/170-pcie2-bcma-add-new-PCIe2-driver-for-bcma.patch
View file

@ -617,7 +617,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+} +}
+ +
+static const struct bcma_device_id bcma_pcie2_table[] = { +static const struct bcma_device_id bcma_pcie2_table[] = {
+ BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_PCIEG2, BCMA_ANY_REV, BCMA_ANY_CLASS), + BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_PCIEG2, BCMA_ANY_REV, BCMA_ANY_CLASS),
+ BCMA_CORETABLE_END + BCMA_CORETABLE_END
+}; +};
+MODULE_DEVICE_TABLE(bcma, bcma_pcie2_table); +MODULE_DEVICE_TABLE(bcma, bcma_pcie2_table);

44
target/linux/generic/patches-3.10/025-bcma_backport.patch
View file

@ -996,17 +996,17 @@
{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" }, { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" }, { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" }, { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
+ { BCMA_CORE_PCIEG2, "PCIe Gen 2" }, + { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" },
+ { BCMA_CORE_DMA, "DMA" }, + { BCMA_CORE_NS_DMA, "DMA" },
+ { BCMA_CORE_SDIO3, "SDIO3" }, + { BCMA_CORE_NS_SDIO3, "SDIO3" },
+ { BCMA_CORE_USB20, "USB 2.0" }, + { BCMA_CORE_NS_USB20, "USB 2.0" },
+ { BCMA_CORE_USB30, "USB 3.0" }, + { BCMA_CORE_NS_USB30, "USB 3.0" },
+ { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" }, + { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" },
+ { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" }, + { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
+ { BCMA_CORE_ROM, "ROM" }, + { BCMA_CORE_NS_ROM, "ROM" },
+ { BCMA_CORE_NAND, "NAND flash controller" }, + { BCMA_CORE_NS_NAND, "NAND flash controller" },
+ { BCMA_CORE_QSPI, "SPI flash controller" }, + { BCMA_CORE_NS_QSPI, "SPI flash controller" },
+ { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" }, + { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" },
+ { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" }, + { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
{ BCMA_CORE_AMEMC, "AMEMC (DDR)" }, { BCMA_CORE_AMEMC, "AMEMC (DDR)" },
{ BCMA_CORE_ALTA, "ALTA (I2S)" }, { BCMA_CORE_ALTA, "ALTA (I2S)" },
@ -1327,17 +1327,17 @@
/* Core-ID values. */ /* Core-ID values. */
#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
#define BCMA_CORE_4706_CHIPCOMMON 0x500 #define BCMA_CORE_4706_CHIPCOMMON 0x500
+#define BCMA_CORE_PCIEG2 0x501 +#define BCMA_CORE_NS_PCIEG2 0x501
+#define BCMA_CORE_DMA 0x502 +#define BCMA_CORE_NS_DMA 0x502
+#define BCMA_CORE_SDIO3 0x503 +#define BCMA_CORE_NS_SDIO3 0x503
+#define BCMA_CORE_USB20 0x504 +#define BCMA_CORE_NS_USB20 0x504
+#define BCMA_CORE_USB30 0x505 +#define BCMA_CORE_NS_USB30 0x505
+#define BCMA_CORE_A9JTAG 0x506 +#define BCMA_CORE_NS_A9JTAG 0x506
+#define BCMA_CORE_DDR23 0x507 +#define BCMA_CORE_NS_DDR23 0x507
+#define BCMA_CORE_ROM 0x508 +#define BCMA_CORE_NS_ROM 0x508
+#define BCMA_CORE_NAND 0x509 +#define BCMA_CORE_NS_NAND 0x509
+#define BCMA_CORE_QSPI 0x50A +#define BCMA_CORE_NS_QSPI 0x50A
+#define BCMA_CORE_CHIPCOMMON_B 0x50B +#define BCMA_CORE_NS_CHIPCOMMON_B 0x50B
#define BCMA_CORE_4706_SOC_RAM 0x50E #define BCMA_CORE_4706_SOC_RAM 0x50E
+#define BCMA_CORE_ARMCA9 0x510 +#define BCMA_CORE_ARMCA9 0x510
#define BCMA_CORE_4706_MAC_GBIT 0x52D #define BCMA_CORE_4706_MAC_GBIT 0x52D

60
target/linux/generic/patches-3.13/025-bcma_backport.patch
View file

@ -603,6 +603,35 @@
#include <linux/bcma/bcma_driver_mips.h> #include <linux/bcma/bcma_driver_mips.h>
#include <linux/bcma/bcma_driver_gmac_cmn.h> #include <linux/bcma/bcma_driver_gmac_cmn.h>
#include <linux/ssb/ssb.h> /* SPROM sharing */ #include <linux/ssb/ssb.h> /* SPROM sharing */
@@ -72,17 +73,17 @@ struct bcma_host_ops {
/* Core-ID values. */
#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
#define BCMA_CORE_4706_CHIPCOMMON 0x500
-#define BCMA_CORE_PCIEG2 0x501
-#define BCMA_CORE_DMA 0x502
-#define BCMA_CORE_SDIO3 0x503
-#define BCMA_CORE_USB20 0x504
-#define BCMA_CORE_USB30 0x505
-#define BCMA_CORE_A9JTAG 0x506
-#define BCMA_CORE_DDR23 0x507
-#define BCMA_CORE_ROM 0x508
-#define BCMA_CORE_NAND 0x509
-#define BCMA_CORE_QSPI 0x50A
-#define BCMA_CORE_CHIPCOMMON_B 0x50B
+#define BCMA_CORE_NS_PCIEG2 0x501
+#define BCMA_CORE_NS_DMA 0x502
+#define BCMA_CORE_NS_SDIO3 0x503
+#define BCMA_CORE_NS_USB20 0x504
+#define BCMA_CORE_NS_USB30 0x505
+#define BCMA_CORE_NS_A9JTAG 0x506
+#define BCMA_CORE_NS_DDR23 0x507
+#define BCMA_CORE_NS_ROM 0x508
+#define BCMA_CORE_NS_NAND 0x509
+#define BCMA_CORE_NS_QSPI 0x50A
+#define BCMA_CORE_NS_CHIPCOMMON_B 0x50B
#define BCMA_CORE_4706_SOC_RAM 0x50E
#define BCMA_CORE_ARMCA9 0x510
#define BCMA_CORE_4706_MAC_GBIT 0x52D
@@ -157,6 +158,9 @@ struct bcma_host_ops { @@ -157,6 +158,9 @@ struct bcma_host_ops {
/* Chip IDs of PCIe devices */ /* Chip IDs of PCIe devices */
#define BCMA_CHIP_ID_BCM4313 0x4313 #define BCMA_CHIP_ID_BCM4313 0x4313
@ -808,3 +837,34 @@
+void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2); +void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2);
+ +
+#endif /* LINUX_BCMA_DRIVER_PCIE2_H_ */ +#endif /* LINUX_BCMA_DRIVER_PCIE2_H_ */
--- a/drivers/bcma/scan.c
+++ b/drivers/bcma/scan.c
@@ -32,17 +32,17 @@ static const struct bcma_device_id_name
{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
- { BCMA_CORE_PCIEG2, "PCIe Gen 2" },
- { BCMA_CORE_DMA, "DMA" },
- { BCMA_CORE_SDIO3, "SDIO3" },
- { BCMA_CORE_USB20, "USB 2.0" },
- { BCMA_CORE_USB30, "USB 3.0" },
- { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
- { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
- { BCMA_CORE_ROM, "ROM" },
- { BCMA_CORE_NAND, "NAND flash controller" },
- { BCMA_CORE_QSPI, "SPI flash controller" },
- { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
+ { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" },
+ { BCMA_CORE_NS_DMA, "DMA" },
+ { BCMA_CORE_NS_SDIO3, "SDIO3" },
+ { BCMA_CORE_NS_USB20, "USB 2.0" },
+ { BCMA_CORE_NS_USB30, "USB 3.0" },
+ { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" },
+ { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
+ { BCMA_CORE_NS_ROM, "ROM" },
+ { BCMA_CORE_NS_NAND, "NAND flash controller" },
+ { BCMA_CORE_NS_QSPI, "SPI flash controller" },
+ { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" },
{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
{ BCMA_CORE_ALTA, "ALTA (I2S)" },

60
target/linux/generic/patches-3.14/025-bcma_backport.patch
View file

@ -327,6 +327,35 @@
#include <linux/bcma/bcma_driver_mips.h> #include <linux/bcma/bcma_driver_mips.h>
#include <linux/bcma/bcma_driver_gmac_cmn.h> #include <linux/bcma/bcma_driver_gmac_cmn.h>
#include <linux/ssb/ssb.h> /* SPROM sharing */ #include <linux/ssb/ssb.h> /* SPROM sharing */
@@ -72,17 +73,17 @@ struct bcma_host_ops {
/* Core-ID values. */
#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
#define BCMA_CORE_4706_CHIPCOMMON 0x500
-#define BCMA_CORE_PCIEG2 0x501
-#define BCMA_CORE_DMA 0x502
-#define BCMA_CORE_SDIO3 0x503
-#define BCMA_CORE_USB20 0x504
-#define BCMA_CORE_USB30 0x505
-#define BCMA_CORE_A9JTAG 0x506
-#define BCMA_CORE_DDR23 0x507
-#define BCMA_CORE_ROM 0x508
-#define BCMA_CORE_NAND 0x509
-#define BCMA_CORE_QSPI 0x50A
-#define BCMA_CORE_CHIPCOMMON_B 0x50B
+#define BCMA_CORE_NS_PCIEG2 0x501
+#define BCMA_CORE_NS_DMA 0x502
+#define BCMA_CORE_NS_SDIO3 0x503
+#define BCMA_CORE_NS_USB20 0x504
+#define BCMA_CORE_NS_USB30 0x505
+#define BCMA_CORE_NS_A9JTAG 0x506
+#define BCMA_CORE_NS_DDR23 0x507
+#define BCMA_CORE_NS_ROM 0x508
+#define BCMA_CORE_NS_NAND 0x509
+#define BCMA_CORE_NS_QSPI 0x50A
+#define BCMA_CORE_NS_CHIPCOMMON_B 0x50B
#define BCMA_CORE_4706_SOC_RAM 0x50E
#define BCMA_CORE_ARMCA9 0x510
#define BCMA_CORE_4706_MAC_GBIT 0x52D
@@ -157,6 +158,9 @@ struct bcma_host_ops { @@ -157,6 +158,9 @@ struct bcma_host_ops {
/* Chip IDs of PCIe devices */ /* Chip IDs of PCIe devices */
#define BCMA_CHIP_ID_BCM4313 0x4313 #define BCMA_CHIP_ID_BCM4313 0x4313
@ -506,3 +535,34 @@
+void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2); +void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2);
+ +
+#endif /* LINUX_BCMA_DRIVER_PCIE2_H_ */ +#endif /* LINUX_BCMA_DRIVER_PCIE2_H_ */
--- a/drivers/bcma/scan.c
+++ b/drivers/bcma/scan.c
@@ -32,17 +32,17 @@ static const struct bcma_device_id_name
{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
- { BCMA_CORE_PCIEG2, "PCIe Gen 2" },
- { BCMA_CORE_DMA, "DMA" },
- { BCMA_CORE_SDIO3, "SDIO3" },
- { BCMA_CORE_USB20, "USB 2.0" },
- { BCMA_CORE_USB30, "USB 3.0" },
- { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
- { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
- { BCMA_CORE_ROM, "ROM" },
- { BCMA_CORE_NAND, "NAND flash controller" },
- { BCMA_CORE_QSPI, "SPI flash controller" },
- { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
+ { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" },
+ { BCMA_CORE_NS_DMA, "DMA" },
+ { BCMA_CORE_NS_SDIO3, "SDIO3" },
+ { BCMA_CORE_NS_USB20, "USB 2.0" },
+ { BCMA_CORE_NS_USB30, "USB 3.0" },
+ { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" },
+ { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
+ { BCMA_CORE_NS_ROM, "ROM" },
+ { BCMA_CORE_NS_NAND, "NAND flash controller" },
+ { BCMA_CORE_NS_QSPI, "SPI flash controller" },
+ { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" },
{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
{ BCMA_CORE_ALTA, "ALTA (I2S)" },