Merge branch 'openwrt:master' into master
This commit is contained in:
GitHub
commit
a67737a560
31 changed files with 3814 additions and 108 deletions
|
|
@ -118,7 +118,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
ð0 { /* WAN interface, initialized last as eth1 */
|
||||
status = "okay";
|
||||
|
||||
nvmem-cells = <&macaddr_uboot_1fc00>;
|
||||
|
|
@ -133,12 +133,11 @@
|
|||
};
|
||||
};
|
||||
|
||||
ð1 {
|
||||
ð1 { /* LAN interface, initialized first as eth0 */
|
||||
status = "okay";
|
||||
|
||||
nvmem-cells = <&macaddr_uboot_1fc00>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
mac-address-increment = <(-1)>;
|
||||
};
|
||||
|
||||
&wmac {
|
||||
|
|
|
|||
|
|
@ -243,9 +243,8 @@
|
|||
&wmac {
|
||||
status = "okay";
|
||||
|
||||
nvmem-cells = <&macaddr_caldata_0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
qca,no-eeprom;
|
||||
nvmem-cells = <&macaddr_caldata_0>, <&cal_art_1000>;
|
||||
nvmem-cell-names = "mac-address", "calibration";
|
||||
};
|
||||
|
||||
&pcie {
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||||
|
|
@ -254,9 +253,8 @@
|
|||
ath9k: wifi@0,0 {
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||||
compatible = "pci168c,0033";
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||||
reg = <0x0000 0 0 0 0>;
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||||
nvmem-cells = <&macaddr_caldata_c>;
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||||
nvmem-cell-names = "mac-address";
|
||||
qca,no-eeprom;
|
||||
nvmem-cells = <&macaddr_caldata_c>, <&cal_art_5000>;
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||||
nvmem-cell-names = "mac-address", "calibration";
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
|
@ -274,4 +272,12 @@
|
|||
macaddr_caldata_c: macaddr@c {
|
||||
reg = <0xc 0x6>;
|
||||
};
|
||||
|
||||
cal_art_1000: cal@1000 {
|
||||
reg = <0x1000 0x440>;
|
||||
};
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||||
|
||||
cal_art_5000: cal@5000 {
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||||
reg = <0x5000 0x440>;
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||||
};
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||||
};
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||||
|
|
|
|||
|
|
@ -209,9 +209,8 @@
|
|||
&wmac {
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||||
status = "okay";
|
||||
|
||||
nvmem-cells = <&macaddr_caldata_0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
qca,no-eeprom;
|
||||
nvmem-cells = <&macaddr_caldata_0>, <&cal_art_1000>;
|
||||
nvmem-cell-names = "mac-address", "calibration";
|
||||
};
|
||||
|
||||
&pcie {
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||||
|
|
@ -221,9 +220,8 @@
|
|||
/* chip is AR9580, override bogus PCI ID 168c:abcd */
|
||||
compatible = "pci168c,0033";
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
nvmem-cells = <&macaddr_caldata_c>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
qca,no-eeprom;
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||||
nvmem-cells = <&macaddr_caldata_c>, <&cal_art_5000>;
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nvmem-cell-names = "mac-address", "calibration";
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qca,gpio-mask=<0xf6ff>; /* unmask pin 9 for RFKILL button */
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#gpio-cells = <2>;
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gpio-controller;
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|
|
@ -250,4 +248,12 @@
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macaddr_caldata_c: macaddr@c {
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reg = <0xc 0x6>;
|
||||
};
|
||||
|
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cal_art_1000: cal@1000 {
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reg = <0x1000 0x440>;
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};
|
||||
|
||||
cal_art_5000: cal@5000 {
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||||
reg = <0x5000 0x440>;
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||||
};
|
||||
};
|
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|
|
|
|||
|
|
@ -43,6 +43,7 @@ define Device/ubnt_edgeswitch-8xp
|
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$(Device/ubnt-sw)
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DEVICE_MODEL := EdgeSwitch 8XP
|
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DEVICE_PACKAGES += kmod-switch-bcm53xx-mdio
|
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DEFAULT := n
|
||||
endef
|
||||
TARGET_DEVICES += ubnt_edgeswitch-8xp
|
||||
|
||||
|
|
|
|||
|
|
@ -12,29 +12,6 @@ case "$FIRMWARE" in
|
|||
8dev,rambutan)
|
||||
caldata_extract "caldata" 0x1000 0x800
|
||||
;;
|
||||
netgear,wndr3700-v4|\
|
||||
netgear,wndr4300|\
|
||||
netgear,wndr4300sw|\
|
||||
netgear,wndr4300tn|\
|
||||
netgear,wndr4300-v2|\
|
||||
netgear,wndr4500-v3)
|
||||
caldata_extract "caldata" 0x1000 0x440
|
||||
;;
|
||||
*)
|
||||
caldata_die "board $board is not supported yet"
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||||
;;
|
||||
esac
|
||||
;;
|
||||
"ath9k-eeprom-pci-0000:00:00.0.bin")
|
||||
case $board in
|
||||
netgear,wndr3700-v4|\
|
||||
netgear,wndr4300|\
|
||||
netgear,wndr4300sw|\
|
||||
netgear,wndr4300tn|\
|
||||
netgear,wndr4300-v2|\
|
||||
netgear,wndr4500-v3)
|
||||
caldata_extract "caldata" 0x5000 0x440
|
||||
;;
|
||||
*)
|
||||
caldata_die "board $board is not supported yet"
|
||||
;;
|
||||
|
|
|
|||
|
|
@ -105,7 +105,6 @@ CONFIG_CPU_THUMB_CAPABLE=y
|
|||
CONFIG_CPU_TLB_V6=y
|
||||
CONFIG_CPU_V6K=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_BLAKE2S=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
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||||
|
|
@ -237,7 +236,7 @@ CONFIG_MFD_SYSCON=y
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|||
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
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CONFIG_MIGRATION=y
|
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CONFIG_MMC=y
|
||||
CONFIG_MMC_BCM2835=y
|
||||
# CONFIG_MMC_BCM2835 is not set
|
||||
CONFIG_MMC_BCM2835_DMA=y
|
||||
CONFIG_MMC_BCM2835_MMC=y
|
||||
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
|
||||
|
|
|
|||
|
|
@ -123,7 +123,6 @@ CONFIG_CPU_THUMB_CAPABLE=y
|
|||
CONFIG_CPU_TLB_V7=y
|
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CONFIG_CPU_V7=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_BLAKE2S=y
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
CONFIG_CRYPTO_CRC32=y
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CONFIG_CRYPTO_CRC32C=y
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||||
|
|
@ -295,7 +294,7 @@ CONFIG_MICROCHIP_PHY=y
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CONFIG_MIGHT_HAVE_CACHE_L2X0=y
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CONFIG_MIGRATION=y
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CONFIG_MMC=y
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CONFIG_MMC_BCM2835=y
|
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# CONFIG_MMC_BCM2835 is not set
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CONFIG_MMC_BCM2835_DMA=y
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CONFIG_MMC_BCM2835_MMC=y
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CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
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|
|
|
|||
|
|
@ -127,7 +127,6 @@ CONFIG_CRC16=y
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|||
CONFIG_CRYPTO_AES_ARM64=y
|
||||
CONFIG_CRYPTO_AES_ARM64_BS=y
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CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
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CONFIG_CRYPTO_BLAKE2S=y
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CONFIG_CRYPTO_CBC=y
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CONFIG_CRYPTO_CRC32=y
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CONFIG_CRYPTO_CRC32C=y
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|
|
@ -290,7 +289,7 @@ CONFIG_MFD_SYSCON=y
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|||
CONFIG_MICROCHIP_PHY=y
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CONFIG_MIGRATION=y
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CONFIG_MMC=y
|
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CONFIG_MMC_BCM2835=y
|
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# CONFIG_MMC_BCM2835 is not set
|
||||
CONFIG_MMC_BCM2835_DMA=y
|
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CONFIG_MMC_BCM2835_MMC=y
|
||||
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
|
||||
|
|
@ -422,6 +421,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_TIMER_OF=y
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CONFIG_TIMER_PROBE=y
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||||
CONFIG_TMPFS_POSIX_ACL=y
|
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CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
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CONFIG_TREE_RCU=y
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CONFIG_TREE_SRCU=y
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||||
# CONFIG_UCLAMP_TASK is not set
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||||
|
|
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|||
|
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@ -131,7 +131,6 @@ CONFIG_CRC16=y
|
|||
CONFIG_CRYPTO_AES_ARM64=y
|
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CONFIG_CRYPTO_AES_ARM64_BS=y
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||||
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
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||||
CONFIG_CRYPTO_BLAKE2S=y
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CONFIG_CRYPTO_CBC=y
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||||
CONFIG_CRYPTO_CRC32=y
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||||
CONFIG_CRYPTO_CRC32C=y
|
||||
|
|
@ -297,7 +296,7 @@ CONFIG_MFD_CORE=y
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|||
CONFIG_MFD_SYSCON=y
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||||
CONFIG_MIGRATION=y
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||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BCM2835=y
|
||||
# CONFIG_MMC_BCM2835 is not set
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||||
CONFIG_MMC_BCM2835_DMA=y
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CONFIG_MMC_BCM2835_MMC=y
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||||
CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2
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||||
|
|
@ -432,6 +431,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_TIMER_OF=y
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CONFIG_TIMER_PROBE=y
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||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
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CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
# CONFIG_UCLAMP_TASK is not set
|
||||
|
|
|
|||
|
|
@ -660,14 +660,17 @@ define KernelPackage/sound-soc-hifiberry-digi
|
|||
TITLE:=Support for HifiBerry Digi / Digi+ / Digi+ Pro
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KCONFIG:= \
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||||
CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI \
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||||
CONFIG_SND_SOC_WM8804
|
||||
CONFIG_SND_SOC_WM8804 \
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||||
CONFIG_SND_SOC_WM8804_I2C
|
||||
FILES:= \
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$(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko
|
||||
AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804)
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko \
|
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$(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804-i2c.ko
|
||||
AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804 snd-soc-wm8804-i2c)
|
||||
DEPENDS:= \
|
||||
kmod-sound-soc-bcm2835-i2s \
|
||||
+kmod-sound-soc-rpi-wm8804-soundcard \
|
||||
+kmod-i2c-bcm2835
|
||||
+kmod-i2c-bcm2835 \
|
||||
+kmod-regmap-i2c
|
||||
$(call AddDepends/sound)
|
||||
endef
|
||||
|
||||
|
|
@ -803,17 +806,23 @@ define KernelPackage/sound-soc-justboom-both
|
|||
KCONFIG:= \
|
||||
CONFIG_SND_BCM2708_SOC_JUSTBOOM_BOTH \
|
||||
CONFIG_SND_SOC_PCM512x \
|
||||
CONFIG_SND_SOC_WM8804
|
||||
CONFIG_SND_SOC_PCM512x_I2C \
|
||||
CONFIG_SND_SOC_WM8804 \
|
||||
CONFIG_SND_SOC_WM8804_I2C
|
||||
FILES:= \
|
||||
$(LINUX_DIR)/sound/soc/bcm/snd-soc-justboom-both.ko \
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko
|
||||
AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x snd-soc-wm8804 \
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko \
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko \
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804-i2c.ko
|
||||
AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \
|
||||
snd-soc-wm8804-i2c snd-soc-wm8804 \
|
||||
snd-soc-justboom-both)
|
||||
DEPENDS:= \
|
||||
kmod-sound-soc-bcm2835-i2s \
|
||||
+kmod-sound-soc-rpi-wm8804-soundcard \
|
||||
+kmod-i2c-bcm2835
|
||||
+kmod-i2c-bcm2835 \
|
||||
+kmod-regmap-i2c
|
||||
$(call AddDepends/sound)
|
||||
endef
|
||||
|
||||
|
|
@ -828,14 +837,18 @@ define KernelPackage/sound-soc-justboom-dac
|
|||
TITLE:=Support for JustBoom DAC
|
||||
KCONFIG:= \
|
||||
CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC \
|
||||
CONFIG_SND_SOC_PCM512x
|
||||
CONFIG_SND_SOC_PCM512x \
|
||||
CONFIG_SND_SOC_PCM512x_I2C
|
||||
FILES:= \
|
||||
$(LINUX_DIR)/sound/soc/bcm/snd-soc-justboom-dac.ko \
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko
|
||||
AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x snd-soc-justboom-dac)
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko
|
||||
AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \
|
||||
snd-soc-justboom-dac)
|
||||
DEPENDS:= \
|
||||
kmod-sound-soc-bcm2835-i2s \
|
||||
+kmod-i2c-bcm2835
|
||||
+kmod-i2c-bcm2835 \
|
||||
+kmod-regmap-i2c
|
||||
$(call AddDepends/sound)
|
||||
endef
|
||||
|
||||
|
|
@ -850,14 +863,17 @@ define KernelPackage/sound-soc-justboom-digi
|
|||
TITLE:=Support for JustBoom Digi
|
||||
KCONFIG:= \
|
||||
CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI \
|
||||
CONFIG_SND_SOC_WM8804
|
||||
CONFIG_SND_SOC_WM8804 \
|
||||
CONFIG_SND_SOC_WM8804_I2C
|
||||
FILES:= \
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko
|
||||
AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804)
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko \
|
||||
$(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804-i2c.ko
|
||||
AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804-i2c snd-soc-wm8804)
|
||||
DEPENDS:= \
|
||||
kmod-sound-soc-bcm2835-i2s \
|
||||
+kmod-sound-soc-rpi-wm8804-soundcard \
|
||||
+kmod-i2c-bcm2835
|
||||
+kmod-i2c-bcm2835 \
|
||||
+kmod-regmap-i2c
|
||||
$(call AddDepends/sound)
|
||||
endef
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,39 @@
|
|||
From: Felix Fietkau <nbd@nbd.name>
|
||||
Date: Sat, 19 Nov 2022 18:48:42 +0100
|
||||
Subject: [PATCH] netfilter: nf_flow_table: add missing locking
|
||||
|
||||
nf_flow_table_block_setup and the driver TC_SETUP_FT call can modify the flow
|
||||
block cb list while they are being traversed elsewhere, causing a crash.
|
||||
Add a write lock around the calls to protect readers
|
||||
|
||||
Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
||||
---
|
||||
|
||||
--- a/net/netfilter/nf_flow_table_offload.c
|
||||
+++ b/net/netfilter/nf_flow_table_offload.c
|
||||
@@ -1015,6 +1015,7 @@ static int nf_flow_table_block_setup(str
|
||||
struct flow_block_cb *block_cb, *next;
|
||||
int err = 0;
|
||||
|
||||
+ down_write(&flowtable->flow_block_lock);
|
||||
switch (cmd) {
|
||||
case FLOW_BLOCK_BIND:
|
||||
list_splice(&bo->cb_list, &flowtable->flow_block.cb_list);
|
||||
@@ -1029,6 +1030,7 @@ static int nf_flow_table_block_setup(str
|
||||
WARN_ON_ONCE(1);
|
||||
err = -EOPNOTSUPP;
|
||||
}
|
||||
+ up_write(&flowtable->flow_block_lock);
|
||||
|
||||
return err;
|
||||
}
|
||||
@@ -1085,7 +1087,9 @@ static int nf_flow_table_offload_cmd(str
|
||||
|
||||
nf_flow_table_block_offload_init(bo, dev_net(dev), cmd, flowtable,
|
||||
extack);
|
||||
+ down_write(&flowtable->flow_block_lock);
|
||||
err = dev->netdev_ops->ndo_setup_tc(dev, TC_SETUP_FT, bo);
|
||||
+ up_write(&flowtable->flow_block_lock);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
From: Felix Fietkau <nbd@nbd.name>
|
||||
Date: Sat, 19 Nov 2022 18:48:42 +0100
|
||||
Subject: [PATCH] netfilter: nf_flow_table: add missing locking
|
||||
|
||||
nf_flow_table_block_setup and the driver TC_SETUP_FT call can modify the flow
|
||||
block cb list while they are being traversed elsewhere, causing a crash.
|
||||
Add a write lock around the calls to protect readers
|
||||
|
||||
Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
||||
---
|
||||
|
||||
--- a/net/netfilter/nf_flow_table_offload.c
|
||||
+++ b/net/netfilter/nf_flow_table_offload.c
|
||||
@@ -1074,6 +1074,7 @@ static int nf_flow_table_block_setup(str
|
||||
struct flow_block_cb *block_cb, *next;
|
||||
int err = 0;
|
||||
|
||||
+ down_write(&flowtable->flow_block_lock);
|
||||
switch (cmd) {
|
||||
case FLOW_BLOCK_BIND:
|
||||
list_splice(&bo->cb_list, &flowtable->flow_block.cb_list);
|
||||
@@ -1088,6 +1089,7 @@ static int nf_flow_table_block_setup(str
|
||||
WARN_ON_ONCE(1);
|
||||
err = -EOPNOTSUPP;
|
||||
}
|
||||
+ up_write(&flowtable->flow_block_lock);
|
||||
|
||||
return err;
|
||||
}
|
||||
@@ -1144,7 +1146,9 @@ static int nf_flow_table_offload_cmd(str
|
||||
|
||||
nf_flow_table_block_offload_init(bo, dev_net(dev), cmd, flowtable,
|
||||
extack);
|
||||
+ down_write(&flowtable->flow_block_lock);
|
||||
err = dev->netdev_ops->ndo_setup_tc(dev, TC_SETUP_FT, bo);
|
||||
+ up_write(&flowtable->flow_block_lock);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
|
|
@ -12,11 +12,12 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
|||
|
||||
--- a/net/core/flow_dissector.c
|
||||
+++ b/net/core/flow_dissector.c
|
||||
@@ -941,11 +941,13 @@ bool __skb_flow_dissect(const struct net
|
||||
@@ -940,12 +940,14 @@ bool __skb_flow_dissect(const struct net
|
||||
#if IS_ENABLED(CONFIG_NET_DSA)
|
||||
if (unlikely(skb->dev && netdev_uses_dsa(skb->dev) &&
|
||||
proto == htons(ETH_P_XDSA))) {
|
||||
const struct dsa_device_ops *ops;
|
||||
+ struct metadata_dst *md_dst = skb_metadata_dst(skb);
|
||||
const struct dsa_device_ops *ops;
|
||||
int offset = 0;
|
||||
|
||||
ops = skb->dev->dsa_ptr->tag_ops;
|
||||
|
|
@ -53,7 +54,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
|||
+ if (md_dst && md_dst->type == METADATA_HW_PORT_MUX) {
|
||||
+ unsigned int port = md_dst->u.port_info.port_id;
|
||||
+
|
||||
+ skb_dst_set(skb, NULL);
|
||||
+ skb_dst_drop(skb);
|
||||
+ if (!skb_has_extensions(skb))
|
||||
+ skb->slow_gro = 0;
|
||||
+
|
||||
|
|
|
|||
|
|
@ -109,7 +109,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
|||
- int err;
|
||||
+ int i, err;
|
||||
+
|
||||
+ if (mtk_uses_dsa(dev)) {
|
||||
+ if (mtk_uses_dsa(dev) && !eth->prog) {
|
||||
+ for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) {
|
||||
+ struct metadata_dst *md_dst = eth->dsa_meta[i];
|
||||
+
|
||||
|
|
|
|||
|
|
@ -0,0 +1,52 @@
|
|||
From: Felix Fietkau <nbd@nbd.name>
|
||||
Date: Thu, 17 Nov 2022 11:58:21 +0100
|
||||
Subject: [PATCH] net: ethernet: mtk_eth_soc: fix flow_offload related refcount
|
||||
bug
|
||||
|
||||
Since we call flow_block_cb_decref on FLOW_BLOCK_UNBIND, we need to call
|
||||
flow_block_cb_incref unconditionally, even for a newly allocated cb.
|
||||
Fixes a use-after-free bug
|
||||
|
||||
Fixes: 502e84e2382d ("net: ethernet: mtk_eth_soc: add flow offloading support")
|
||||
Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
||||
---
|
||||
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
|
||||
@@ -561,6 +561,7 @@ mtk_eth_setup_tc_block(struct net_device
|
||||
struct mtk_eth *eth = mac->hw;
|
||||
static LIST_HEAD(block_cb_list);
|
||||
struct flow_block_cb *block_cb;
|
||||
+ bool register_block = false;
|
||||
flow_setup_cb_t *cb;
|
||||
|
||||
if (!eth->soc->offload_version)
|
||||
@@ -575,16 +576,20 @@ mtk_eth_setup_tc_block(struct net_device
|
||||
switch (f->command) {
|
||||
case FLOW_BLOCK_BIND:
|
||||
block_cb = flow_block_cb_lookup(f->block, cb, dev);
|
||||
- if (block_cb) {
|
||||
- flow_block_cb_incref(block_cb);
|
||||
- return 0;
|
||||
+ if (!block_cb) {
|
||||
+ block_cb = flow_block_cb_alloc(cb, dev, dev, NULL);
|
||||
+ if (IS_ERR(block_cb))
|
||||
+ return PTR_ERR(block_cb);
|
||||
+
|
||||
+ register_block = true;
|
||||
}
|
||||
- block_cb = flow_block_cb_alloc(cb, dev, dev, NULL);
|
||||
- if (IS_ERR(block_cb))
|
||||
- return PTR_ERR(block_cb);
|
||||
|
||||
- flow_block_cb_add(block_cb, f);
|
||||
- list_add_tail(&block_cb->driver_list, &block_cb_list);
|
||||
+ flow_block_cb_incref(block_cb);
|
||||
+
|
||||
+ if (register_block) {
|
||||
+ flow_block_cb_add(block_cb, f);
|
||||
+ list_add_tail(&block_cb->driver_list, &block_cb_list);
|
||||
+ }
|
||||
return 0;
|
||||
case FLOW_BLOCK_UNBIND:
|
||||
block_cb = flow_block_cb_lookup(f->block, cb, dev);
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
From: Felix Fietkau <nbd@nbd.name>
|
||||
Date: Sun, 20 Nov 2022 23:01:00 +0100
|
||||
Subject: [PATCH] net: ethernet: mtk_eth_soc: drop generic vlan rx offload,
|
||||
only use DSA untagging
|
||||
|
||||
Through testing I found out that hardware vlan rx offload support seems to
|
||||
have some hardware issues. At least when using multiple MACs and when receiving
|
||||
tagged packets on the secondary MAC, the hardware can sometimes start to emit
|
||||
wrong tags on the first MAC as well.
|
||||
|
||||
In order to avoid such issues, drop the feature configuration and use the
|
||||
offload feature only for DSA hardware untagging on MT7621/MT7622 devices which
|
||||
only use one MAC.
|
||||
|
||||
Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
||||
---
|
||||
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
|
||||
@@ -1993,29 +1993,16 @@ static int mtk_poll_rx(struct napi_struc
|
||||
if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
|
||||
mtk_ppe_check_skb(eth->ppe[0], skb, hash);
|
||||
|
||||
- if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
|
||||
- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
|
||||
- if (trxd.rxd3 & RX_DMA_VTAG_V2)
|
||||
- __vlan_hwaccel_put_tag(skb,
|
||||
- htons(RX_DMA_VPID(trxd.rxd4)),
|
||||
- RX_DMA_VID(trxd.rxd4));
|
||||
- } else if (trxd.rxd2 & RX_DMA_VTAG) {
|
||||
- __vlan_hwaccel_put_tag(skb, htons(RX_DMA_VPID(trxd.rxd3)),
|
||||
- RX_DMA_VID(trxd.rxd3));
|
||||
- }
|
||||
- }
|
||||
-
|
||||
/* When using VLAN untagging in combination with DSA, the
|
||||
* hardware treats the MTK special tag as a VLAN and untags it.
|
||||
*/
|
||||
- if (skb_vlan_tag_present(skb) && netdev_uses_dsa(netdev)) {
|
||||
- unsigned int port = ntohs(skb->vlan_proto) & GENMASK(2, 0);
|
||||
+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) &&
|
||||
+ (trxd.rxd2 & RX_DMA_VTAG) && netdev_uses_dsa(netdev)) {
|
||||
+ unsigned int port = RX_DMA_VPID(trxd.rxd3) & GENMASK(2, 0);
|
||||
|
||||
if (port < ARRAY_SIZE(eth->dsa_meta) &&
|
||||
eth->dsa_meta[port])
|
||||
skb_dst_set_noref(skb, ð->dsa_meta[port]->dst);
|
||||
-
|
||||
- __vlan_hwaccel_clear_tag(skb);
|
||||
}
|
||||
|
||||
skb_record_rx_queue(skb, 0);
|
||||
@@ -2832,29 +2819,11 @@ static netdev_features_t mtk_fix_feature
|
||||
|
||||
static int mtk_set_features(struct net_device *dev, netdev_features_t features)
|
||||
{
|
||||
- struct mtk_mac *mac = netdev_priv(dev);
|
||||
- struct mtk_eth *eth = mac->hw;
|
||||
netdev_features_t diff = dev->features ^ features;
|
||||
- int i;
|
||||
|
||||
if ((diff & NETIF_F_LRO) && !(features & NETIF_F_LRO))
|
||||
mtk_hwlro_netdev_disable(dev);
|
||||
|
||||
- /* Set RX VLAN offloading */
|
||||
- if (!(diff & NETIF_F_HW_VLAN_CTAG_RX))
|
||||
- return 0;
|
||||
-
|
||||
- mtk_w32(eth, !!(features & NETIF_F_HW_VLAN_CTAG_RX),
|
||||
- MTK_CDMP_EG_CTRL);
|
||||
-
|
||||
- /* sync features with other MAC */
|
||||
- for (i = 0; i < MTK_MAC_COUNT; i++) {
|
||||
- if (!eth->netdev[i] || eth->netdev[i] == dev)
|
||||
- continue;
|
||||
- eth->netdev[i]->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
|
||||
- eth->netdev[i]->features |= features & NETIF_F_HW_VLAN_CTAG_RX;
|
||||
- }
|
||||
-
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -3153,30 +3122,6 @@ static int mtk_open(struct net_device *d
|
||||
struct mtk_eth *eth = mac->hw;
|
||||
int i, err;
|
||||
|
||||
- if (mtk_uses_dsa(dev) && !eth->prog) {
|
||||
- for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) {
|
||||
- struct metadata_dst *md_dst = eth->dsa_meta[i];
|
||||
-
|
||||
- if (md_dst)
|
||||
- continue;
|
||||
-
|
||||
- md_dst = metadata_dst_alloc(0, METADATA_HW_PORT_MUX,
|
||||
- GFP_KERNEL);
|
||||
- if (!md_dst)
|
||||
- return -ENOMEM;
|
||||
-
|
||||
- md_dst->u.port_info.port_id = i;
|
||||
- eth->dsa_meta[i] = md_dst;
|
||||
- }
|
||||
- } else {
|
||||
- /* Hardware special tag parsing needs to be disabled if at least
|
||||
- * one MAC does not use DSA.
|
||||
- */
|
||||
- u32 val = mtk_r32(eth, MTK_CDMP_IG_CTRL);
|
||||
- val &= ~MTK_CDMP_STAG_EN;
|
||||
- mtk_w32(eth, val, MTK_CDMP_IG_CTRL);
|
||||
- }
|
||||
-
|
||||
err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0);
|
||||
if (err) {
|
||||
netdev_err(dev, "%s: could not attach PHY: %d\n", __func__,
|
||||
@@ -3215,6 +3160,39 @@ static int mtk_open(struct net_device *d
|
||||
phylink_start(mac->phylink);
|
||||
netif_tx_start_all_queues(dev);
|
||||
|
||||
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
|
||||
+ return 0;
|
||||
+
|
||||
+ if (mtk_uses_dsa(dev) && !eth->prog) {
|
||||
+ for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) {
|
||||
+ struct metadata_dst *md_dst = eth->dsa_meta[i];
|
||||
+
|
||||
+ if (md_dst)
|
||||
+ continue;
|
||||
+
|
||||
+ md_dst = metadata_dst_alloc(0, METADATA_HW_PORT_MUX,
|
||||
+ GFP_KERNEL);
|
||||
+ if (!md_dst)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ md_dst->u.port_info.port_id = i;
|
||||
+ eth->dsa_meta[i] = md_dst;
|
||||
+ }
|
||||
+ } else {
|
||||
+ /* Hardware special tag parsing needs to be disabled if at least
|
||||
+ * one MAC does not use DSA.
|
||||
+ */
|
||||
+ u32 val = mtk_r32(eth, MTK_CDMP_IG_CTRL);
|
||||
+ val &= ~MTK_CDMP_STAG_EN;
|
||||
+ mtk_w32(eth, val, MTK_CDMP_IG_CTRL);
|
||||
+
|
||||
+ val = mtk_r32(eth, MTK_CDMQ_IG_CTRL);
|
||||
+ val &= ~MTK_CDMQ_STAG_EN;
|
||||
+ mtk_w32(eth, val, MTK_CDMQ_IG_CTRL);
|
||||
+
|
||||
+ mtk_w32(eth, 0, MTK_CDMP_EG_CTRL);
|
||||
+ }
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -3508,10 +3486,9 @@ static int mtk_hw_init(struct mtk_eth *e
|
||||
if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
|
||||
val = mtk_r32(eth, MTK_CDMP_IG_CTRL);
|
||||
mtk_w32(eth, val | MTK_CDMP_STAG_EN, MTK_CDMP_IG_CTRL);
|
||||
- }
|
||||
|
||||
- /* Enable RX VLan Offloading */
|
||||
- mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
|
||||
+ mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
|
||||
+ }
|
||||
|
||||
/* set interrupt delays based on current Net DIM sample */
|
||||
mtk_dim_rx(ð->rx_dim.work);
|
||||
@@ -4132,7 +4109,7 @@ static int mtk_add_mac(struct mtk_eth *e
|
||||
eth->netdev[id]->hw_features |= NETIF_F_LRO;
|
||||
|
||||
eth->netdev[id]->vlan_features = eth->soc->hw_features &
|
||||
- ~(NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX);
|
||||
+ ~NETIF_F_HW_VLAN_CTAG_TX;
|
||||
eth->netdev[id]->features |= eth->soc->hw_features;
|
||||
eth->netdev[id]->ethtool_ops = &mtk_ethtool_ops;
|
||||
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
|
||||
@@ -48,7 +48,6 @@
|
||||
#define MTK_HW_FEATURES (NETIF_F_IP_CSUM | \
|
||||
NETIF_F_RXCSUM | \
|
||||
NETIF_F_HW_VLAN_CTAG_TX | \
|
||||
- NETIF_F_HW_VLAN_CTAG_RX | \
|
||||
NETIF_F_SG | NETIF_F_ALL_TSO | \
|
||||
NETIF_F_IPV6_CSUM |\
|
||||
NETIF_F_HW_TC)
|
||||
|
|
@ -0,0 +1,591 @@
|
|||
From: Sujuan Chen <sujuan.chen@mediatek.com>
|
||||
Date: Sat, 5 Nov 2022 23:36:18 +0100
|
||||
Subject: [PATCH] net: ethernet: mtk_wed: introduce wed mcu support
|
||||
|
||||
Introduce WED mcu support used to configure WED WO chip.
|
||||
This is a preliminary patch in order to add RX Wireless
|
||||
Ethernet Dispatch available on MT7986 SoC.
|
||||
|
||||
Tested-by: Daniel Golle <daniel@makrotopia.org>
|
||||
Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
create mode 100644 drivers/net/ethernet/mediatek/mtk_wed_mcu.c
|
||||
create mode 100644 drivers/net/ethernet/mediatek/mtk_wed_wo.h
|
||||
|
||||
--- a/drivers/net/ethernet/mediatek/Makefile
|
||||
+++ b/drivers/net/ethernet/mediatek/Makefile
|
||||
@@ -5,7 +5,7 @@
|
||||
|
||||
obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o
|
||||
mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o
|
||||
-mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o
|
||||
+mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o mtk_wed_mcu.o
|
||||
ifdef CONFIG_DEBUG_FS
|
||||
mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o
|
||||
endif
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_wed_mcu.c
|
||||
@@ -0,0 +1,359 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+/* Copyright (C) 2022 MediaTek Inc.
|
||||
+ *
|
||||
+ * Author: Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
+ * Sujuan Chen <sujuan.chen@mediatek.com>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/firmware.h>
|
||||
+#include <linux/of_address.h>
|
||||
+#include <linux/of_reserved_mem.h>
|
||||
+#include <linux/mfd/syscon.h>
|
||||
+#include <linux/soc/mediatek/mtk_wed.h>
|
||||
+
|
||||
+#include "mtk_wed_regs.h"
|
||||
+#include "mtk_wed_wo.h"
|
||||
+#include "mtk_wed.h"
|
||||
+
|
||||
+static u32 wo_r32(struct mtk_wed_wo *wo, u32 reg)
|
||||
+{
|
||||
+ return readl(wo->boot.addr + reg);
|
||||
+}
|
||||
+
|
||||
+static void wo_w32(struct mtk_wed_wo *wo, u32 reg, u32 val)
|
||||
+{
|
||||
+ writel(val, wo->boot.addr + reg);
|
||||
+}
|
||||
+
|
||||
+static struct sk_buff *
|
||||
+mtk_wed_mcu_msg_alloc(const void *data, int data_len)
|
||||
+{
|
||||
+ int length = sizeof(struct mtk_wed_mcu_hdr) + data_len;
|
||||
+ struct sk_buff *skb;
|
||||
+
|
||||
+ skb = alloc_skb(length, GFP_KERNEL);
|
||||
+ if (!skb)
|
||||
+ return NULL;
|
||||
+
|
||||
+ memset(skb->head, 0, length);
|
||||
+ skb_reserve(skb, sizeof(struct mtk_wed_mcu_hdr));
|
||||
+ if (data && data_len)
|
||||
+ skb_put_data(skb, data, data_len);
|
||||
+
|
||||
+ return skb;
|
||||
+}
|
||||
+
|
||||
+static struct sk_buff *
|
||||
+mtk_wed_mcu_get_response(struct mtk_wed_wo *wo, unsigned long expires)
|
||||
+{
|
||||
+ if (!time_is_after_jiffies(expires))
|
||||
+ return NULL;
|
||||
+
|
||||
+ wait_event_timeout(wo->mcu.wait, !skb_queue_empty(&wo->mcu.res_q),
|
||||
+ expires - jiffies);
|
||||
+ return skb_dequeue(&wo->mcu.res_q);
|
||||
+}
|
||||
+
|
||||
+void mtk_wed_mcu_rx_event(struct mtk_wed_wo *wo, struct sk_buff *skb)
|
||||
+{
|
||||
+ skb_queue_tail(&wo->mcu.res_q, skb);
|
||||
+ wake_up(&wo->mcu.wait);
|
||||
+}
|
||||
+
|
||||
+void mtk_wed_mcu_rx_unsolicited_event(struct mtk_wed_wo *wo,
|
||||
+ struct sk_buff *skb)
|
||||
+{
|
||||
+ struct mtk_wed_mcu_hdr *hdr = (struct mtk_wed_mcu_hdr *)skb->data;
|
||||
+
|
||||
+ switch (hdr->cmd) {
|
||||
+ case MTK_WED_WO_EVT_LOG_DUMP: {
|
||||
+ const char *msg = (const char *)(skb->data + sizeof(*hdr));
|
||||
+
|
||||
+ dev_notice(wo->hw->dev, "%s\n", msg);
|
||||
+ break;
|
||||
+ }
|
||||
+ case MTK_WED_WO_EVT_PROFILING: {
|
||||
+ struct mtk_wed_wo_log_info *info;
|
||||
+ u32 count = (skb->len - sizeof(*hdr)) / sizeof(*info);
|
||||
+ int i;
|
||||
+
|
||||
+ info = (struct mtk_wed_wo_log_info *)(skb->data + sizeof(*hdr));
|
||||
+ for (i = 0 ; i < count ; i++)
|
||||
+ dev_notice(wo->hw->dev,
|
||||
+ "SN:%u latency: total=%u, rro:%u, mod:%u\n",
|
||||
+ le32_to_cpu(info[i].sn),
|
||||
+ le32_to_cpu(info[i].total),
|
||||
+ le32_to_cpu(info[i].rro),
|
||||
+ le32_to_cpu(info[i].mod));
|
||||
+ break;
|
||||
+ }
|
||||
+ case MTK_WED_WO_EVT_RXCNT_INFO:
|
||||
+ break;
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ dev_kfree_skb(skb);
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+mtk_wed_mcu_skb_send_msg(struct mtk_wed_wo *wo, struct sk_buff *skb,
|
||||
+ int id, int cmd, u16 *wait_seq, bool wait_resp)
|
||||
+{
|
||||
+ struct mtk_wed_mcu_hdr *hdr;
|
||||
+
|
||||
+ /* TODO: make it dynamic based on cmd */
|
||||
+ wo->mcu.timeout = 20 * HZ;
|
||||
+
|
||||
+ hdr = (struct mtk_wed_mcu_hdr *)skb_push(skb, sizeof(*hdr));
|
||||
+ hdr->cmd = cmd;
|
||||
+ hdr->length = cpu_to_le16(skb->len);
|
||||
+
|
||||
+ if (wait_resp && wait_seq) {
|
||||
+ u16 seq = ++wo->mcu.seq;
|
||||
+
|
||||
+ if (!seq)
|
||||
+ seq = ++wo->mcu.seq;
|
||||
+ *wait_seq = seq;
|
||||
+
|
||||
+ hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_NEED_RSP);
|
||||
+ hdr->seq = cpu_to_le16(seq);
|
||||
+ }
|
||||
+ if (id == MTK_WED_MODULE_ID_WO)
|
||||
+ hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_FROM_TO_WO);
|
||||
+
|
||||
+ dev_kfree_skb(skb);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+mtk_wed_mcu_parse_response(struct mtk_wed_wo *wo, struct sk_buff *skb,
|
||||
+ int cmd, int seq)
|
||||
+{
|
||||
+ struct mtk_wed_mcu_hdr *hdr;
|
||||
+
|
||||
+ if (!skb) {
|
||||
+ dev_err(wo->hw->dev, "Message %08x (seq %d) timeout\n",
|
||||
+ cmd, seq);
|
||||
+ return -ETIMEDOUT;
|
||||
+ }
|
||||
+
|
||||
+ hdr = (struct mtk_wed_mcu_hdr *)skb->data;
|
||||
+ if (le16_to_cpu(hdr->seq) != seq)
|
||||
+ return -EAGAIN;
|
||||
+
|
||||
+ skb_pull(skb, sizeof(*hdr));
|
||||
+ switch (cmd) {
|
||||
+ case MTK_WED_WO_CMD_RXCNT_INFO:
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int mtk_wed_mcu_send_msg(struct mtk_wed_wo *wo, int id, int cmd,
|
||||
+ const void *data, int len, bool wait_resp)
|
||||
+{
|
||||
+ unsigned long expires;
|
||||
+ struct sk_buff *skb;
|
||||
+ u16 seq;
|
||||
+ int ret;
|
||||
+
|
||||
+ skb = mtk_wed_mcu_msg_alloc(data, len);
|
||||
+ if (!skb)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ mutex_lock(&wo->mcu.mutex);
|
||||
+
|
||||
+ ret = mtk_wed_mcu_skb_send_msg(wo, skb, id, cmd, &seq, wait_resp);
|
||||
+ if (ret || !wait_resp)
|
||||
+ goto unlock;
|
||||
+
|
||||
+ expires = jiffies + wo->mcu.timeout;
|
||||
+ do {
|
||||
+ skb = mtk_wed_mcu_get_response(wo, expires);
|
||||
+ ret = mtk_wed_mcu_parse_response(wo, skb, cmd, seq);
|
||||
+ dev_kfree_skb(skb);
|
||||
+ } while (ret == -EAGAIN);
|
||||
+
|
||||
+unlock:
|
||||
+ mutex_unlock(&wo->mcu.mutex);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+mtk_wed_get_memory_region(struct mtk_wed_wo *wo,
|
||||
+ struct mtk_wed_wo_memory_region *region)
|
||||
+{
|
||||
+ struct reserved_mem *rmem;
|
||||
+ struct device_node *np;
|
||||
+ int index;
|
||||
+
|
||||
+ index = of_property_match_string(wo->hw->node, "memory-region-names",
|
||||
+ region->name);
|
||||
+ if (index < 0)
|
||||
+ return index;
|
||||
+
|
||||
+ np = of_parse_phandle(wo->hw->node, "memory-region", index);
|
||||
+ if (!np)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ rmem = of_reserved_mem_lookup(np);
|
||||
+ of_node_put(np);
|
||||
+
|
||||
+ if (!rmem)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ region->phy_addr = rmem->base;
|
||||
+ region->size = rmem->size;
|
||||
+ region->addr = devm_ioremap(wo->hw->dev, region->phy_addr, region->size);
|
||||
+
|
||||
+ return !region->addr ? -EINVAL : 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+mtk_wed_mcu_run_firmware(struct mtk_wed_wo *wo, const struct firmware *fw,
|
||||
+ struct mtk_wed_wo_memory_region *region)
|
||||
+{
|
||||
+ const u8 *first_region_ptr, *region_ptr, *trailer_ptr, *ptr = fw->data;
|
||||
+ const struct mtk_wed_fw_trailer *trailer;
|
||||
+ const struct mtk_wed_fw_region *fw_region;
|
||||
+
|
||||
+ trailer_ptr = fw->data + fw->size - sizeof(*trailer);
|
||||
+ trailer = (const struct mtk_wed_fw_trailer *)trailer_ptr;
|
||||
+ region_ptr = trailer_ptr - trailer->num_region * sizeof(*fw_region);
|
||||
+ first_region_ptr = region_ptr;
|
||||
+
|
||||
+ while (region_ptr < trailer_ptr) {
|
||||
+ u32 length;
|
||||
+
|
||||
+ fw_region = (const struct mtk_wed_fw_region *)region_ptr;
|
||||
+ length = le32_to_cpu(fw_region->len);
|
||||
+
|
||||
+ if (region->phy_addr != le32_to_cpu(fw_region->addr))
|
||||
+ goto next;
|
||||
+
|
||||
+ if (region->size < length)
|
||||
+ goto next;
|
||||
+
|
||||
+ if (first_region_ptr < ptr + length)
|
||||
+ goto next;
|
||||
+
|
||||
+ if (region->shared && region->consumed)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (!region->shared || !region->consumed) {
|
||||
+ memcpy_toio(region->addr, ptr, length);
|
||||
+ region->consumed = true;
|
||||
+ return 0;
|
||||
+ }
|
||||
+next:
|
||||
+ region_ptr += sizeof(*fw_region);
|
||||
+ ptr += length;
|
||||
+ }
|
||||
+
|
||||
+ return -EINVAL;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+mtk_wed_mcu_load_firmware(struct mtk_wed_wo *wo)
|
||||
+{
|
||||
+ static struct mtk_wed_wo_memory_region mem_region[] = {
|
||||
+ [MTK_WED_WO_REGION_EMI] = {
|
||||
+ .name = "wo-emi",
|
||||
+ },
|
||||
+ [MTK_WED_WO_REGION_ILM] = {
|
||||
+ .name = "wo-ilm",
|
||||
+ },
|
||||
+ [MTK_WED_WO_REGION_DATA] = {
|
||||
+ .name = "wo-data",
|
||||
+ .shared = true,
|
||||
+ },
|
||||
+ };
|
||||
+ const struct mtk_wed_fw_trailer *trailer;
|
||||
+ const struct firmware *fw;
|
||||
+ const char *fw_name;
|
||||
+ u32 val, boot_cr;
|
||||
+ int ret, i;
|
||||
+
|
||||
+ /* load firmware region metadata */
|
||||
+ for (i = 0; i < ARRAY_SIZE(mem_region); i++) {
|
||||
+ ret = mtk_wed_get_memory_region(wo, &mem_region[i]);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ wo->boot.name = "wo-boot";
|
||||
+ ret = mtk_wed_get_memory_region(wo, &wo->boot);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ /* set dummy cr */
|
||||
+ wed_w32(wo->hw->wed_dev, MTK_WED_SCR0 + 4 * MTK_WED_DUMMY_CR_FWDL,
|
||||
+ wo->hw->index + 1);
|
||||
+
|
||||
+ /* load firmware */
|
||||
+ fw_name = wo->hw->index ? MT7986_FIRMWARE_WO1 : MT7986_FIRMWARE_WO0;
|
||||
+ ret = request_firmware(&fw, fw_name, wo->hw->dev);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ trailer = (void *)(fw->data + fw->size -
|
||||
+ sizeof(struct mtk_wed_fw_trailer));
|
||||
+ dev_info(wo->hw->dev,
|
||||
+ "MTK WED WO Firmware Version: %.10s, Build Time: %.15s\n",
|
||||
+ trailer->fw_ver, trailer->build_date);
|
||||
+ dev_info(wo->hw->dev, "MTK WED WO Chip ID %02x Region %d\n",
|
||||
+ trailer->chip_id, trailer->num_region);
|
||||
+
|
||||
+ for (i = 0; i < ARRAY_SIZE(mem_region); i++) {
|
||||
+ ret = mtk_wed_mcu_run_firmware(wo, fw, &mem_region[i]);
|
||||
+ if (ret)
|
||||
+ goto out;
|
||||
+ }
|
||||
+
|
||||
+ /* set the start address */
|
||||
+ boot_cr = wo->hw->index ? MTK_WO_MCU_CFG_LS_WA_BOOT_ADDR_ADDR
|
||||
+ : MTK_WO_MCU_CFG_LS_WM_BOOT_ADDR_ADDR;
|
||||
+ wo_w32(wo, boot_cr, mem_region[MTK_WED_WO_REGION_EMI].phy_addr >> 16);
|
||||
+ /* wo firmware reset */
|
||||
+ wo_w32(wo, MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, 0xc00);
|
||||
+
|
||||
+ val = wo_r32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR);
|
||||
+ val |= wo->hw->index ? MTK_WO_MCU_CFG_LS_WF_WM_WA_WA_CPU_RSTB_MASK
|
||||
+ : MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK;
|
||||
+ wo_w32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val);
|
||||
+out:
|
||||
+ release_firmware(fw);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static u32
|
||||
+mtk_wed_mcu_read_fw_dl(struct mtk_wed_wo *wo)
|
||||
+{
|
||||
+ return wed_r32(wo->hw->wed_dev,
|
||||
+ MTK_WED_SCR0 + 4 * MTK_WED_DUMMY_CR_FWDL);
|
||||
+}
|
||||
+
|
||||
+int mtk_wed_mcu_init(struct mtk_wed_wo *wo)
|
||||
+{
|
||||
+ u32 val;
|
||||
+ int ret;
|
||||
+
|
||||
+ skb_queue_head_init(&wo->mcu.res_q);
|
||||
+ init_waitqueue_head(&wo->mcu.wait);
|
||||
+ mutex_init(&wo->mcu.mutex);
|
||||
+
|
||||
+ ret = mtk_wed_mcu_load_firmware(wo);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ return readx_poll_timeout(mtk_wed_mcu_read_fw_dl, wo, val, !val,
|
||||
+ 100, MTK_FW_DL_TIMEOUT);
|
||||
+}
|
||||
+
|
||||
+MODULE_FIRMWARE(MT7986_FIRMWARE_WO0);
|
||||
+MODULE_FIRMWARE(MT7986_FIRMWARE_WO1);
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_wed_regs.h
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_wed_regs.h
|
||||
@@ -152,6 +152,7 @@ struct mtk_wdma_desc {
|
||||
|
||||
#define MTK_WED_RING_RX(_n) (0x400 + (_n) * 0x10)
|
||||
|
||||
+#define MTK_WED_SCR0 0x3c0
|
||||
#define MTK_WED_WPDMA_INT_TRIGGER 0x504
|
||||
#define MTK_WED_WPDMA_INT_TRIGGER_RX_DONE BIT(1)
|
||||
#define MTK_WED_WPDMA_INT_TRIGGER_TX_DONE GENMASK(5, 4)
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_wed_wo.h
|
||||
@@ -0,0 +1,150 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
+/* Copyright (C) 2022 Lorenzo Bianconi <lorenzo@kernel.org> */
|
||||
+
|
||||
+#ifndef __MTK_WED_WO_H
|
||||
+#define __MTK_WED_WO_H
|
||||
+
|
||||
+#include <linux/skbuff.h>
|
||||
+#include <linux/netdevice.h>
|
||||
+
|
||||
+struct mtk_wed_hw;
|
||||
+
|
||||
+struct mtk_wed_mcu_hdr {
|
||||
+ /* DW0 */
|
||||
+ u8 version;
|
||||
+ u8 cmd;
|
||||
+ __le16 length;
|
||||
+
|
||||
+ /* DW1 */
|
||||
+ __le16 seq;
|
||||
+ __le16 flag;
|
||||
+
|
||||
+ /* DW2 */
|
||||
+ __le32 status;
|
||||
+
|
||||
+ /* DW3 */
|
||||
+ u8 rsv[20];
|
||||
+};
|
||||
+
|
||||
+struct mtk_wed_wo_log_info {
|
||||
+ __le32 sn;
|
||||
+ __le32 total;
|
||||
+ __le32 rro;
|
||||
+ __le32 mod;
|
||||
+};
|
||||
+
|
||||
+enum mtk_wed_wo_event {
|
||||
+ MTK_WED_WO_EVT_LOG_DUMP = 0x1,
|
||||
+ MTK_WED_WO_EVT_PROFILING = 0x2,
|
||||
+ MTK_WED_WO_EVT_RXCNT_INFO = 0x3,
|
||||
+};
|
||||
+
|
||||
+#define MTK_WED_MODULE_ID_WO 1
|
||||
+#define MTK_FW_DL_TIMEOUT 4000000 /* us */
|
||||
+#define MTK_WOCPU_TIMEOUT 2000000 /* us */
|
||||
+
|
||||
+enum {
|
||||
+ MTK_WED_WARP_CMD_FLAG_RSP = BIT(0),
|
||||
+ MTK_WED_WARP_CMD_FLAG_NEED_RSP = BIT(1),
|
||||
+ MTK_WED_WARP_CMD_FLAG_FROM_TO_WO = BIT(2),
|
||||
+};
|
||||
+
|
||||
+enum {
|
||||
+ MTK_WED_WO_REGION_EMI,
|
||||
+ MTK_WED_WO_REGION_ILM,
|
||||
+ MTK_WED_WO_REGION_DATA,
|
||||
+ MTK_WED_WO_REGION_BOOT,
|
||||
+ __MTK_WED_WO_REGION_MAX,
|
||||
+};
|
||||
+
|
||||
+enum mtk_wed_dummy_cr_idx {
|
||||
+ MTK_WED_DUMMY_CR_FWDL,
|
||||
+ MTK_WED_DUMMY_CR_WO_STATUS,
|
||||
+};
|
||||
+
|
||||
+#define MT7986_FIRMWARE_WO0 "mediatek/mt7986_wo_0.bin"
|
||||
+#define MT7986_FIRMWARE_WO1 "mediatek/mt7986_wo_1.bin"
|
||||
+
|
||||
+#define MTK_WO_MCU_CFG_LS_BASE 0
|
||||
+#define MTK_WO_MCU_CFG_LS_HW_VER_ADDR (MTK_WO_MCU_CFG_LS_BASE + 0x000)
|
||||
+#define MTK_WO_MCU_CFG_LS_FW_VER_ADDR (MTK_WO_MCU_CFG_LS_BASE + 0x004)
|
||||
+#define MTK_WO_MCU_CFG_LS_CFG_DBG1_ADDR (MTK_WO_MCU_CFG_LS_BASE + 0x00c)
|
||||
+#define MTK_WO_MCU_CFG_LS_CFG_DBG2_ADDR (MTK_WO_MCU_CFG_LS_BASE + 0x010)
|
||||
+#define MTK_WO_MCU_CFG_LS_WF_MCCR_ADDR (MTK_WO_MCU_CFG_LS_BASE + 0x014)
|
||||
+#define MTK_WO_MCU_CFG_LS_WF_MCCR_SET_ADDR (MTK_WO_MCU_CFG_LS_BASE + 0x018)
|
||||
+#define MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR (MTK_WO_MCU_CFG_LS_BASE + 0x01c)
|
||||
+#define MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR (MTK_WO_MCU_CFG_LS_BASE + 0x050)
|
||||
+#define MTK_WO_MCU_CFG_LS_WM_BOOT_ADDR_ADDR (MTK_WO_MCU_CFG_LS_BASE + 0x060)
|
||||
+#define MTK_WO_MCU_CFG_LS_WA_BOOT_ADDR_ADDR (MTK_WO_MCU_CFG_LS_BASE + 0x064)
|
||||
+
|
||||
+#define MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK BIT(5)
|
||||
+#define MTK_WO_MCU_CFG_LS_WF_WM_WA_WA_CPU_RSTB_MASK BIT(0)
|
||||
+
|
||||
+struct mtk_wed_wo_memory_region {
|
||||
+ const char *name;
|
||||
+ void __iomem *addr;
|
||||
+ phys_addr_t phy_addr;
|
||||
+ u32 size;
|
||||
+ bool shared:1;
|
||||
+ bool consumed:1;
|
||||
+};
|
||||
+
|
||||
+struct mtk_wed_fw_region {
|
||||
+ __le32 decomp_crc;
|
||||
+ __le32 decomp_len;
|
||||
+ __le32 decomp_blk_sz;
|
||||
+ u8 rsv0[4];
|
||||
+ __le32 addr;
|
||||
+ __le32 len;
|
||||
+ u8 feature_set;
|
||||
+ u8 rsv1[15];
|
||||
+} __packed;
|
||||
+
|
||||
+struct mtk_wed_fw_trailer {
|
||||
+ u8 chip_id;
|
||||
+ u8 eco_code;
|
||||
+ u8 num_region;
|
||||
+ u8 format_ver;
|
||||
+ u8 format_flag;
|
||||
+ u8 rsv[2];
|
||||
+ char fw_ver[10];
|
||||
+ char build_date[15];
|
||||
+ u32 crc;
|
||||
+};
|
||||
+
|
||||
+struct mtk_wed_wo {
|
||||
+ struct mtk_wed_hw *hw;
|
||||
+ struct mtk_wed_wo_memory_region boot;
|
||||
+
|
||||
+ struct {
|
||||
+ struct mutex mutex;
|
||||
+ int timeout;
|
||||
+ u16 seq;
|
||||
+
|
||||
+ struct sk_buff_head res_q;
|
||||
+ wait_queue_head_t wait;
|
||||
+ } mcu;
|
||||
+};
|
||||
+
|
||||
+static inline int
|
||||
+mtk_wed_mcu_check_msg(struct mtk_wed_wo *wo, struct sk_buff *skb)
|
||||
+{
|
||||
+ struct mtk_wed_mcu_hdr *hdr = (struct mtk_wed_mcu_hdr *)skb->data;
|
||||
+
|
||||
+ if (hdr->version)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ if (skb->len < sizeof(*hdr) || skb->len != le16_to_cpu(hdr->length))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+void mtk_wed_mcu_rx_event(struct mtk_wed_wo *wo, struct sk_buff *skb);
|
||||
+void mtk_wed_mcu_rx_unsolicited_event(struct mtk_wed_wo *wo,
|
||||
+ struct sk_buff *skb);
|
||||
+int mtk_wed_mcu_send_msg(struct mtk_wed_wo *wo, int id, int cmd,
|
||||
+ const void *data, int len, bool wait_resp);
|
||||
+int mtk_wed_mcu_init(struct mtk_wed_wo *wo);
|
||||
+
|
||||
+#endif /* __MTK_WED_WO_H */
|
||||
--- a/include/linux/soc/mediatek/mtk_wed.h
|
||||
+++ b/include/linux/soc/mediatek/mtk_wed.h
|
||||
@@ -11,6 +11,35 @@
|
||||
struct mtk_wed_hw;
|
||||
struct mtk_wdma_desc;
|
||||
|
||||
+enum mtk_wed_wo_cmd {
|
||||
+ MTK_WED_WO_CMD_WED_CFG,
|
||||
+ MTK_WED_WO_CMD_WED_RX_STAT,
|
||||
+ MTK_WED_WO_CMD_RRO_SER,
|
||||
+ MTK_WED_WO_CMD_DBG_INFO,
|
||||
+ MTK_WED_WO_CMD_DEV_INFO,
|
||||
+ MTK_WED_WO_CMD_BSS_INFO,
|
||||
+ MTK_WED_WO_CMD_STA_REC,
|
||||
+ MTK_WED_WO_CMD_DEV_INFO_DUMP,
|
||||
+ MTK_WED_WO_CMD_BSS_INFO_DUMP,
|
||||
+ MTK_WED_WO_CMD_STA_REC_DUMP,
|
||||
+ MTK_WED_WO_CMD_BA_INFO_DUMP,
|
||||
+ MTK_WED_WO_CMD_FBCMD_Q_DUMP,
|
||||
+ MTK_WED_WO_CMD_FW_LOG_CTRL,
|
||||
+ MTK_WED_WO_CMD_LOG_FLUSH,
|
||||
+ MTK_WED_WO_CMD_CHANGE_STATE,
|
||||
+ MTK_WED_WO_CMD_CPU_STATS_ENABLE,
|
||||
+ MTK_WED_WO_CMD_CPU_STATS_DUMP,
|
||||
+ MTK_WED_WO_CMD_EXCEPTION_INIT,
|
||||
+ MTK_WED_WO_CMD_PROF_CTRL,
|
||||
+ MTK_WED_WO_CMD_STA_BA_DUMP,
|
||||
+ MTK_WED_WO_CMD_BA_CTRL_DUMP,
|
||||
+ MTK_WED_WO_CMD_RXCNT_CTRL,
|
||||
+ MTK_WED_WO_CMD_RXCNT_INFO,
|
||||
+ MTK_WED_WO_CMD_SET_CAP,
|
||||
+ MTK_WED_WO_CMD_CCIF_RING_DUMP,
|
||||
+ MTK_WED_WO_CMD_WED_END
|
||||
+};
|
||||
+
|
||||
enum mtk_wed_bus_tye {
|
||||
MTK_WED_BUS_PCIE,
|
||||
MTK_WED_BUS_AXI,
|
||||
|
|
@ -0,0 +1,737 @@
|
|||
From: Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
Date: Sat, 5 Nov 2022 23:36:19 +0100
|
||||
Subject: [PATCH] net: ethernet: mtk_wed: introduce wed wo support
|
||||
|
||||
Introduce WO chip support to mtk wed driver. MTK WED WO is used to
|
||||
implement RX Wireless Ethernet Dispatch and offload traffic received by
|
||||
wlan nic to the wired interface.
|
||||
|
||||
Tested-by: Daniel Golle <daniel@makrotopia.org>
|
||||
Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com>
|
||||
Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
|
||||
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
create mode 100644 drivers/net/ethernet/mediatek/mtk_wed_wo.c
|
||||
|
||||
--- a/drivers/net/ethernet/mediatek/Makefile
|
||||
+++ b/drivers/net/ethernet/mediatek/Makefile
|
||||
@@ -5,7 +5,7 @@
|
||||
|
||||
obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o
|
||||
mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o
|
||||
-mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o mtk_wed_mcu.o
|
||||
+mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o mtk_wed_mcu.o mtk_wed_wo.o
|
||||
ifdef CONFIG_DEBUG_FS
|
||||
mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o
|
||||
endif
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_wed.c
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_wed.c
|
||||
@@ -16,6 +16,7 @@
|
||||
#include "mtk_wed_regs.h"
|
||||
#include "mtk_wed.h"
|
||||
#include "mtk_ppe.h"
|
||||
+#include "mtk_wed_wo.h"
|
||||
|
||||
#define MTK_PCIE_BASE(n) (0x1a143000 + (n) * 0x2000)
|
||||
|
||||
@@ -355,6 +356,8 @@ mtk_wed_detach(struct mtk_wed_device *de
|
||||
|
||||
mtk_wed_free_buffer(dev);
|
||||
mtk_wed_free_tx_rings(dev);
|
||||
+ if (hw->version != 1)
|
||||
+ mtk_wed_wo_deinit(hw);
|
||||
|
||||
if (dev->wlan.bus_type == MTK_WED_BUS_PCIE) {
|
||||
struct device_node *wlan_node;
|
||||
@@ -885,9 +888,11 @@ mtk_wed_attach(struct mtk_wed_device *de
|
||||
}
|
||||
|
||||
mtk_wed_hw_init_early(dev);
|
||||
- if (hw->hifsys)
|
||||
+ if (hw->version == 1)
|
||||
regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP,
|
||||
BIT(hw->index), 0);
|
||||
+ else
|
||||
+ ret = mtk_wed_wo_init(hw);
|
||||
|
||||
out:
|
||||
mutex_unlock(&hw_lock);
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_wed.h
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_wed.h
|
||||
@@ -10,6 +10,7 @@
|
||||
#include <linux/netdevice.h>
|
||||
|
||||
struct mtk_eth;
|
||||
+struct mtk_wed_wo;
|
||||
|
||||
struct mtk_wed_hw {
|
||||
struct device_node *node;
|
||||
@@ -22,6 +23,7 @@ struct mtk_wed_hw {
|
||||
struct regmap *mirror;
|
||||
struct dentry *debugfs_dir;
|
||||
struct mtk_wed_device *wed_dev;
|
||||
+ struct mtk_wed_wo *wed_wo;
|
||||
u32 debugfs_reg;
|
||||
u32 num_flows;
|
||||
u8 version;
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_wed_mcu.c
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_wed_mcu.c
|
||||
@@ -122,8 +122,7 @@ mtk_wed_mcu_skb_send_msg(struct mtk_wed_
|
||||
if (id == MTK_WED_MODULE_ID_WO)
|
||||
hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_FROM_TO_WO);
|
||||
|
||||
- dev_kfree_skb(skb);
|
||||
- return 0;
|
||||
+ return mtk_wed_wo_queue_tx_skb(wo, &wo->q_tx, skb);
|
||||
}
|
||||
|
||||
static int
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_wed_wo.c
|
||||
@@ -0,0 +1,508 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+/* Copyright (C) 2022 MediaTek Inc.
|
||||
+ *
|
||||
+ * Author: Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
+ * Sujuan Chen <sujuan.chen@mediatek.com>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/dma-mapping.h>
|
||||
+#include <linux/of_platform.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/of_address.h>
|
||||
+#include <linux/mfd/syscon.h>
|
||||
+#include <linux/of_irq.h>
|
||||
+#include <linux/bitfield.h>
|
||||
+
|
||||
+#include "mtk_wed.h"
|
||||
+#include "mtk_wed_regs.h"
|
||||
+#include "mtk_wed_wo.h"
|
||||
+
|
||||
+static u32
|
||||
+mtk_wed_mmio_r32(struct mtk_wed_wo *wo, u32 reg)
|
||||
+{
|
||||
+ u32 val;
|
||||
+
|
||||
+ if (regmap_read(wo->mmio.regs, reg, &val))
|
||||
+ val = ~0;
|
||||
+
|
||||
+ return val;
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_mmio_w32(struct mtk_wed_wo *wo, u32 reg, u32 val)
|
||||
+{
|
||||
+ regmap_write(wo->mmio.regs, reg, val);
|
||||
+}
|
||||
+
|
||||
+static u32
|
||||
+mtk_wed_wo_get_isr(struct mtk_wed_wo *wo)
|
||||
+{
|
||||
+ u32 val = mtk_wed_mmio_r32(wo, MTK_WED_WO_CCIF_RCHNUM);
|
||||
+
|
||||
+ return val & MTK_WED_WO_CCIF_RCHNUM_MASK;
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_set_isr(struct mtk_wed_wo *wo, u32 mask)
|
||||
+{
|
||||
+ mtk_wed_mmio_w32(wo, MTK_WED_WO_CCIF_IRQ0_MASK, mask);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_set_ack(struct mtk_wed_wo *wo, u32 mask)
|
||||
+{
|
||||
+ mtk_wed_mmio_w32(wo, MTK_WED_WO_CCIF_ACK, mask);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_set_isr_mask(struct mtk_wed_wo *wo, u32 mask, u32 val, bool set)
|
||||
+{
|
||||
+ unsigned long flags;
|
||||
+
|
||||
+ spin_lock_irqsave(&wo->mmio.lock, flags);
|
||||
+ wo->mmio.irq_mask &= ~mask;
|
||||
+ wo->mmio.irq_mask |= val;
|
||||
+ if (set)
|
||||
+ mtk_wed_wo_set_isr(wo, wo->mmio.irq_mask);
|
||||
+ spin_unlock_irqrestore(&wo->mmio.lock, flags);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_irq_enable(struct mtk_wed_wo *wo, u32 mask)
|
||||
+{
|
||||
+ mtk_wed_wo_set_isr_mask(wo, 0, mask, false);
|
||||
+ tasklet_schedule(&wo->mmio.irq_tasklet);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_irq_disable(struct mtk_wed_wo *wo, u32 mask)
|
||||
+{
|
||||
+ mtk_wed_wo_set_isr_mask(wo, mask, 0, true);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_kickout(struct mtk_wed_wo *wo)
|
||||
+{
|
||||
+ mtk_wed_mmio_w32(wo, MTK_WED_WO_CCIF_BUSY, 1 << MTK_WED_WO_TXCH_NUM);
|
||||
+ mtk_wed_mmio_w32(wo, MTK_WED_WO_CCIF_TCHNUM, MTK_WED_WO_TXCH_NUM);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_queue_kick(struct mtk_wed_wo *wo, struct mtk_wed_wo_queue *q,
|
||||
+ u32 val)
|
||||
+{
|
||||
+ wmb();
|
||||
+ mtk_wed_mmio_w32(wo, q->regs.cpu_idx, val);
|
||||
+}
|
||||
+
|
||||
+static void *
|
||||
+mtk_wed_wo_dequeue(struct mtk_wed_wo *wo, struct mtk_wed_wo_queue *q, u32 *len,
|
||||
+ bool flush)
|
||||
+{
|
||||
+ int buf_len = SKB_WITH_OVERHEAD(q->buf_size);
|
||||
+ int index = (q->tail + 1) % q->n_desc;
|
||||
+ struct mtk_wed_wo_queue_entry *entry;
|
||||
+ struct mtk_wed_wo_queue_desc *desc;
|
||||
+ void *buf;
|
||||
+
|
||||
+ if (!q->queued)
|
||||
+ return NULL;
|
||||
+
|
||||
+ if (flush)
|
||||
+ q->desc[index].ctrl |= cpu_to_le32(MTK_WED_WO_CTL_DMA_DONE);
|
||||
+ else if (!(q->desc[index].ctrl & cpu_to_le32(MTK_WED_WO_CTL_DMA_DONE)))
|
||||
+ return NULL;
|
||||
+
|
||||
+ q->tail = index;
|
||||
+ q->queued--;
|
||||
+
|
||||
+ desc = &q->desc[index];
|
||||
+ entry = &q->entry[index];
|
||||
+ buf = entry->buf;
|
||||
+ if (len)
|
||||
+ *len = FIELD_GET(MTK_WED_WO_CTL_SD_LEN0,
|
||||
+ le32_to_cpu(READ_ONCE(desc->ctrl)));
|
||||
+ if (buf)
|
||||
+ dma_unmap_single(wo->hw->dev, entry->addr, buf_len,
|
||||
+ DMA_FROM_DEVICE);
|
||||
+ entry->buf = NULL;
|
||||
+
|
||||
+ return buf;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+mtk_wed_wo_queue_refill(struct mtk_wed_wo *wo, struct mtk_wed_wo_queue *q,
|
||||
+ gfp_t gfp, bool rx)
|
||||
+{
|
||||
+ enum dma_data_direction dir = rx ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
|
||||
+ int n_buf = 0;
|
||||
+
|
||||
+ spin_lock_bh(&q->lock);
|
||||
+ while (q->queued < q->n_desc) {
|
||||
+ void *buf = page_frag_alloc(&q->cache, q->buf_size, gfp);
|
||||
+ struct mtk_wed_wo_queue_entry *entry;
|
||||
+ dma_addr_t addr;
|
||||
+
|
||||
+ if (!buf)
|
||||
+ break;
|
||||
+
|
||||
+ addr = dma_map_single(wo->hw->dev, buf, q->buf_size, dir);
|
||||
+ if (unlikely(dma_mapping_error(wo->hw->dev, addr))) {
|
||||
+ skb_free_frag(buf);
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ q->head = (q->head + 1) % q->n_desc;
|
||||
+ entry = &q->entry[q->head];
|
||||
+ entry->addr = addr;
|
||||
+ entry->len = q->buf_size;
|
||||
+ q->entry[q->head].buf = buf;
|
||||
+
|
||||
+ if (rx) {
|
||||
+ struct mtk_wed_wo_queue_desc *desc = &q->desc[q->head];
|
||||
+ u32 ctrl = MTK_WED_WO_CTL_LAST_SEC0 |
|
||||
+ FIELD_PREP(MTK_WED_WO_CTL_SD_LEN0,
|
||||
+ entry->len);
|
||||
+
|
||||
+ WRITE_ONCE(desc->buf0, cpu_to_le32(addr));
|
||||
+ WRITE_ONCE(desc->ctrl, cpu_to_le32(ctrl));
|
||||
+ }
|
||||
+ q->queued++;
|
||||
+ n_buf++;
|
||||
+ }
|
||||
+ spin_unlock_bh(&q->lock);
|
||||
+
|
||||
+ return n_buf;
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_rx_complete(struct mtk_wed_wo *wo)
|
||||
+{
|
||||
+ mtk_wed_wo_set_ack(wo, MTK_WED_WO_RXCH_INT_MASK);
|
||||
+ mtk_wed_wo_irq_enable(wo, MTK_WED_WO_RXCH_INT_MASK);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_rx_run_queue(struct mtk_wed_wo *wo, struct mtk_wed_wo_queue *q)
|
||||
+{
|
||||
+ for (;;) {
|
||||
+ struct mtk_wed_mcu_hdr *hdr;
|
||||
+ struct sk_buff *skb;
|
||||
+ void *data;
|
||||
+ u32 len;
|
||||
+
|
||||
+ data = mtk_wed_wo_dequeue(wo, q, &len, false);
|
||||
+ if (!data)
|
||||
+ break;
|
||||
+
|
||||
+ skb = build_skb(data, q->buf_size);
|
||||
+ if (!skb) {
|
||||
+ skb_free_frag(data);
|
||||
+ continue;
|
||||
+ }
|
||||
+
|
||||
+ __skb_put(skb, len);
|
||||
+ if (mtk_wed_mcu_check_msg(wo, skb)) {
|
||||
+ dev_kfree_skb(skb);
|
||||
+ continue;
|
||||
+ }
|
||||
+
|
||||
+ hdr = (struct mtk_wed_mcu_hdr *)skb->data;
|
||||
+ if (hdr->flag & cpu_to_le16(MTK_WED_WARP_CMD_FLAG_RSP))
|
||||
+ mtk_wed_mcu_rx_event(wo, skb);
|
||||
+ else
|
||||
+ mtk_wed_mcu_rx_unsolicited_event(wo, skb);
|
||||
+ }
|
||||
+
|
||||
+ if (mtk_wed_wo_queue_refill(wo, q, GFP_ATOMIC, true)) {
|
||||
+ u32 index = (q->head - 1) % q->n_desc;
|
||||
+
|
||||
+ mtk_wed_wo_queue_kick(wo, q, index);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static irqreturn_t
|
||||
+mtk_wed_wo_irq_handler(int irq, void *data)
|
||||
+{
|
||||
+ struct mtk_wed_wo *wo = data;
|
||||
+
|
||||
+ mtk_wed_wo_set_isr(wo, 0);
|
||||
+ tasklet_schedule(&wo->mmio.irq_tasklet);
|
||||
+
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+static void mtk_wed_wo_irq_tasklet(struct tasklet_struct *t)
|
||||
+{
|
||||
+ struct mtk_wed_wo *wo = from_tasklet(wo, t, mmio.irq_tasklet);
|
||||
+ u32 intr, mask;
|
||||
+
|
||||
+ /* disable interrupts */
|
||||
+ mtk_wed_wo_set_isr(wo, 0);
|
||||
+
|
||||
+ intr = mtk_wed_wo_get_isr(wo);
|
||||
+ intr &= wo->mmio.irq_mask;
|
||||
+ mask = intr & (MTK_WED_WO_RXCH_INT_MASK | MTK_WED_WO_EXCEPTION_INT_MASK);
|
||||
+ mtk_wed_wo_irq_disable(wo, mask);
|
||||
+
|
||||
+ if (intr & MTK_WED_WO_RXCH_INT_MASK) {
|
||||
+ mtk_wed_wo_rx_run_queue(wo, &wo->q_rx);
|
||||
+ mtk_wed_wo_rx_complete(wo);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+/* mtk wed wo hw queues */
|
||||
+
|
||||
+static int
|
||||
+mtk_wed_wo_queue_alloc(struct mtk_wed_wo *wo, struct mtk_wed_wo_queue *q,
|
||||
+ int n_desc, int buf_size, int index,
|
||||
+ struct mtk_wed_wo_queue_regs *regs)
|
||||
+{
|
||||
+ spin_lock_init(&q->lock);
|
||||
+ q->regs = *regs;
|
||||
+ q->n_desc = n_desc;
|
||||
+ q->buf_size = buf_size;
|
||||
+
|
||||
+ q->desc = dmam_alloc_coherent(wo->hw->dev, n_desc * sizeof(*q->desc),
|
||||
+ &q->desc_dma, GFP_KERNEL);
|
||||
+ if (!q->desc)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ q->entry = devm_kzalloc(wo->hw->dev, n_desc * sizeof(*q->entry),
|
||||
+ GFP_KERNEL);
|
||||
+ if (!q->entry)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_queue_free(struct mtk_wed_wo *wo, struct mtk_wed_wo_queue *q)
|
||||
+{
|
||||
+ mtk_wed_mmio_w32(wo, q->regs.cpu_idx, 0);
|
||||
+ dma_free_coherent(wo->hw->dev, q->n_desc * sizeof(*q->desc), q->desc,
|
||||
+ q->desc_dma);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_queue_tx_clean(struct mtk_wed_wo *wo, struct mtk_wed_wo_queue *q)
|
||||
+{
|
||||
+ struct page *page;
|
||||
+ int i;
|
||||
+
|
||||
+ spin_lock_bh(&q->lock);
|
||||
+ for (i = 0; i < q->n_desc; i++) {
|
||||
+ struct mtk_wed_wo_queue_entry *entry = &q->entry[i];
|
||||
+
|
||||
+ dma_unmap_single(wo->hw->dev, entry->addr, entry->len,
|
||||
+ DMA_TO_DEVICE);
|
||||
+ skb_free_frag(entry->buf);
|
||||
+ entry->buf = NULL;
|
||||
+ }
|
||||
+ spin_unlock_bh(&q->lock);
|
||||
+
|
||||
+ if (!q->cache.va)
|
||||
+ return;
|
||||
+
|
||||
+ page = virt_to_page(q->cache.va);
|
||||
+ __page_frag_cache_drain(page, q->cache.pagecnt_bias);
|
||||
+ memset(&q->cache, 0, sizeof(q->cache));
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_queue_rx_clean(struct mtk_wed_wo *wo, struct mtk_wed_wo_queue *q)
|
||||
+{
|
||||
+ struct page *page;
|
||||
+
|
||||
+ spin_lock_bh(&q->lock);
|
||||
+ for (;;) {
|
||||
+ void *buf = mtk_wed_wo_dequeue(wo, q, NULL, true);
|
||||
+
|
||||
+ if (!buf)
|
||||
+ break;
|
||||
+
|
||||
+ skb_free_frag(buf);
|
||||
+ }
|
||||
+ spin_unlock_bh(&q->lock);
|
||||
+
|
||||
+ if (!q->cache.va)
|
||||
+ return;
|
||||
+
|
||||
+ page = virt_to_page(q->cache.va);
|
||||
+ __page_frag_cache_drain(page, q->cache.pagecnt_bias);
|
||||
+ memset(&q->cache, 0, sizeof(q->cache));
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_queue_reset(struct mtk_wed_wo *wo, struct mtk_wed_wo_queue *q)
|
||||
+{
|
||||
+ mtk_wed_mmio_w32(wo, q->regs.cpu_idx, 0);
|
||||
+ mtk_wed_mmio_w32(wo, q->regs.desc_base, q->desc_dma);
|
||||
+ mtk_wed_mmio_w32(wo, q->regs.ring_size, q->n_desc);
|
||||
+}
|
||||
+
|
||||
+int mtk_wed_wo_queue_tx_skb(struct mtk_wed_wo *wo, struct mtk_wed_wo_queue *q,
|
||||
+ struct sk_buff *skb)
|
||||
+{
|
||||
+ struct mtk_wed_wo_queue_entry *entry;
|
||||
+ struct mtk_wed_wo_queue_desc *desc;
|
||||
+ int ret = 0, index;
|
||||
+ u32 ctrl;
|
||||
+
|
||||
+ spin_lock_bh(&q->lock);
|
||||
+
|
||||
+ q->tail = mtk_wed_mmio_r32(wo, q->regs.dma_idx);
|
||||
+ index = (q->head + 1) % q->n_desc;
|
||||
+ if (q->tail == index) {
|
||||
+ ret = -ENOMEM;
|
||||
+ goto out;
|
||||
+ }
|
||||
+
|
||||
+ entry = &q->entry[index];
|
||||
+ if (skb->len > entry->len) {
|
||||
+ ret = -ENOMEM;
|
||||
+ goto out;
|
||||
+ }
|
||||
+
|
||||
+ desc = &q->desc[index];
|
||||
+ q->head = index;
|
||||
+
|
||||
+ dma_sync_single_for_cpu(wo->hw->dev, entry->addr, skb->len,
|
||||
+ DMA_TO_DEVICE);
|
||||
+ memcpy(entry->buf, skb->data, skb->len);
|
||||
+ dma_sync_single_for_device(wo->hw->dev, entry->addr, skb->len,
|
||||
+ DMA_TO_DEVICE);
|
||||
+
|
||||
+ ctrl = FIELD_PREP(MTK_WED_WO_CTL_SD_LEN0, skb->len) |
|
||||
+ MTK_WED_WO_CTL_LAST_SEC0 | MTK_WED_WO_CTL_DMA_DONE;
|
||||
+ WRITE_ONCE(desc->buf0, cpu_to_le32(entry->addr));
|
||||
+ WRITE_ONCE(desc->ctrl, cpu_to_le32(ctrl));
|
||||
+
|
||||
+ mtk_wed_wo_queue_kick(wo, q, q->head);
|
||||
+ mtk_wed_wo_kickout(wo);
|
||||
+out:
|
||||
+ spin_unlock_bh(&q->lock);
|
||||
+
|
||||
+ dev_kfree_skb(skb);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+mtk_wed_wo_exception_init(struct mtk_wed_wo *wo)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+mtk_wed_wo_hardware_init(struct mtk_wed_wo *wo)
|
||||
+{
|
||||
+ struct mtk_wed_wo_queue_regs regs;
|
||||
+ struct device_node *np;
|
||||
+ int ret;
|
||||
+
|
||||
+ np = of_parse_phandle(wo->hw->node, "mediatek,wo-ccif", 0);
|
||||
+ if (!np)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ wo->mmio.regs = syscon_regmap_lookup_by_phandle(np, NULL);
|
||||
+ if (IS_ERR_OR_NULL(wo->mmio.regs))
|
||||
+ return PTR_ERR(wo->mmio.regs);
|
||||
+
|
||||
+ wo->mmio.irq = irq_of_parse_and_map(np, 0);
|
||||
+ wo->mmio.irq_mask = MTK_WED_WO_ALL_INT_MASK;
|
||||
+ spin_lock_init(&wo->mmio.lock);
|
||||
+ tasklet_setup(&wo->mmio.irq_tasklet, mtk_wed_wo_irq_tasklet);
|
||||
+
|
||||
+ ret = devm_request_irq(wo->hw->dev, wo->mmio.irq,
|
||||
+ mtk_wed_wo_irq_handler, IRQF_TRIGGER_HIGH,
|
||||
+ KBUILD_MODNAME, wo);
|
||||
+ if (ret)
|
||||
+ goto error;
|
||||
+
|
||||
+ regs.desc_base = MTK_WED_WO_CCIF_DUMMY1;
|
||||
+ regs.ring_size = MTK_WED_WO_CCIF_DUMMY2;
|
||||
+ regs.dma_idx = MTK_WED_WO_CCIF_SHADOW4;
|
||||
+ regs.cpu_idx = MTK_WED_WO_CCIF_DUMMY3;
|
||||
+
|
||||
+ ret = mtk_wed_wo_queue_alloc(wo, &wo->q_tx, MTK_WED_WO_RING_SIZE,
|
||||
+ MTK_WED_WO_CMD_LEN, MTK_WED_WO_TXCH_NUM,
|
||||
+ ®s);
|
||||
+ if (ret)
|
||||
+ goto error;
|
||||
+
|
||||
+ mtk_wed_wo_queue_refill(wo, &wo->q_tx, GFP_KERNEL, false);
|
||||
+ mtk_wed_wo_queue_reset(wo, &wo->q_tx);
|
||||
+
|
||||
+ regs.desc_base = MTK_WED_WO_CCIF_DUMMY5;
|
||||
+ regs.ring_size = MTK_WED_WO_CCIF_DUMMY6;
|
||||
+ regs.dma_idx = MTK_WED_WO_CCIF_SHADOW8;
|
||||
+ regs.cpu_idx = MTK_WED_WO_CCIF_DUMMY7;
|
||||
+
|
||||
+ ret = mtk_wed_wo_queue_alloc(wo, &wo->q_rx, MTK_WED_WO_RING_SIZE,
|
||||
+ MTK_WED_WO_CMD_LEN, MTK_WED_WO_RXCH_NUM,
|
||||
+ ®s);
|
||||
+ if (ret)
|
||||
+ goto error;
|
||||
+
|
||||
+ mtk_wed_wo_queue_refill(wo, &wo->q_rx, GFP_KERNEL, true);
|
||||
+ mtk_wed_wo_queue_reset(wo, &wo->q_rx);
|
||||
+
|
||||
+ /* rx queue irqmask */
|
||||
+ mtk_wed_wo_set_isr(wo, wo->mmio.irq_mask);
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+error:
|
||||
+ devm_free_irq(wo->hw->dev, wo->mmio.irq, wo);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+mtk_wed_wo_hw_deinit(struct mtk_wed_wo *wo)
|
||||
+{
|
||||
+ /* disable interrupts */
|
||||
+ mtk_wed_wo_set_isr(wo, 0);
|
||||
+
|
||||
+ tasklet_disable(&wo->mmio.irq_tasklet);
|
||||
+
|
||||
+ disable_irq(wo->mmio.irq);
|
||||
+ devm_free_irq(wo->hw->dev, wo->mmio.irq, wo);
|
||||
+
|
||||
+ mtk_wed_wo_queue_tx_clean(wo, &wo->q_tx);
|
||||
+ mtk_wed_wo_queue_rx_clean(wo, &wo->q_rx);
|
||||
+ mtk_wed_wo_queue_free(wo, &wo->q_tx);
|
||||
+ mtk_wed_wo_queue_free(wo, &wo->q_rx);
|
||||
+}
|
||||
+
|
||||
+int mtk_wed_wo_init(struct mtk_wed_hw *hw)
|
||||
+{
|
||||
+ struct mtk_wed_wo *wo;
|
||||
+ int ret;
|
||||
+
|
||||
+ wo = devm_kzalloc(hw->dev, sizeof(*wo), GFP_KERNEL);
|
||||
+ if (!wo)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ hw->wed_wo = wo;
|
||||
+ wo->hw = hw;
|
||||
+
|
||||
+ ret = mtk_wed_wo_hardware_init(wo);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = mtk_wed_mcu_init(wo);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ return mtk_wed_wo_exception_init(wo);
|
||||
+}
|
||||
+
|
||||
+void mtk_wed_wo_deinit(struct mtk_wed_hw *hw)
|
||||
+{
|
||||
+ struct mtk_wed_wo *wo = hw->wed_wo;
|
||||
+
|
||||
+ mtk_wed_wo_hw_deinit(wo);
|
||||
+}
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_wed_wo.h
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_wed_wo.h
|
||||
@@ -80,6 +80,54 @@ enum mtk_wed_dummy_cr_idx {
|
||||
#define MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK BIT(5)
|
||||
#define MTK_WO_MCU_CFG_LS_WF_WM_WA_WA_CPU_RSTB_MASK BIT(0)
|
||||
|
||||
+#define MTK_WED_WO_RING_SIZE 256
|
||||
+#define MTK_WED_WO_CMD_LEN 1504
|
||||
+
|
||||
+#define MTK_WED_WO_TXCH_NUM 0
|
||||
+#define MTK_WED_WO_RXCH_NUM 1
|
||||
+#define MTK_WED_WO_RXCH_WO_EXCEPTION 7
|
||||
+
|
||||
+#define MTK_WED_WO_TXCH_INT_MASK BIT(0)
|
||||
+#define MTK_WED_WO_RXCH_INT_MASK BIT(1)
|
||||
+#define MTK_WED_WO_EXCEPTION_INT_MASK BIT(7)
|
||||
+#define MTK_WED_WO_ALL_INT_MASK (MTK_WED_WO_RXCH_INT_MASK | \
|
||||
+ MTK_WED_WO_EXCEPTION_INT_MASK)
|
||||
+
|
||||
+#define MTK_WED_WO_CCIF_BUSY 0x004
|
||||
+#define MTK_WED_WO_CCIF_START 0x008
|
||||
+#define MTK_WED_WO_CCIF_TCHNUM 0x00c
|
||||
+#define MTK_WED_WO_CCIF_RCHNUM 0x010
|
||||
+#define MTK_WED_WO_CCIF_RCHNUM_MASK GENMASK(7, 0)
|
||||
+
|
||||
+#define MTK_WED_WO_CCIF_ACK 0x014
|
||||
+#define MTK_WED_WO_CCIF_IRQ0_MASK 0x018
|
||||
+#define MTK_WED_WO_CCIF_IRQ1_MASK 0x01c
|
||||
+#define MTK_WED_WO_CCIF_DUMMY1 0x020
|
||||
+#define MTK_WED_WO_CCIF_DUMMY2 0x024
|
||||
+#define MTK_WED_WO_CCIF_DUMMY3 0x028
|
||||
+#define MTK_WED_WO_CCIF_DUMMY4 0x02c
|
||||
+#define MTK_WED_WO_CCIF_SHADOW1 0x030
|
||||
+#define MTK_WED_WO_CCIF_SHADOW2 0x034
|
||||
+#define MTK_WED_WO_CCIF_SHADOW3 0x038
|
||||
+#define MTK_WED_WO_CCIF_SHADOW4 0x03c
|
||||
+#define MTK_WED_WO_CCIF_DUMMY5 0x050
|
||||
+#define MTK_WED_WO_CCIF_DUMMY6 0x054
|
||||
+#define MTK_WED_WO_CCIF_DUMMY7 0x058
|
||||
+#define MTK_WED_WO_CCIF_DUMMY8 0x05c
|
||||
+#define MTK_WED_WO_CCIF_SHADOW5 0x060
|
||||
+#define MTK_WED_WO_CCIF_SHADOW6 0x064
|
||||
+#define MTK_WED_WO_CCIF_SHADOW7 0x068
|
||||
+#define MTK_WED_WO_CCIF_SHADOW8 0x06c
|
||||
+
|
||||
+#define MTK_WED_WO_CTL_SD_LEN1 GENMASK(13, 0)
|
||||
+#define MTK_WED_WO_CTL_LAST_SEC1 BIT(14)
|
||||
+#define MTK_WED_WO_CTL_BURST BIT(15)
|
||||
+#define MTK_WED_WO_CTL_SD_LEN0_SHIFT 16
|
||||
+#define MTK_WED_WO_CTL_SD_LEN0 GENMASK(29, 16)
|
||||
+#define MTK_WED_WO_CTL_LAST_SEC0 BIT(30)
|
||||
+#define MTK_WED_WO_CTL_DMA_DONE BIT(31)
|
||||
+#define MTK_WED_WO_INFO_WINFO GENMASK(15, 0)
|
||||
+
|
||||
struct mtk_wed_wo_memory_region {
|
||||
const char *name;
|
||||
void __iomem *addr;
|
||||
@@ -112,10 +160,53 @@ struct mtk_wed_fw_trailer {
|
||||
u32 crc;
|
||||
};
|
||||
|
||||
+struct mtk_wed_wo_queue_regs {
|
||||
+ u32 desc_base;
|
||||
+ u32 ring_size;
|
||||
+ u32 cpu_idx;
|
||||
+ u32 dma_idx;
|
||||
+};
|
||||
+
|
||||
+struct mtk_wed_wo_queue_desc {
|
||||
+ __le32 buf0;
|
||||
+ __le32 ctrl;
|
||||
+ __le32 buf1;
|
||||
+ __le32 info;
|
||||
+ __le32 reserved[4];
|
||||
+} __packed __aligned(32);
|
||||
+
|
||||
+struct mtk_wed_wo_queue_entry {
|
||||
+ dma_addr_t addr;
|
||||
+ void *buf;
|
||||
+ u32 len;
|
||||
+};
|
||||
+
|
||||
+struct mtk_wed_wo_queue {
|
||||
+ struct mtk_wed_wo_queue_regs regs;
|
||||
+
|
||||
+ struct page_frag_cache cache;
|
||||
+ spinlock_t lock;
|
||||
+
|
||||
+ struct mtk_wed_wo_queue_desc *desc;
|
||||
+ dma_addr_t desc_dma;
|
||||
+
|
||||
+ struct mtk_wed_wo_queue_entry *entry;
|
||||
+
|
||||
+ u16 head;
|
||||
+ u16 tail;
|
||||
+ int n_desc;
|
||||
+ int queued;
|
||||
+ int buf_size;
|
||||
+
|
||||
+};
|
||||
+
|
||||
struct mtk_wed_wo {
|
||||
struct mtk_wed_hw *hw;
|
||||
struct mtk_wed_wo_memory_region boot;
|
||||
|
||||
+ struct mtk_wed_wo_queue q_tx;
|
||||
+ struct mtk_wed_wo_queue q_rx;
|
||||
+
|
||||
struct {
|
||||
struct mutex mutex;
|
||||
int timeout;
|
||||
@@ -124,6 +215,15 @@ struct mtk_wed_wo {
|
||||
struct sk_buff_head res_q;
|
||||
wait_queue_head_t wait;
|
||||
} mcu;
|
||||
+
|
||||
+ struct {
|
||||
+ struct regmap *regs;
|
||||
+
|
||||
+ spinlock_t lock;
|
||||
+ struct tasklet_struct irq_tasklet;
|
||||
+ int irq;
|
||||
+ u32 irq_mask;
|
||||
+ } mmio;
|
||||
};
|
||||
|
||||
static inline int
|
||||
@@ -146,5 +246,9 @@ void mtk_wed_mcu_rx_unsolicited_event(st
|
||||
int mtk_wed_mcu_send_msg(struct mtk_wed_wo *wo, int id, int cmd,
|
||||
const void *data, int len, bool wait_resp);
|
||||
int mtk_wed_mcu_init(struct mtk_wed_wo *wo);
|
||||
+int mtk_wed_wo_init(struct mtk_wed_hw *hw);
|
||||
+void mtk_wed_wo_deinit(struct mtk_wed_hw *hw);
|
||||
+int mtk_wed_wo_queue_tx_skb(struct mtk_wed_wo *dev, struct mtk_wed_wo_queue *q,
|
||||
+ struct sk_buff *skb);
|
||||
|
||||
#endif /* __MTK_WED_WO_H */
|
||||
|
|
@ -0,0 +1,79 @@
|
|||
From: Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
Date: Sat, 5 Nov 2022 23:36:20 +0100
|
||||
Subject: [PATCH] net: ethernet: mtk_wed: rename tx_wdma array in rx_wdma
|
||||
|
||||
Rename tx_wdma queue array in rx_wdma since this is rx side of wdma soc.
|
||||
Moreover rename mtk_wed_wdma_ring_setup routine in
|
||||
mtk_wed_wdma_rx_ring_setup()
|
||||
|
||||
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_wed.c
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_wed.c
|
||||
@@ -253,8 +253,8 @@ mtk_wed_free_tx_rings(struct mtk_wed_dev
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(dev->tx_ring); i++)
|
||||
mtk_wed_free_ring(dev, &dev->tx_ring[i]);
|
||||
- for (i = 0; i < ARRAY_SIZE(dev->tx_wdma); i++)
|
||||
- mtk_wed_free_ring(dev, &dev->tx_wdma[i]);
|
||||
+ for (i = 0; i < ARRAY_SIZE(dev->rx_wdma); i++)
|
||||
+ mtk_wed_free_ring(dev, &dev->rx_wdma[i]);
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -695,10 +695,10 @@ mtk_wed_ring_alloc(struct mtk_wed_device
|
||||
}
|
||||
|
||||
static int
|
||||
-mtk_wed_wdma_ring_setup(struct mtk_wed_device *dev, int idx, int size)
|
||||
+mtk_wed_wdma_rx_ring_setup(struct mtk_wed_device *dev, int idx, int size)
|
||||
{
|
||||
u32 desc_size = sizeof(struct mtk_wdma_desc) * dev->hw->version;
|
||||
- struct mtk_wed_ring *wdma = &dev->tx_wdma[idx];
|
||||
+ struct mtk_wed_ring *wdma = &dev->rx_wdma[idx];
|
||||
|
||||
if (mtk_wed_ring_alloc(dev, wdma, MTK_WED_WDMA_RING_SIZE, desc_size))
|
||||
return -ENOMEM;
|
||||
@@ -812,9 +812,9 @@ mtk_wed_start(struct mtk_wed_device *dev
|
||||
{
|
||||
int i;
|
||||
|
||||
- for (i = 0; i < ARRAY_SIZE(dev->tx_wdma); i++)
|
||||
- if (!dev->tx_wdma[i].desc)
|
||||
- mtk_wed_wdma_ring_setup(dev, i, 16);
|
||||
+ for (i = 0; i < ARRAY_SIZE(dev->rx_wdma); i++)
|
||||
+ if (!dev->rx_wdma[i].desc)
|
||||
+ mtk_wed_wdma_rx_ring_setup(dev, i, 16);
|
||||
|
||||
mtk_wed_hw_init(dev);
|
||||
mtk_wed_configure_irq(dev, irq_mask);
|
||||
@@ -923,7 +923,7 @@ mtk_wed_tx_ring_setup(struct mtk_wed_dev
|
||||
sizeof(*ring->desc)))
|
||||
return -ENOMEM;
|
||||
|
||||
- if (mtk_wed_wdma_ring_setup(dev, idx, MTK_WED_WDMA_RING_SIZE))
|
||||
+ if (mtk_wed_wdma_rx_ring_setup(dev, idx, MTK_WED_WDMA_RING_SIZE))
|
||||
return -ENOMEM;
|
||||
|
||||
ring->reg_base = MTK_WED_RING_TX(idx);
|
||||
--- a/include/linux/soc/mediatek/mtk_wed.h
|
||||
+++ b/include/linux/soc/mediatek/mtk_wed.h
|
||||
@@ -7,6 +7,7 @@
|
||||
#include <linux/pci.h>
|
||||
|
||||
#define MTK_WED_TX_QUEUES 2
|
||||
+#define MTK_WED_RX_QUEUES 2
|
||||
|
||||
struct mtk_wed_hw;
|
||||
struct mtk_wdma_desc;
|
||||
@@ -66,7 +67,7 @@ struct mtk_wed_device {
|
||||
|
||||
struct mtk_wed_ring tx_ring[MTK_WED_TX_QUEUES];
|
||||
struct mtk_wed_ring txfree_ring;
|
||||
- struct mtk_wed_ring tx_wdma[MTK_WED_TX_QUEUES];
|
||||
+ struct mtk_wed_ring rx_wdma[MTK_WED_RX_QUEUES];
|
||||
|
||||
struct {
|
||||
int size;
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,149 @@
|
|||
From: Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
Date: Sat, 5 Nov 2022 23:36:22 +0100
|
||||
Subject: [PATCH] net: ethernet: mtk_wed: add rx mib counters
|
||||
|
||||
Introduce WED RX MIB counters support available on MT7986a SoC.
|
||||
|
||||
Tested-by: Daniel Golle <daniel@makrotopia.org>
|
||||
Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com>
|
||||
Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
|
||||
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_wed_debugfs.c
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_wed_debugfs.c
|
||||
@@ -2,6 +2,7 @@
|
||||
/* Copyright (C) 2021 Felix Fietkau <nbd@nbd.name> */
|
||||
|
||||
#include <linux/seq_file.h>
|
||||
+#include <linux/soc/mediatek/mtk_wed.h>
|
||||
#include "mtk_wed.h"
|
||||
#include "mtk_wed_regs.h"
|
||||
|
||||
@@ -18,6 +19,8 @@ enum {
|
||||
DUMP_TYPE_WDMA,
|
||||
DUMP_TYPE_WPDMA_TX,
|
||||
DUMP_TYPE_WPDMA_TXFREE,
|
||||
+ DUMP_TYPE_WPDMA_RX,
|
||||
+ DUMP_TYPE_WED_RRO,
|
||||
};
|
||||
|
||||
#define DUMP_STR(_str) { _str, 0, DUMP_TYPE_STRING }
|
||||
@@ -36,6 +39,9 @@ enum {
|
||||
|
||||
#define DUMP_WPDMA_TX_RING(_n) DUMP_RING("WPDMA_TX" #_n, 0, DUMP_TYPE_WPDMA_TX, _n)
|
||||
#define DUMP_WPDMA_TXFREE_RING DUMP_RING("WPDMA_RX1", 0, DUMP_TYPE_WPDMA_TXFREE)
|
||||
+#define DUMP_WPDMA_RX_RING(_n) DUMP_RING("WPDMA_RX" #_n, 0, DUMP_TYPE_WPDMA_RX, _n)
|
||||
+#define DUMP_WED_RRO_RING(_base)DUMP_RING("WED_RRO_MIOD", MTK_##_base, DUMP_TYPE_WED_RRO)
|
||||
+#define DUMP_WED_RRO_FDBK(_base)DUMP_RING("WED_RRO_FDBK", MTK_##_base, DUMP_TYPE_WED_RRO)
|
||||
|
||||
static void
|
||||
print_reg_val(struct seq_file *s, const char *name, u32 val)
|
||||
@@ -57,6 +63,7 @@ dump_wed_regs(struct seq_file *s, struct
|
||||
cur > regs ? "\n" : "",
|
||||
cur->name);
|
||||
continue;
|
||||
+ case DUMP_TYPE_WED_RRO:
|
||||
case DUMP_TYPE_WED:
|
||||
val = wed_r32(dev, cur->offset);
|
||||
break;
|
||||
@@ -69,6 +76,9 @@ dump_wed_regs(struct seq_file *s, struct
|
||||
case DUMP_TYPE_WPDMA_TXFREE:
|
||||
val = wpdma_txfree_r32(dev, cur->offset);
|
||||
break;
|
||||
+ case DUMP_TYPE_WPDMA_RX:
|
||||
+ val = wpdma_rx_r32(dev, cur->base, cur->offset);
|
||||
+ break;
|
||||
}
|
||||
print_reg_val(s, cur->name, val);
|
||||
}
|
||||
@@ -132,6 +142,80 @@ wed_txinfo_show(struct seq_file *s, void
|
||||
}
|
||||
DEFINE_SHOW_ATTRIBUTE(wed_txinfo);
|
||||
|
||||
+static int
|
||||
+wed_rxinfo_show(struct seq_file *s, void *data)
|
||||
+{
|
||||
+ static const struct reg_dump regs[] = {
|
||||
+ DUMP_STR("WPDMA RX"),
|
||||
+ DUMP_WPDMA_RX_RING(0),
|
||||
+ DUMP_WPDMA_RX_RING(1),
|
||||
+
|
||||
+ DUMP_STR("WPDMA RX"),
|
||||
+ DUMP_WED(WED_WPDMA_RX_D_MIB(0)),
|
||||
+ DUMP_WED_RING(WED_WPDMA_RING_RX_DATA(0)),
|
||||
+ DUMP_WED(WED_WPDMA_RX_D_PROCESSED_MIB(0)),
|
||||
+ DUMP_WED(WED_WPDMA_RX_D_MIB(1)),
|
||||
+ DUMP_WED_RING(WED_WPDMA_RING_RX_DATA(1)),
|
||||
+ DUMP_WED(WED_WPDMA_RX_D_PROCESSED_MIB(1)),
|
||||
+ DUMP_WED(WED_WPDMA_RX_D_COHERENT_MIB),
|
||||
+
|
||||
+ DUMP_STR("WED RX"),
|
||||
+ DUMP_WED_RING(WED_RING_RX_DATA(0)),
|
||||
+ DUMP_WED_RING(WED_RING_RX_DATA(1)),
|
||||
+
|
||||
+ DUMP_STR("WED RRO"),
|
||||
+ DUMP_WED_RRO_RING(WED_RROQM_MIOD_CTRL0),
|
||||
+ DUMP_WED(WED_RROQM_MID_MIB),
|
||||
+ DUMP_WED(WED_RROQM_MOD_MIB),
|
||||
+ DUMP_WED(WED_RROQM_MOD_COHERENT_MIB),
|
||||
+ DUMP_WED_RRO_FDBK(WED_RROQM_FDBK_CTRL0),
|
||||
+ DUMP_WED(WED_RROQM_FDBK_IND_MIB),
|
||||
+ DUMP_WED(WED_RROQM_FDBK_ENQ_MIB),
|
||||
+ DUMP_WED(WED_RROQM_FDBK_ANC_MIB),
|
||||
+ DUMP_WED(WED_RROQM_FDBK_ANC2H_MIB),
|
||||
+
|
||||
+ DUMP_STR("WED Route QM"),
|
||||
+ DUMP_WED(WED_RTQM_R2H_MIB(0)),
|
||||
+ DUMP_WED(WED_RTQM_R2Q_MIB(0)),
|
||||
+ DUMP_WED(WED_RTQM_Q2H_MIB(0)),
|
||||
+ DUMP_WED(WED_RTQM_R2H_MIB(1)),
|
||||
+ DUMP_WED(WED_RTQM_R2Q_MIB(1)),
|
||||
+ DUMP_WED(WED_RTQM_Q2H_MIB(1)),
|
||||
+ DUMP_WED(WED_RTQM_Q2N_MIB),
|
||||
+ DUMP_WED(WED_RTQM_Q2B_MIB),
|
||||
+ DUMP_WED(WED_RTQM_PFDBK_MIB),
|
||||
+
|
||||
+ DUMP_STR("WED WDMA TX"),
|
||||
+ DUMP_WED(WED_WDMA_TX_MIB),
|
||||
+ DUMP_WED_RING(WED_WDMA_RING_TX),
|
||||
+
|
||||
+ DUMP_STR("WDMA TX"),
|
||||
+ DUMP_WDMA(WDMA_GLO_CFG),
|
||||
+ DUMP_WDMA_RING(WDMA_RING_TX(0)),
|
||||
+ DUMP_WDMA_RING(WDMA_RING_TX(1)),
|
||||
+
|
||||
+ DUMP_STR("WED RX BM"),
|
||||
+ DUMP_WED(WED_RX_BM_BASE),
|
||||
+ DUMP_WED(WED_RX_BM_RX_DMAD),
|
||||
+ DUMP_WED(WED_RX_BM_PTR),
|
||||
+ DUMP_WED(WED_RX_BM_TKID_MIB),
|
||||
+ DUMP_WED(WED_RX_BM_BLEN),
|
||||
+ DUMP_WED(WED_RX_BM_STS),
|
||||
+ DUMP_WED(WED_RX_BM_INTF2),
|
||||
+ DUMP_WED(WED_RX_BM_INTF),
|
||||
+ DUMP_WED(WED_RX_BM_ERR_STS),
|
||||
+ };
|
||||
+ struct mtk_wed_hw *hw = s->private;
|
||||
+ struct mtk_wed_device *dev = hw->wed_dev;
|
||||
+
|
||||
+ if (!dev)
|
||||
+ return 0;
|
||||
+
|
||||
+ dump_wed_regs(s, dev, regs, ARRAY_SIZE(regs));
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+DEFINE_SHOW_ATTRIBUTE(wed_rxinfo);
|
||||
|
||||
static int
|
||||
mtk_wed_reg_set(void *data, u64 val)
|
||||
@@ -175,4 +259,7 @@ void mtk_wed_hw_add_debugfs(struct mtk_w
|
||||
debugfs_create_u32("regidx", 0600, dir, &hw->debugfs_reg);
|
||||
debugfs_create_file_unsafe("regval", 0600, dir, hw, &fops_regval);
|
||||
debugfs_create_file_unsafe("txinfo", 0400, dir, hw, &wed_txinfo_fops);
|
||||
+ if (hw->version != 1)
|
||||
+ debugfs_create_file_unsafe("rxinfo", 0400, dir, hw,
|
||||
+ &wed_rxinfo_fops);
|
||||
}
|
||||
|
|
@ -113,7 +113,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
|
|||
|
||||
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
|
||||
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
|
||||
@@ -356,9 +356,12 @@
|
||||
@@ -355,9 +355,12 @@
|
||||
#define PHY_IAC_ADDR_MASK GENMASK(24, 20)
|
||||
#define PHY_IAC_ADDR(x) FIELD_PREP(PHY_IAC_ADDR_MASK, (x))
|
||||
#define PHY_IAC_CMD_MASK GENMASK(19, 18)
|
||||
|
|
|
|||
258
target/linux/ramips/dts/mt7621_keenetic_kn-3010.dts
Normal file
258
target/linux/ramips/dts/mt7621_keenetic_kn-3010.dts
Normal file
|
|
@ -0,0 +1,258 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
#include "mt7621.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
compatible = "keenetic,kn-3010", "mediatek,mt7621-soc";
|
||||
model = "Keenetic KN-3010";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_power;
|
||||
led-failsafe = &led_power;
|
||||
led-running = &led_power;
|
||||
led-upgrade = &led_power;
|
||||
label-mac-device = &gmac0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_power: power {
|
||||
label = "green:power";
|
||||
gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
internet {
|
||||
label = "green:internet";
|
||||
gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wifi2 {
|
||||
label = "green:wifi2";
|
||||
gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "phy0tpt";
|
||||
};
|
||||
|
||||
wifi5 {
|
||||
label = "green:wifi5";
|
||||
gpios = <&gpio 48 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "phy1tpt";
|
||||
};
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
fn {
|
||||
label = "fn";
|
||||
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_RESTART>;
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "wps";
|
||||
gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
};
|
||||
};
|
||||
|
||||
virtual_flash {
|
||||
compatible = "mtd-concat";
|
||||
devices = <&firmware1 &firmware2>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
compatible = "denx,uimage";
|
||||
label = "firmware";
|
||||
reg = <0x0 0x1ec0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&state_default {
|
||||
gpio {
|
||||
groups = "uart3", "sdhci";
|
||||
function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&xhci {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <31000000>;
|
||||
|
||||
partitions: partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0 0x30000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@30000 {
|
||||
label = "u-config";
|
||||
reg = <0x30000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
factory: partition@40000 {
|
||||
label = "rf-eeprom";
|
||||
reg = <0x40000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
firmware1: partition@50000 {
|
||||
label = "firmware_1";
|
||||
reg = <0x50000 0xf60000>;
|
||||
};
|
||||
|
||||
partition@fb0000 {
|
||||
label = "config_1";
|
||||
reg = <0xfb0000 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@ff0000 {
|
||||
label = "dump";
|
||||
reg = <0xff0000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@1000000 {
|
||||
label = "u-state";
|
||||
reg = <0x1000000 0x30000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@1030000 {
|
||||
label = "u-config_res";
|
||||
reg = <0x1030000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@1040000 {
|
||||
label = "rf-eeprom_res";
|
||||
reg = <0x1040000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
firmware2: partition@1050000 {
|
||||
label = "firmware_2";
|
||||
reg = <0x1050000 0xf60000>;
|
||||
};
|
||||
|
||||
partition@1fb0000 {
|
||||
label = "config_2";
|
||||
reg = <0x1fb0000 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
ethphy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
nvmem-cells = <&macaddr_factory_4>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
&gmac1 {
|
||||
status = "okay";
|
||||
label = "wan";
|
||||
phy-handle = <ðphy0>;
|
||||
|
||||
nvmem-cells = <&macaddr_factory_28>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
&switch0 {
|
||||
ports {
|
||||
port@1 {
|
||||
status = "okay";
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
status = "okay";
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
status = "okay";
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
status = "okay";
|
||||
label = "lan4";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
wifi@0,0 {
|
||||
compatible = "mediatek,mt76";
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
mediatek,mtd-eeprom = <&factory 0x0000>;
|
||||
ieee80211-freq-limit = <2400000 2500000>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
wifi@0,0 {
|
||||
compatible = "mediatek,mt76";
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
mediatek,mtd-eeprom = <&factory 0x0400>;
|
||||
ieee80211-freq-limit = <5000000 6000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&factory {
|
||||
compatible = "nvmem-cells";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_factory_4: macaddr@4 {
|
||||
reg = <0x4 0x6>;
|
||||
};
|
||||
|
||||
macaddr_factory_28: macaddr@28 {
|
||||
reg = <0x28 0x6>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1216,6 +1216,20 @@ define Device/jcg_y2
|
|||
endef
|
||||
TARGET_DEVICES += jcg_y2
|
||||
|
||||
define Device/keenetic_kn-3010
|
||||
$(Device/dsa-migration)
|
||||
$(Device/uimage-lzma-loader)
|
||||
BLOCKSIZE := 64k
|
||||
IMAGE_SIZE := 31488k
|
||||
DEVICE_VENDOR := Keenetic
|
||||
DEVICE_MODEL := KN-3010
|
||||
DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap
|
||||
IMAGES += factory.bin
|
||||
IMAGE/factory.bin := $$(sysupgrade_bin) | pad-to $$$$(BLOCKSIZE) | \
|
||||
check-size | zyimage -d 8400912 -v "KN-3010"
|
||||
endef
|
||||
TARGET_DEVICES += keenetic_kn-3010
|
||||
|
||||
define Device/lenovo_newifi-d1
|
||||
$(Device/dsa-migration)
|
||||
$(Device/uimage-lzma-loader)
|
||||
|
|
|
|||
|
|
@ -75,6 +75,9 @@ dlink,dir-882-r1)
|
|||
gnubee,gb-pc2)
|
||||
ucidef_set_led_netdev "ethyellow" "ethyellow" "orange:ethyellow" "ethyellow" "link tx rx"
|
||||
;;
|
||||
keenetic,kn-3010)
|
||||
ucidef_set_led_netdev "internet" "internet" "green:internet" "wan"
|
||||
;;
|
||||
linksys,e5600)
|
||||
ucidef_set_led_netdev "wan" "wan link" "blue:wan" "wan" "link"
|
||||
;;
|
||||
|
|
|
|||
|
|
@ -350,18 +350,19 @@ CONFIG_PGTABLE_LEVELS=4
|
|||
CONFIG_PHYSICAL_ALIGN=0x1000000
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_BAYTRAIL is not set
|
||||
# CONFIG_PINCTRL_BROXTON is not set
|
||||
# CONFIG_PINCTRL_CANNONLAKE is not set
|
||||
# CONFIG_PINCTRL_CHERRYVIEW is not set
|
||||
# CONFIG_PINCTRL_DENVERTON is not set
|
||||
# CONFIG_PINCTRL_EMMITSBURG is not set
|
||||
# CONFIG_PINCTRL_GEMINILAKE is not set
|
||||
# CONFIG_PINCTRL_JASPERLAKE is not set
|
||||
# CONFIG_PINCTRL_LEWISBURG is not set
|
||||
# CONFIG_PINCTRL_LYNXPOINT is not set
|
||||
# CONFIG_PINCTRL_SUNRISEPOINT is not set
|
||||
# CONFIG_PINCTRL_TIGERLAKE is not set
|
||||
CONFIG_PINCTRL_BAYTRAIL=y
|
||||
CONFIG_PINCTRL_BROXTON=y
|
||||
CONFIG_PINCTRL_CANNONLAKE=y
|
||||
CONFIG_PINCTRL_CHERRYVIEW=y
|
||||
CONFIG_PINCTRL_DENVERTON=y
|
||||
CONFIG_PINCTRL_EMMITSBURG=y
|
||||
CONFIG_PINCTRL_GEMINILAKE=y
|
||||
CONFIG_PINCTRL_INTEL=y
|
||||
CONFIG_PINCTRL_JASPERLAKE=y
|
||||
CONFIG_PINCTRL_LEWISBURG=y
|
||||
CONFIG_PINCTRL_LYNXPOINT=y
|
||||
CONFIG_PINCTRL_SUNRISEPOINT=y
|
||||
CONFIG_PINCTRL_TIGERLAKE=y
|
||||
CONFIG_PM=y
|
||||
# CONFIG_PMIC_OPREGION is not set
|
||||
CONFIG_PM_CLK=y
|
||||
|
|
|
|||
|
|
@ -367,21 +367,22 @@ CONFIG_PGTABLE_LEVELS=4
|
|||
CONFIG_PHYSICAL_ALIGN=0x1000000
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_ALDERLAKE is not set
|
||||
# CONFIG_PINCTRL_BAYTRAIL is not set
|
||||
# CONFIG_PINCTRL_BROXTON is not set
|
||||
# CONFIG_PINCTRL_CANNONLAKE is not set
|
||||
# CONFIG_PINCTRL_CHERRYVIEW is not set
|
||||
# CONFIG_PINCTRL_DENVERTON is not set
|
||||
# CONFIG_PINCTRL_ELKHARTLAKE is not set
|
||||
# CONFIG_PINCTRL_EMMITSBURG is not set
|
||||
# CONFIG_PINCTRL_GEMINILAKE is not set
|
||||
# CONFIG_PINCTRL_JASPERLAKE is not set
|
||||
# CONFIG_PINCTRL_LAKEFIELD is not set
|
||||
# CONFIG_PINCTRL_LEWISBURG is not set
|
||||
# CONFIG_PINCTRL_LYNXPOINT is not set
|
||||
# CONFIG_PINCTRL_SUNRISEPOINT is not set
|
||||
# CONFIG_PINCTRL_TIGERLAKE is not set
|
||||
CONFIG_PINCTRL_ALDERLAKE=y
|
||||
CONFIG_PINCTRL_BAYTRAIL=y
|
||||
CONFIG_PINCTRL_BROXTON=y
|
||||
CONFIG_PINCTRL_CANNONLAKE=y
|
||||
CONFIG_PINCTRL_CHERRYVIEW=y
|
||||
CONFIG_PINCTRL_DENVERTON=y
|
||||
CONFIG_PINCTRL_ELKHARTLAKE=y
|
||||
CONFIG_PINCTRL_EMMITSBURG=y
|
||||
CONFIG_PINCTRL_GEMINILAKE=y
|
||||
CONFIG_PINCTRL_INTEL=y
|
||||
CONFIG_PINCTRL_JASPERLAKE=y
|
||||
CONFIG_PINCTRL_LAKEFIELD=y
|
||||
CONFIG_PINCTRL_LEWISBURG=y
|
||||
CONFIG_PINCTRL_LYNXPOINT=y
|
||||
CONFIG_PINCTRL_SUNRISEPOINT=y
|
||||
CONFIG_PINCTRL_TIGERLAKE=y
|
||||
CONFIG_PM=y
|
||||
# CONFIG_PMIC_OPREGION is not set
|
||||
CONFIG_PM_CLK=y
|
||||
|
|
|
|||
|
|
@ -315,14 +315,14 @@ CONFIG_PINCTRL_BROXTON=y
|
|||
CONFIG_PINCTRL_CANNONLAKE=y
|
||||
CONFIG_PINCTRL_CHERRYVIEW=y
|
||||
CONFIG_PINCTRL_DENVERTON=y
|
||||
# CONFIG_PINCTRL_EMMITSBURG is not set
|
||||
CONFIG_PINCTRL_EMMITSBURG=y
|
||||
CONFIG_PINCTRL_GEMINILAKE=y
|
||||
CONFIG_PINCTRL_INTEL=y
|
||||
# CONFIG_PINCTRL_JASPERLAKE is not set
|
||||
# CONFIG_PINCTRL_LEWISBURG is not set
|
||||
# CONFIG_PINCTRL_LYNXPOINT is not set
|
||||
CONFIG_PINCTRL_JASPERLAKE=y
|
||||
CONFIG_PINCTRL_LEWISBURG=y
|
||||
CONFIG_PINCTRL_LYNXPOINT=y
|
||||
CONFIG_PINCTRL_SUNRISEPOINT=y
|
||||
# CONFIG_PINCTRL_TIGERLAKE is not set
|
||||
CONFIG_PINCTRL_TIGERLAKE=y
|
||||
CONFIG_PM=y
|
||||
# CONFIG_PMIC_OPREGION is not set
|
||||
CONFIG_PM_CLK=y
|
||||
|
|
|
|||
|
|
@ -318,22 +318,22 @@ CONFIG_PCI_XEN=y
|
|||
CONFIG_PGTABLE_LEVELS=3
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_ALDERLAKE is not set
|
||||
CONFIG_PINCTRL_ALDERLAKE=y
|
||||
CONFIG_PINCTRL_BAYTRAIL=y
|
||||
CONFIG_PINCTRL_BROXTON=y
|
||||
CONFIG_PINCTRL_CANNONLAKE=y
|
||||
CONFIG_PINCTRL_CHERRYVIEW=y
|
||||
CONFIG_PINCTRL_DENVERTON=y
|
||||
# CONFIG_PINCTRL_ELKHARTLAKE is not set
|
||||
# CONFIG_PINCTRL_EMMITSBURG is not set
|
||||
CONFIG_PINCTRL_ELKHARTLAKE=y
|
||||
CONFIG_PINCTRL_EMMITSBURG=y
|
||||
CONFIG_PINCTRL_GEMINILAKE=y
|
||||
CONFIG_PINCTRL_INTEL=y
|
||||
# CONFIG_PINCTRL_JASPERLAKE is not set
|
||||
# CONFIG_PINCTRL_LAKEFIELD is not set
|
||||
# CONFIG_PINCTRL_LEWISBURG is not set
|
||||
# CONFIG_PINCTRL_LYNXPOINT is not set
|
||||
CONFIG_PINCTRL_JASPERLAKE=y
|
||||
CONFIG_PINCTRL_LAKEFIELD=y
|
||||
CONFIG_PINCTRL_LEWISBURG=y
|
||||
CONFIG_PINCTRL_LYNXPOINT=y
|
||||
CONFIG_PINCTRL_SUNRISEPOINT=y
|
||||
# CONFIG_PINCTRL_TIGERLAKE is not set
|
||||
CONFIG_PINCTRL_TIGERLAKE=y
|
||||
CONFIG_PM=y
|
||||
# CONFIG_PMIC_OPREGION is not set
|
||||
CONFIG_PM_CLK=y
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk
|
|||
|
||||
PKG_NAME:=patch
|
||||
PKG_VERSION:=2.7.6
|
||||
PKG_RELEASE:=6
|
||||
PKG_RELEASE:=7
|
||||
PKG_CPE_ID:=cpe:/a:gnu:patch
|
||||
|
||||
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
|
||||
|
|
|
|||
|
|
@ -0,0 +1,33 @@
|
|||
From f42cbe1a91a3a6f79d1eec594ce7c72aec79179b Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= <thomas@t-8ch.de>
|
||||
Date: Wed, 9 Nov 2022 05:08:22 +0100
|
||||
Subject: [PATCH] don't fail hard on EACCES when copying xattrs
|
||||
|
||||
On btrfs the xattr "btrfs.compressed" requires privileges to set,
|
||||
otherwise EACCES is returned.
|
||||
When patch tries to do copy this attribute it receives the error and
|
||||
aborts.
|
||||
---
|
||||
src/util.c | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/src/util.c
|
||||
+++ b/src/util.c
|
||||
@@ -182,7 +182,7 @@ copy_attr_error (struct error_context *c
|
||||
int err = errno;
|
||||
va_list ap;
|
||||
|
||||
- if (err != ENOSYS && err != ENOTSUP && err != EPERM)
|
||||
+ if (err != ENOSYS && err != ENOTSUP && err != EPERM && err != EACCES)
|
||||
{
|
||||
/* use verror module to print error message */
|
||||
va_start (ap, fmt);
|
||||
@@ -284,7 +284,7 @@ set_file_attributes (char const *to, enu
|
||||
}
|
||||
if (attr & FA_XATTRS)
|
||||
if (copy_attr (from, to) != 0
|
||||
- && errno != ENOSYS && errno != ENOTSUP && errno != EPERM)
|
||||
+ && errno != ENOSYS && errno != ENOTSUP && errno != EPERM && errno != EACCES)
|
||||
fatal_exit (0);
|
||||
if (attr & FA_MODE)
|
||||
{
|
||||
Loading…
Reference in a new issue