uboot-sifiveu: drop PWM-related patches
These are dropped from later SDK releases, and don't compile with the recent GCC14 updates as well. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
This commit is contained in:
Zoltan HERPAI
parent
bf91381451
commit
a0f45a4f3f
4 changed files with 0 additions and 278 deletions
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@ -1,117 +0,0 @@
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From 2ba4e6d78e0a63e5d491f9b01b498899e58cb58d Mon Sep 17 00:00:00 2001
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From: Vincent Chen <vincent.chen@sifive.com>
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Date: Mon, 15 Nov 2021 03:31:04 -0800
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Subject: [PATCH 1/5] board: sifive: spl: Initialized the PWM setting in the
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SPL stage
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LEDs and multiple fans can be controlled by SPL. This patch ensures
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that all fans have been enabled in the SPL stage. In addition, the
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LED's color will be set to yellow.
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Upstream-Status: Pending
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Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
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---
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arch/riscv/include/asm/arch-fu740/eeprom.h | 15 ++++++
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board/sifive/unmatched/Makefile | 1 +
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board/sifive/unmatched/pwm.c | 57 ++++++++++++++++++++++
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board/sifive/unmatched/spl.c | 2 +
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4 files changed, 75 insertions(+)
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create mode 100644 arch/riscv/include/asm/arch-fu740/eeprom.h
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create mode 100644 board/sifive/unmatched/pwm.c
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--- /dev/null
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+++ b/arch/riscv/include/asm/arch-fu740/eeprom.h
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@@ -0,0 +1,15 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+/*
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+ * Copyright (C) 2021 SiFive, Inc.
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+ *
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+ * Zong Li <zong.li@sifve.com>
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+ */
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+
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+#ifndef _ASM_RISCV_EEPROM_H
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+#define _ASM_RISCV_EEPROM_H
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+
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+#define PCB_REVISION_REV3 0x3
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+
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+u8 get_pcb_revision_from_eeprom(void);
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+
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+#endif /* _ASM_RISCV_EEPROM_H */
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--- a/board/sifive/unmatched/Makefile
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+++ b/board/sifive/unmatched/Makefile
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@@ -9,3 +9,4 @@ obj-y += spl.o
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else
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obj-y += unmatched.o
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endif
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+obj-y += pwm.o
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--- /dev/null
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+++ b/board/sifive/unmatched/pwm.c
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@@ -0,0 +1,57 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright (c) 2021, SiFive Inc
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+ *
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+ * Authors:
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+ * Vincent Chen <vincent.chen@sifive.com>
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+ * David Abdurachmanov <david.abdurachmanov@sifive.com>
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+ */
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+
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+#include <linux/io.h>
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+#include <asm/arch/eeprom.h>
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+
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+struct pwm_sifive_regs {
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+ unsigned int cfg; /* PWM configuration register */
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+ unsigned int pad0; /* Reserved */
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+ unsigned int cnt; /* PWM count register */
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+ unsigned int pad1; /* Reserved */
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+ unsigned int pwms; /* Scaled PWM count register */
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+ unsigned int pad2; /* Reserved */
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+ unsigned int pad3; /* Reserved */
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+ unsigned int pad4; /* Reserved */
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+ unsigned int cmp0; /* PWM 0 compare register */
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+ unsigned int cmp1; /* PWM 1 compare register */
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+ unsigned int cmp2; /* PWM 2 compare register */
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+ unsigned int cmp3; /* PWM 3 compare register */
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+};
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+
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+#define PWM0_BASE 0x10020000
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+#define PWM1_BASE 0x10021000
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+#define PWM_CFG_INIT 0x1000
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+#define PWM_CMP_ENABLE_VAL 0x0
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+#define PWM_CMP_DISABLE_VAL 0xffff
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+
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+void pwm_device_init(void)
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+{
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+ struct pwm_sifive_regs *pwm0, *pwm1;
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+ pwm0 = (struct pwm_sifive_regs *)PWM0_BASE;
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+ pwm1 = (struct pwm_sifive_regs *)PWM1_BASE;
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+ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp0);
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+ /* Set the 3-color PWM LEDs to yellow in SPL */
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+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp1);
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+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp2);
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+ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp3);
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+ writel(PWM_CFG_INIT, (void *)&pwm0->cfg);
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+
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+ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp3);
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+ /* Turn on all the fans, (J21), (J23) and (J24), on the unmatched board */
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+ /* The SoC fan(J21) on the rev3 board cannot be controled by PWM_COMP0,
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+ so here sets the initial value of PWM_COMP0 as DISABLE */
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+ if (get_pcb_revision_from_eeprom() == PCB_REVISION_REV3)
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+ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm1->cmp1);
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+ else
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+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp1);
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+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp2);
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+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp3);
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+ writel(PWM_CFG_INIT, (void *)&pwm1->cfg);
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+}
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--- a/board/sifive/unmatched/spl.c
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+++ b/board/sifive/unmatched/spl.c
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@@ -90,6 +90,8 @@ int spl_board_init_f(void)
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goto end;
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}
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+ pwm_device_init();
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+
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ret = spl_gemgxl_init();
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if (ret) {
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debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
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@ -1,62 +0,0 @@
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From 0dfab8fab80107aa4ad7d41a8ff47e5ff59632f9 Mon Sep 17 00:00:00 2001
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From: Vincent Chen <vincent.chen@sifive.com>
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Date: Mon, 24 Jan 2022 02:42:02 -0800
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Subject: [PATCH 2/5] board: sifive: Set LED's color to purple in the U-boot
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stage
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Set LED's color to purple in the U-boot stage. Because there are still
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some functions to be executed before board_early_init_f(), it means
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the LED's is not changed to purple instantly when entering the U-boot
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stage.
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Upstream-Status: Pending
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Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
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---
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board/sifive/unmatched/pwm.c | 7 +++++++
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board/sifive/unmatched/unmatched.c | 6 ++++++
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configs/sifive_unmatched_defconfig | 1 +
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3 files changed, 14 insertions(+)
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--- a/board/sifive/unmatched/pwm.c
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+++ b/board/sifive/unmatched/pwm.c
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@@ -36,6 +36,7 @@ void pwm_device_init(void)
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struct pwm_sifive_regs *pwm0, *pwm1;
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pwm0 = (struct pwm_sifive_regs *)PWM0_BASE;
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pwm1 = (struct pwm_sifive_regs *)PWM1_BASE;
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+#ifdef CONFIG_SPL_BUILD
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writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp0);
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/* Set the 3-color PWM LEDs to yellow in SPL */
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writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp1);
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@@ -54,4 +55,10 @@ void pwm_device_init(void)
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writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp2);
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writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp3);
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writel(PWM_CFG_INIT, (void *)&pwm1->cfg);
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+#else
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+ /* Set the 3-color PWM LEDs to purple in U-boot */
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+ writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp1);
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+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp2);
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+ writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp3);
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+#endif
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}
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--- a/board/sifive/unmatched/unmatched.c
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+++ b/board/sifive/unmatched/unmatched.c
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@@ -22,6 +22,12 @@ void *board_fdt_blob_setup(int *err)
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return (ulong *)&_end;
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}
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+int board_early_init_f(void)
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+{
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+ pwm_device_init();
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+ return 0;
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+}
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+
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int board_init(void)
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{
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/* enable all cache ways */
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--- a/configs/sifive_unmatched_defconfig
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+++ b/configs/sifive_unmatched_defconfig
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@@ -63,3 +63,4 @@ CONFIG_DM_SCSI=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_PCI=y
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+CONFIG_BOARD_EARLY_INIT_F=y
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@ -1,32 +0,0 @@
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From 1a48019dd4b69dd76551217a61cc4cab9e92fd39 Mon Sep 17 00:00:00 2001
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From: Vincent Chen <vincent.chen@sifive.com>
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Date: Mon, 15 Nov 2021 03:39:07 -0800
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Subject: [PATCH 3/5] board: sifive: Set LED's color to blue before jumping to
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Linux
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The LED's color wil be changed from purple to blue before executing
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the sysboot command. Because the sysboot command includes the image loading
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from the boot partition, It means the LED's color is blue when executing
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"Retrieving file: /Image.gz".
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Upstream-Status: Pending
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Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
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---
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include/configs/sifive-unmatched.h | 7 ++++++-
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1 file changed, 6 insertions(+), 1 deletion(-)
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--- a/include/configs/sifive-unmatched.h
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+++ b/include/configs/sifive-unmatched.h
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@@ -48,6 +48,11 @@
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"type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \
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"partitions=" PARTS_DEFAULT "\0" \
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"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
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- BOOTENV
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+ "setled_blue=mw.l 0x10020024 0x0000ffff; mw.l 0x10020028 0x0000ffff; mw.l 0x1002002c 0x0\0" \
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+ BOOTENV \
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+ "boot_extlinux=" \
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+ "run setled_blue; " \
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+ "sysboot ${devtype} ${devnum}:${distro_bootpart} any " \
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+ "${scriptaddr} ${prefix}${boot_syslinux_conf};\0"
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#endif /* __SIFIVE_UNMATCHED_H */
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@ -1,67 +0,0 @@
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From 877afdf63129caa64d70d4a1252eec44778cfa0e Mon Sep 17 00:00:00 2001
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From: Vincent Chen <vincent.chen@sifive.com>
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Date: Mon, 24 Jan 2022 02:57:40 -0800
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Subject: [PATCH 4/5] board: sifive: spl: Set remote thermal of TMP451 to 85
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deg C
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for the unmatched board
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For TMP451 on the unmatched board, the default value of the remote
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thermal threshold is 108 deg C. This commit initilizes it to 85 deg C at SPL.
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Upstream-Status: Pending
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Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
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Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
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---
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board/sifive/unmatched/spl.c | 26 ++++++++++++++++++++++++++
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1 file changed, 26 insertions(+)
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--- a/board/sifive/unmatched/spl.c
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+++ b/board/sifive/unmatched/spl.c
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@@ -10,6 +10,8 @@
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#include <spl.h>
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#include <misc.h>
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#include <log.h>
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+#include <config.h>
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+#include <i2c.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <asm/gpio.h>
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@@ -26,6 +28,24 @@
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#define MODE_SELECT_SD 0xb
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#define MODE_SELECT_MASK GENMASK(3, 0)
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+#define TMP451_REMOTE_THERM_LIMIT_REG_OFFSET 0x19
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+#define TMP451_REMOTE_THERM_LIMIT_INIT_VALUE 0x55
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+
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+static inline int init_tmp451_remote_therm_limit(void)
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+{
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+ struct udevice *dev;
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+ unsigned char r_therm_limit = TMP451_REMOTE_THERM_LIMIT_INIT_VALUE;
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+ int ret;
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+
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+ ret = i2c_get_chip_for_busnum(0, 0x4c, 0x1, &dev);
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+
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+ if (!ret)
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+ ret = dm_i2c_write(dev, TMP451_REMOTE_THERM_LIMIT_REG_OFFSET,
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+ &r_therm_limit,
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+ sizeof(unsigned char));
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+ return ret;
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+}
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+
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static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width)
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{
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int ret;
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@@ -92,6 +112,12 @@ int spl_board_init_f(void)
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pwm_device_init();
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+ ret = init_tmp451_remote_therm_limit();
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+ if (ret) {
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+ debug("TMP451 remote THERM limit init failed: %d\n", ret);
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+ goto end;
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+ }
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+
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ret = spl_gemgxl_init();
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if (ret) {
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debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
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