diff --git a/include/kernel-5.15 b/include/kernel-5.15 index 6c2be5b3546..30ee7cd866a 100644 --- a/include/kernel-5.15 +++ b/include/kernel-5.15 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.15 = .138 -LINUX_KERNEL_HASH-5.15.138 = af84e54164e1c01f59764ba528448ed36b377d22aafbd81b4b0cf47792ef4aaa +LINUX_VERSION-5.15 = .139 +LINUX_KERNEL_HASH-5.15.139 = 9c68c10dfe18e59b892e940436dea6a18d167160d55e62563cf7282244d8044e diff --git a/include/kernel-6.1 b/include/kernel-6.1 index 1dd947e7bc0..01ed1d17070 100644 --- a/include/kernel-6.1 +++ b/include/kernel-6.1 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.1 = .62 -LINUX_KERNEL_HASH-6.1.62 = b9fd616facd6becfceef88b9be718d0f16625cab3fe81d11384802a7091e85ec +LINUX_VERSION-6.1 = .63 +LINUX_KERNEL_HASH-6.1.63 = c29d043b01dd4fcc61a24fd027c5c7912b15b1f10d8e3c83a0cb935885f0758d diff --git a/include/u-boot.mk b/include/u-boot.mk index 2b8106410f5..280c6e35a10 100644 --- a/include/u-boot.mk +++ b/include/u-boot.mk @@ -16,7 +16,7 @@ PKG_FLAGS:=nonshared PKG_LICENSE:=GPL-2.0 GPL-2.0+ PKG_LICENSE_FILES:=Licenses/README -PKG_BUILD_PARALLEL:=1 +PKG_BUILD_PARALLEL ?= 1 export GCC_HONOUR_COPTS=s diff --git a/package/base-files/files/bin/ipcalc.sh b/package/base-files/files/bin/ipcalc.sh index 827cb5dc2ea..9b5e5accdca 100755 --- a/package/base-files/files/bin/ipcalc.sh +++ b/package/base-files/files/bin/ipcalc.sh @@ -34,19 +34,19 @@ function compl32(v) { BEGIN { slpos=index(ARGV[1],"/") - if (slpos == 0) { - ipaddr=ip2int(ARGV[1]) - dotpos=index(ARGV[2],".") - if (dotpos == 0) - netmask=compl32(2**(32-int(ARGV[2]))-1) - else - netmask=ip2int(ARGV[2]) - } else { - ipaddr=ip2int(substr(ARGV[1],0,slpos-1)) - netmask=compl32(2**(32-int(substr(ARGV[1],slpos+1)))-1) + if (slpos != 0) { + # rearrange arguments to not use compound notation ARGV[4]=ARGV[3] ARGV[3]=ARGV[2] + ARGV[2]=substr(ARGV[1],slpos+1) + ARGV[1]=substr(ARGV[1],0,slpos-1) } + ipaddr=ip2int(ARGV[1]) + dotpos=index(ARGV[2],".") + if (dotpos == 0) + netmask=compl32(2**(32-int(ARGV[2]))-1) + else + netmask=ip2int(ARGV[2]) network=and(ipaddr,netmask) prefix=32-bitcount(compl32(netmask)) diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic index d4d0969b7af..8c7c5a85c02 100644 --- a/package/boot/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-envtools/files/mediatek_filogic @@ -66,7 +66,8 @@ mercusys,mr90x-v1) ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1" ;; cetron,ct3003|\ -netgear,wax220) +netgear,wax220|\ +zbtlink,zbt-z8102ax) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000" ;; ubnt,unifi-6-plus) @@ -79,6 +80,7 @@ xiaomi,redmi-router-ax6000-stock) ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x10000" "0x20000" ;; h3c,magic-nx30-pro|\ +jcg,q30-pro|\ qihoo,360t7|\ tplink,tl-xdr4288|\ tplink,tl-xdr6086|\ diff --git a/package/boot/uboot-envtools/files/mvebu b/package/boot/uboot-envtools/files/mvebu index 63b5132608a..c4ce76cf240 100644 --- a/package/boot/uboot-envtools/files/mvebu +++ b/package/boot/uboot-envtools/files/mvebu @@ -68,6 +68,10 @@ methode,edpu) ubootenv_add_uci_config "/dev/mtd0" "0x180000" "0x10000" "0x10000" fi ;; +synology,ds213j) + idx="$(find_mtd_index u-boot-env)" + [ -n "$idx" ] && ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x10000" + ;; esac config_load ubootenv diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile index ad25d051fed..a06d323bae8 100644 --- a/package/boot/uboot-mediatek/Makefile +++ b/package/boot/uboot-mediatek/Makefile @@ -236,6 +236,18 @@ define U-Boot/mt7981_h3c_magic-nx30-pro DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3 endef +define U-Boot/mt7981_jcg_q30-pro + NAME:=JCG Q30 PRO + BUILD_SUBTARGET:=filogic + BUILD_DEVICES:=jcg_q30-pro + UBOOT_CONFIG:=mt7981_jcg_q30-pro + UBOOT_IMAGE:=u-boot.fip + BL2_BOOTDEV:=spim-nand + BL2_SOC:=mt7981 + BL2_DDRTYPE:=ddr3 + DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3 +endef + define U-Boot/mt7981_rfb-spim-nand NAME:=MT7981 Reference Board BUILD_SUBTARGET:=filogic @@ -523,6 +535,7 @@ UBOOT_TARGETS := \ mt7981_cmcc_rax3000m-emmc \ mt7981_cmcc_rax3000m-nand \ mt7981_h3c_magic-nx30-pro \ + mt7981_jcg_q30-pro \ mt7981_rfb-spim-nand \ mt7981_rfb-emmc \ mt7981_rfb-nor \ diff --git a/package/boot/uboot-mediatek/patches/430-add-bpi-r3.patch b/package/boot/uboot-mediatek/patches/430-add-bpi-r3.patch index 28aa0844ead..f98ef45f542 100644 --- a/package/boot/uboot-mediatek/patches/430-add-bpi-r3.patch +++ b/package/boot/uboot-mediatek/patches/430-add-bpi-r3.patch @@ -870,7 +870,7 @@ +ubi_init_emmc_install=run sdmmc_read_emmc_install && run ubi_write_emmc_install +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data -+ubi_write_emmc_install=ubi check emmc_install && ubi remote emmc_install ; ubi create emmc_install 0x800000 dynamic ; ubi write $loadaddr emmc_install 0x800000 ++ubi_write_emmc_install=ubi check emmc_install && ubi remove emmc_install ; ubi create emmc_install 0x800000 dynamic ; ubi write $loadaddr emmc_install 0x800000 +ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize +ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize +_init_env=setenv _init_env ; setenv _create_env ; saveenv ; saveenv diff --git a/package/boot/uboot-mediatek/patches/438-add-jcg_q30-pro.patch b/package/boot/uboot-mediatek/patches/438-add-jcg_q30-pro.patch new file mode 100644 index 00000000000..639cae174e7 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/438-add-jcg_q30-pro.patch @@ -0,0 +1,420 @@ +--- /dev/null ++++ b/configs/mt7981_jcg_q30-pro_defconfig +@@ -0,0 +1,175 @@ ++CONFIG_ARM=y ++CONFIG_POSITION_INDEPENDENT=y ++CONFIG_ARCH_MEDIATEK=y ++CONFIG_TARGET_MT7981=y ++CONFIG_TEXT_BASE=0x41e00000 ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_SYS_HAS_NONCACHED_MEMORY=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_DEFAULT_DEVICE_TREE="mt7981_jcg_q30-pro" ++CONFIG_DEFAULT_ENV_FILE="jcg_q30-pro_env" ++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_jcg_q30-pro.dtb" ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_DEBUG_UART_BASE=0x11002000 ++CONFIG_DEBUG_UART_CLOCK=40000000 ++CONFIG_DEBUG_UART=y ++CONFIG_SYS_LOAD_ADDR=0x46000000 ++CONFIG_SMBIOS_PRODUCT_NAME="" ++CONFIG_AUTOBOOT_KEYED=y ++CONFIG_BOOTDELAY=30 ++CONFIG_AUTOBOOT_MENU_SHOW=y ++CONFIG_CFB_CONSOLE_ANSI=y ++CONFIG_BOARD_LATE_INIT=y ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_GPIO_HOG=y ++CONFIG_CMD_ENV_FLAGS=y ++CONFIG_FIT=y ++CONFIG_FIT_ENABLE_SHA256_SUPPORT=y ++CONFIG_LED=y ++CONFIG_LED_BLINK=y ++CONFIG_LED_GPIO=y ++CONFIG_LOGLEVEL=7 ++CONFIG_LOG=y ++CONFIG_SYS_PROMPT="MT7981> " ++CONFIG_CMD_BOOTMENU=y ++CONFIG_CMD_BOOTP=y ++CONFIG_CMD_BUTTON=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_CDP=y ++CONFIG_CMD_CPU=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_DM=y ++CONFIG_CMD_DNS=y ++CONFIG_CMD_ECHO=y ++CONFIG_CMD_ENV_READMEM=y ++CONFIG_CMD_ERASEENV=y ++CONFIG_CMD_EXT4=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FDT=y ++CONFIG_CMD_FS_GENERIC=y ++CONFIG_CMD_FS_UUID=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_HASH=y ++CONFIG_CMD_ITEST=y ++CONFIG_CMD_LED=y ++CONFIG_CMD_LICENSE=y ++CONFIG_CMD_LINK_LOCAL=y ++# CONFIG_CMD_MBR is not set ++CONFIG_CMD_PCI=y ++CONFIG_CMD_PSTORE=y ++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 ++CONFIG_CMD_SF_TEST=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_PWM=y ++CONFIG_CMD_SMC=y ++CONFIG_CMD_TFTPBOOT=y ++CONFIG_CMD_TFTPSRV=y ++CONFIG_CMD_UBI=y ++CONFIG_CMD_UBI_RENAME=y ++CONFIG_CMD_UBIFS=y ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_PART=y ++CONFIG_CMD_RARP=y ++CONFIG_CMD_SETEXPR=y ++CONFIG_CMD_SLEEP=y ++CONFIG_CMD_SNTP=y ++CONFIG_CMD_SOURCE=y ++CONFIG_CMD_STRINGS=y ++CONFIG_CMD_UUID=y ++CONFIG_DISPLAY_CPUINFO=y ++CONFIG_DM_MTD=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_PWM=y ++CONFIG_PWM_MTK=y ++CONFIG_HUSH_PARSER=y ++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_VERSION_VARIABLE=y ++CONFIG_PARTITION_UUIDS=y ++CONFIG_NETCONSOLE=y ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_CLK=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_SCSI=y ++CONFIG_AHCI=y ++CONFIG_AHCI_PCI=y ++CONFIG_SCSI_AHCI=y ++CONFIG_SCSI=y ++CONFIG_CMD_SCSI=y ++CONFIG_PHY=y ++CONFIG_PHY_MTK_TPHY=y ++CONFIG_PHY_FIXED=y ++CONFIG_MTK_AHCI=y ++CONFIG_DM_ETH=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PCI=y ++# CONFIG_MMC is not set ++# CONFIG_DM_MMC is not set ++CONFIG_MTD=y ++CONFIG_MTD_UBI_FASTMAP=y ++CONFIG_DM_PCI=y ++CONFIG_PCIE_MEDIATEK=y ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7622=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_PRE_CONSOLE_BUFFER=y ++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00 ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_RAM=y ++CONFIG_DM_SERIAL=y ++CONFIG_MTK_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MTK_SPI_NAND=y ++CONFIG_MTK_SPI_NAND_MTD=y ++CONFIG_SYSRESET_WATCHDOG=y ++CONFIG_WDT_MTK=y ++CONFIG_LZO=y ++CONFIG_ZSTD=y ++CONFIG_HEXDUMP=y ++CONFIG_RANDOM_UUID=y ++CONFIG_REGEX=y ++CONFIG_OF_EMBED=y ++CONFIG_ENV_OVERWRITE=y ++CONFIG_ENV_IS_IN_UBI=y ++CONFIG_ENV_UBI_PART="ubi" ++CONFIG_ENV_SIZE=0x1f000 ++CONFIG_ENV_SIZE_REDUND=0x1f000 ++CONFIG_ENV_UBI_VOLUME="ubootenv" ++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_CLK=y ++CONFIG_PHY_FIXED=y ++CONFIG_DM_ETH=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7981=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_SERIAL=y ++CONFIG_MTK_SERIAL=y ++CONFIG_HEXDUMP=y ++CONFIG_USE_DEFAULT_ENV_FILE=y ++CONFIG_MTD_SPI_NAND=y ++CONFIG_MTK_SPIM=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_NAND=y ++CONFIG_CMD_NAND_TRIMFFS=y ++CONFIG_LMB_MAX_REGIONS=64 ++CONFIG_USE_IPADDR=y ++CONFIG_IPADDR="192.168.1.1" ++CONFIG_USE_SERVERIP=y ++CONFIG_SERVERIP="192.168.1.254" +--- /dev/null ++++ b/arch/arm/dts/mt7981_jcg_q30-pro.dts +@@ -0,0 +1,179 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2022 MediaTek Inc. ++ * Author: Sam Shih ++ */ ++ ++/dts-v1/; ++#include "mt7981.dtsi" ++#include ++#include ++ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ model = "JCG Q30 PRO"; ++ compatible = "mediatek,mt7981", "mediatek,mt7981-rfb"; ++ ++ chosen { ++ stdout-path = &uart0; ++ tick-timer = &timer0; ++ }; ++ ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x10000000>; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ ++ factory { ++ label = "reset"; ++ linux,code = ; ++ gpios = <&gpio 1 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ status_red { ++ label = "red:status"; ++ gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ status_blue { ++ label = "blue:status"; ++ gpios = <&gpio 13 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&uart0 { ++ mediatek,force-highspeed; ++ status = "okay"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++ status = "disabled"; ++}; ++ ++ð { ++ status = "okay"; ++ mediatek,gmac-id = <0>; ++ phy-mode = "2500base-x"; ++ mediatek,switch = "mt7531"; ++ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>; ++ ++ fixed-link { ++ speed = <2500>; ++ full-duplex; ++ }; ++}; ++ ++&pinctrl { ++ spi_flash_pins: spi0-pins-func-1 { ++ mux { ++ function = "flash"; ++ groups = "spi0", "spi0_wp_hold"; ++ }; ++ ++ conf-pu { ++ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ ++ conf-pd { ++ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; ++ drive-strength = ; ++ bias-pull-down = ; ++ }; ++ }; ++ ++ spic_pins: spi1-pins-func-1 { ++ mux { ++ function = "spi"; ++ groups = "spi1_1"; ++ }; ++ }; ++ ++ uart1_pins: spi1-pins-func-3 { ++ mux { ++ function = "uart"; ++ groups = "uart1_2"; ++ }; ++ }; ++ ++ pwm_pins: pwm0-pins-func-1 { ++ mux { ++ function = "pwm"; ++ groups = "pwm0_1", "pwm1_0"; ++ }; ++ }; ++}; ++ ++&pwm { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm_pins>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi_flash_pins>; ++ status = "okay"; ++ must_tx; ++ enhance_timing; ++ dma_ext; ++ ipm_design; ++ support_quad; ++ tick_dly = <2>; ++ sample_sel = <0>; ++ ++ spi_nand@0 { ++ compatible = "spi-nand"; ++ reg = <0>; ++ spi-max-frequency = <52000000>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ label = "bl2"; ++ reg = <0x0 0x100000>; ++ }; ++ ++ partition@100000 { ++ label = "orig-env"; ++ reg = <0x100000 0x80000>; ++ }; ++ ++ partition@160000 { ++ label = "factory"; ++ reg = <0x180000 0x200000>; ++ }; ++ ++ partition@380000 { ++ label = "fip"; ++ reg = <0x380000 0x200000>; ++ }; ++ ++ partition@580000 { ++ label = "ubi"; ++ reg = <0x580000 0x7000000>; ++ }; ++ }; ++ }; ++}; ++ ++&watchdog { ++ status = "disabled"; ++}; +--- /dev/null ++++ b/jcg_q30-pro_env +@@ -0,0 +1,57 @@ ++ipaddr=192.168.1.1 ++serverip=192.168.1.254 ++loadaddr=0x46000000 ++console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0 ++bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi ++bootconf=config-1 ++bootdelay=0 ++bootfile=openwrt-mediatek-filogic-jcg_q30-pro-initramfs-recovery.itb ++bootfile_bl2=openwrt-mediatek-filogic-jcg_q30-pro-preloader.bin ++bootfile_fip=openwrt-mediatek-filogic-jcg_q30-pro-bl31-uboot.fip ++bootfile_upg=openwrt-mediatek-filogic-jcg_q30-pro-squashfs-sysupgrade.itb ++bootled_pwr=blue:status ++bootled_rec=red:status ++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 ++bootmenu_default=0 ++bootmenu_delay=0 ++bootmenu_title= ( ( ( OpenWrt ) ) ) ++bootmenu_0=Initialize environment.=run _firstboot ++bootmenu_0d=Run default boot command.=run boot_default ++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return ++bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return ++bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return ++bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return ++bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return ++bootmenu_8=Reboot.=reset ++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset ++boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu ++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever ++boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off ++boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off ++boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever ++boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done ++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf ++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory ++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2 ++part_default=production ++part_recovery=recovery ++reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800 ++mtd_write_fip=mtd erase fip && mtd write fip $loadaddr ++mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr ++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format ++ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset ++ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi ++ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs ++ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery ++ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data ++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize ++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize ++ethaddr_factory=mtd read factory 0x40080000 0xa0000 0x800 && env readmem -b ethaddr 0x4008002a 0x6 ; setenv ethaddr_factory ++_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv ++_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first ++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title ++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" diff --git a/package/firmware/linux-firmware/intel.mk b/package/firmware/linux-firmware/intel.mk index cb7b7f4ae42..27b0d8ce64c 100644 --- a/package/firmware/linux-firmware/intel.mk +++ b/package/firmware/linux-firmware/intel.mk @@ -170,6 +170,13 @@ define Package/iwlwifi-firmware-iwl9260/install endef $(eval $(call BuildPackage,iwlwifi-firmware-iwl9260)) +Package/iwlwifi-firmware-ax101 = $(call Package/firmware-default,Intel AX101 firmware) +define Package/iwlwifi-firmware-ax101/install + $(INSTALL_DIR) $(1)/lib/firmware + $(INSTALL_DATA) $(PKG_BUILD_DIR)/iwlwifi-so-a0-hr-b0-81.ucode $(1)/lib/firmware +endef +$(eval $(call BuildPackage,iwlwifi-firmware-ax101)) + Package/iwlwifi-firmware-ax200 = $(call Package/firmware-default,Intel AX200 firmware) define Package/iwlwifi-firmware-ax200/install $(INSTALL_DIR) $(1)/lib/firmware diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk index 74ea07e2611..8f5be829780 100644 --- a/package/kernel/linux/modules/netdevices.mk +++ b/package/kernel/linux/modules/netdevices.mk @@ -378,9 +378,11 @@ $(eval $(call KernelPackage,phy-smsc)) define KernelPackage/phy-aquantia SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Aquantia Ethernet PHYs - DEPENDS:=+kmod-libphy +kmod-hwmon-core + DEPENDS:=+kmod-libphy +kmod-hwmon-core +kmod-lib-crc-ccitt KCONFIG:=CONFIG_AQUANTIA_PHY - FILES:=$(LINUX_DIR)/drivers/net/phy/aquantia.ko + FILES:= \ + $(LINUX_DIR)/drivers/net/phy/aquantia.ko@lt6.1 \ + $(LINUX_DIR)/drivers/net/phy/aquantia/aquantia.ko@ge6.1 AUTOLOAD:=$(call AutoLoad,18,aquantia,1) endef diff --git a/package/libs/udebug/Makefile b/package/libs/udebug/Makefile new file mode 100644 index 00000000000..04fd7419572 --- /dev/null +++ b/package/libs/udebug/Makefile @@ -0,0 +1,82 @@ +# +# Copyright (C) 2023 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=udebug +CMAKE_INSTALL:=1 +PKG_SOURCE_PROTO:=git +PKG_SOURCE_URL=$(PROJECT_GIT)/project/udebug.git +PKG_MIRROR_HASH:=baf437fb12b1faaf6c7eea3fea253c6d87c31b85f768b48d3984fe398e5b20b8 +PKG_SOURCE_DATE:=2023-11-20 +PKG_SOURCE_VERSION:=759d9404034b7da97b3950c806ace7296a0f7a12 +PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE)) + +PKG_LICENSE:=GPL-2.0 +PKG_MAINTAINER:=Felix Fietkau + +include $(INCLUDE_DIR)/package.mk +include $(INCLUDE_DIR)/cmake.mk + +define Package/libudebug + SECTION:=libs + CATEGORY:=Libraries + TITLE:=udebug client library + DEPENDS:=+libubox +endef + +define Package/udebugd + SECTION:=utils + CATEGORY:=Utilities + TITLE:=OpenWrt debug service + DEPENDS:=+libudebug +libubus +endef + +define Package/udebugd/conffiles +/etc/config/udebug +endef + +define Package/ucode-mod-udebug + SECTION:=utils + CATEGORY:=Utilities + TITLE:=ucode udebug module + DEPENDS:=+libucode +libudebug +endef + +define Package/udebug-cli + SECTION:=utils + CATEGORY:=Utilities + TITLE:=OpenWrt debug service CLI + DEPENDS:=+udebugd +ucode-mod-udebug +endef + +define Package/libudebug/install + $(INSTALL_DIR) $(1)/usr/lib + $(CP) $(PKG_INSTALL_DIR)/usr/lib/*.so* $(1)/usr/lib +endef + +define Package/ucode-mod-udebug/install + $(INSTALL_DIR) $(1)/usr/lib/ucode + $(CP) $(PKG_INSTALL_DIR)/usr/lib/ucode/*.so $(1)/usr/lib/ucode +endef + +define Package/udebugd/install + $(INSTALL_DIR) $(1)/usr/sbin $(1)/etc/init.d $(1)/etc/config + $(INSTALL_BIN) ./files/udebug.config $(1)/etc/config/udebug + $(INSTALL_BIN) ./files/udebug.init $(1)/etc/init.d/udebug + $(CP) $(PKG_INSTALL_DIR)/usr/sbin/udebugd $(1)/usr/sbin +endef + +define Package/udebug-cli/install + $(INSTALL_DIR) $(1)/usr/sbin + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/udebug-cli $(1)/usr/sbin/udebug +endef + +$(eval $(call BuildPackage,libudebug)) +$(eval $(call BuildPackage,udebugd)) +$(eval $(call BuildPackage,ucode-mod-udebug)) +$(eval $(call BuildPackage,udebug-cli)) diff --git a/package/libs/udebug/files/udebug.config b/package/libs/udebug/files/udebug.config new file mode 100644 index 00000000000..36b653e3065 --- /dev/null +++ b/package/libs/udebug/files/udebug.config @@ -0,0 +1,8 @@ +config service hostapd + option enabled 0 + +config service wpa_supplicant + option enabled 0 + +config service netifd + option enabled 0 diff --git a/package/libs/udebug/files/udebug.init b/package/libs/udebug/files/udebug.init new file mode 100755 index 00000000000..b57e962f6fa --- /dev/null +++ b/package/libs/udebug/files/udebug.init @@ -0,0 +1,55 @@ +#!/bin/sh /etc/rc.common +# Copyright (c) 2021 OpenWrt.org + +START=11 + +USE_PROCD=1 +PROG=/usr/sbin/udebugd + +start_service() { + procd_open_instance + procd_set_param command "$PROG" + procd_set_param respawn + procd_close_instance +} + +get_vars() { + local cfg="$1" + uci show "udebug.$cfg" | while read LINE; do + cur="${LINE##udebug.$1.}" + [[ "$cur" = "$LINE" ]] && continue + var="${cur%%=*}" + [[ "$cur" = "$var" ]] && continue + echo "$var" + done +} + +add_debug_service() { + local cfg="$1" + + json_add_object "$cfg" + for var in $(get_vars "$cfg"); do + config_get val "$cfg" "$var" + json_add_string "$var" "$val" + done + json_close_object "$cfg" +} + +reload_service() { + config_load udebug + + json_init + json_add_object service + config_foreach add_debug_service service + json_close_object + ubus call udebug set_config "$(json_dump)" +} + +service_triggers() { + procd_add_reload_trigger udebug +} + +service_started() { + ubus -t 10 wait_for udebug + [ $? = 0 ] && reload_service +} diff --git a/package/network/config/netifd/Makefile b/package/network/config/netifd/Makefile index 2e70994e51b..ccd566e0a76 100644 --- a/package/network/config/netifd/Makefile +++ b/package/network/config/netifd/Makefile @@ -5,9 +5,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git -PKG_SOURCE_DATE:=2023-11-14 -PKG_SOURCE_VERSION:=8587c074f1eb2064c42adb0a6aa5073f695ab89d -PKG_MIRROR_HASH:=f5ceb771badd7a23cceb53537299580d4b483e2b3ec5de09b9c3c54692893dd9 +PKG_SOURCE_DATE:=2023-11-20 +PKG_SOURCE_VERSION:=f3e06e81b347bbdec1c6c71603328b6e442728d4 +PKG_MIRROR_HASH:=f16dd61aede5597fd7b5ee8e7752a916494281bc981b35c16e788ddb7409584a PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=GPL-2.0 @@ -21,7 +21,7 @@ include $(INCLUDE_DIR)/cmake.mk define Package/netifd SECTION:=base CATEGORY:=Base system - DEPENDS:=+libuci +libnl-tiny +libubus +ubus +ubusd +jshn +libubox + DEPENDS:=+libuci +libnl-tiny +libubus +ubus +ubusd +jshn +libubox +libudebug TITLE:=OpenWrt Network Interface Configuration Daemon endef diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile index f46c6275ef6..17f9dcb581d 100644 --- a/package/network/services/hostapd/Makefile +++ b/package/network/services/hostapd/Makefile @@ -79,7 +79,7 @@ ifneq ($(CONFIG_DRIVER_11AX_SUPPORT),) HOSTAPD_IEEE80211AX:=y endif -CORE_DEPENDS = +ucode +libubus +libucode +ucode-mod-fs +ucode-mod-nl80211 +ucode-mod-rtnl +ucode-mod-ubus +ucode-mod-uloop +libblobmsg-json +CORE_DEPENDS = +ucode +libubus +libucode +ucode-mod-fs +ucode-mod-nl80211 +ucode-mod-rtnl +ucode-mod-ubus +ucode-mod-uloop +libblobmsg-json +libudebug OPENSSL_DEPENDS = +PACKAGE_$(1):libopenssl +PACKAGE_$(1):libopenssl-legacy DRIVER_MAKEOPTS= \ @@ -585,7 +585,7 @@ TARGET_CPPFLAGS := \ -D_GNU_SOURCE \ $(if $(CONFIG_WPA_MSG_MIN_PRIORITY),-DCONFIG_MSG_MIN_PRIORITY=$(CONFIG_WPA_MSG_MIN_PRIORITY)) -TARGET_LDFLAGS += -lubox -lubus -lblobmsg_json -lucode -lm -lnl-tiny +TARGET_LDFLAGS += -lubox -lubus -lblobmsg_json -lucode -lm -lnl-tiny -ludebug ifdef CONFIG_WPA_ENABLE_WEP DRIVER_MAKEOPTS += CONFIG_WEP=y diff --git a/package/network/services/hostapd/files/hostapd.uc b/package/network/services/hostapd/files/hostapd.uc index 593840cca88..84138f29a58 100644 --- a/package/network/services/hostapd/files/hostapd.uc +++ b/package/network/services/hostapd/files/hostapd.uc @@ -278,12 +278,12 @@ function iface_reload_config(phydev, config, old_config) return false; let iface = hostapd.interfaces[phy]; + let iface_name = old_config.bss[0].ifname; if (!iface) { hostapd.printf(`Could not find previous interface ${iface_name}`); return false; } - let iface_name = old_config.bss[0].ifname; let first_bss = hostapd.bss[iface_name]; if (!first_bss) { hostapd.printf(`Could not find bss of previous interface ${iface_name}`); @@ -782,8 +782,33 @@ let main_obj = { }, }; +function handle_debug_config(cfg) { + hostapd.printf(`handle_debug_config: ${cfg}\n`); + if (!cfg) + return; + + let data = cfg.service; + if (!data) + return; + + data = data.hostapd; + if (!data) + return; + + hostapd.udebug_set(!!+data.enabled); +} + hostapd.data.ubus = ubus; hostapd.data.obj = ubus.publish("hostapd", main_obj); +hostapd.data.debug_sub = ubus.subscriber((req) => { + if (req.type != "config") + return; + + handle_debug_config(req.data); +}); + +hostapd.data.debug_sub.subscribe("udebug"); +handle_debug_config(ubus.call("udebug", "get_config", {})); function bss_event(type, name, data) { let ubus = hostapd.data.ubus; diff --git a/package/network/services/hostapd/files/wpa_supplicant.uc b/package/network/services/hostapd/files/wpa_supplicant.uc index d624f27cddc..aac144b3399 100644 --- a/package/network/services/hostapd/files/wpa_supplicant.uc +++ b/package/network/services/hostapd/files/wpa_supplicant.uc @@ -244,8 +244,32 @@ let main_obj = { }, }; +function handle_debug_config(cfg) { + if (!cfg) + return; + + let data = cfg.service; + if (!data) + return; + + data = data.wpa_supplicant; + if (!data) + return; + + wpas.udebug_set(!!+data.enabled); +} + wpas.data.ubus = ubus; wpas.data.obj = ubus.publish("wpa_supplicant", main_obj); +wpas.data.debug_sub = ubus.subscriber((req) => { + if (req.type != "config") + return; + + handle_debug_config(req.data); +}); + +wpas.data.debug_sub.subscribe("udebug"); +handle_debug_config(ubus.call("udebug", "get_config", {})); function iface_event(type, name, data) { let ubus = wpas.data.ubus; diff --git a/package/network/services/hostapd/files/wpad_acl.json b/package/network/services/hostapd/files/wpad_acl.json index d00fd945ba5..7532953cabd 100644 --- a/package/network/services/hostapd/files/wpad_acl.json +++ b/package/network/services/hostapd/files/wpad_acl.json @@ -9,8 +9,12 @@ }, "hostapd": { "methods": [ "apsta_state" ] + }, + "udebug": { + "methods": [ "get_config" ] } }, + "subscribe": [ "udebug" ], "publish": [ "hostapd", "hostapd.*", "wpa_supplicant", "wpa_supplicant.*" ], "send": [ "bss.*", "wps_credentials" ] } diff --git a/package/network/services/hostapd/patches/601-ucode_support.patch b/package/network/services/hostapd/patches/601-ucode_support.patch index 23f535b6852..cfdb51f356c 100644 --- a/package/network/services/hostapd/patches/601-ucode_support.patch +++ b/package/network/services/hostapd/patches/601-ucode_support.patch @@ -196,7 +196,7 @@ #ifdef CONFIG_BGSCAN if (state == WPA_COMPLETED && wpa_s->current_ssid != wpa_s->bgscan_ssid) -@@ -7596,6 +7597,7 @@ struct wpa_supplicant * wpa_supplicant_a +@@ -7594,6 +7595,7 @@ struct wpa_supplicant * wpa_supplicant_a #endif /* CONFIG_P2P */ wpas_ubus_add_bss(wpa_s); @@ -204,7 +204,7 @@ return wpa_s; } -@@ -7623,6 +7625,7 @@ int wpa_supplicant_remove_iface(struct w +@@ -7621,6 +7623,7 @@ int wpa_supplicant_remove_iface(struct w struct wpa_supplicant *parent = wpa_s->parent; #endif /* CONFIG_MESH */ @@ -212,7 +212,7 @@ wpas_ubus_free_bss(wpa_s); /* Remove interface from the global list of interfaces */ -@@ -7933,6 +7936,7 @@ struct wpa_global * wpa_supplicant_init( +@@ -7931,6 +7934,7 @@ struct wpa_global * wpa_supplicant_init( eloop_register_timeout(WPA_SUPPLICANT_CLEANUP_INTERVAL, 0, wpas_periodic, global, NULL); @@ -220,7 +220,7 @@ return global; } -@@ -7971,12 +7975,8 @@ int wpa_supplicant_run(struct wpa_global +@@ -7969,12 +7973,8 @@ int wpa_supplicant_run(struct wpa_global eloop_register_signal_terminate(wpa_supplicant_terminate, global); eloop_register_signal_reconfig(wpa_supplicant_reconfig, global); @@ -233,7 +233,7 @@ return 0; } -@@ -8009,6 +8009,8 @@ void wpa_supplicant_deinit(struct wpa_gl +@@ -8007,6 +8007,8 @@ void wpa_supplicant_deinit(struct wpa_gl wpas_notify_supplicant_deinitialized(global); @@ -395,7 +395,60 @@ { --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -1333,7 +1333,7 @@ static void wpa_driver_nl80211_event_rtm +@@ -73,6 +73,16 @@ enum nlmsgerr_attrs { + + #endif /* ANDROID */ + ++static void handle_nl_debug_hook(struct nl_msg *msg, int tx) ++{ ++ const struct nlmsghdr *nlh; ++ ++ if (!wpa_netlink_hook) ++ return; ++ ++ nlh = nlmsg_hdr(msg); ++ wpa_netlink_hook(tx, nlh, nlh->nlmsg_len); ++} + + static struct nl_sock * nl_create_handle(struct nl_cb *cb, const char *dbg) + { +@@ -379,6 +389,11 @@ static int no_seq_check(struct nl_msg *m + return NL_OK; + } + ++static int debug_handler(struct nl_msg *msg, void *arg) ++{ ++ handle_nl_debug_hook(msg, 0); ++ return NL_OK; ++} + + static void nl80211_nlmsg_clear(struct nl_msg *msg) + { +@@ -415,6 +430,7 @@ static int send_and_recv(struct nl80211_ + if (!msg) + return -ENOMEM; + ++ handle_nl_debug_hook(msg, 1); + cb = nl_cb_clone(global->nl_cb); + if (!cb) + goto out; +@@ -443,6 +459,7 @@ static int send_and_recv(struct nl80211_ + + err = 1; + ++ nl_cb_set(cb, NL_CB_MSG_IN, NL_CB_CUSTOM, debug_handler, NULL); + nl_cb_err(cb, NL_CB_CUSTOM, error_handler, &err); + nl_cb_set(cb, NL_CB_FINISH, NL_CB_CUSTOM, finish_handler, &err); + if (ack_handler_custom) { +@@ -919,6 +936,7 @@ nl80211_get_wiphy_data_ap(struct i802_bs + os_free(w); + return NULL; + } ++ nl_cb_set(w->nl_cb, NL_CB_MSG_IN, NL_CB_CUSTOM, debug_handler, NULL); + nl_cb_set(w->nl_cb, NL_CB_SEQ_CHECK, NL_CB_CUSTOM, + no_seq_check, NULL); + nl_cb_set(w->nl_cb, NL_CB_VALID, NL_CB_CUSTOM, +@@ -1333,7 +1351,7 @@ static void wpa_driver_nl80211_event_rtm } wpa_printf(MSG_DEBUG, "nl80211: Interface down (%s/%s)", namebuf, ifname); @@ -404,7 +457,7 @@ wpa_printf(MSG_DEBUG, "nl80211: Not the main interface (%s) - do not indicate interface down", drv->first_bss->ifname); -@@ -1369,7 +1369,7 @@ static void wpa_driver_nl80211_event_rtm +@@ -1369,7 +1387,7 @@ static void wpa_driver_nl80211_event_rtm } wpa_printf(MSG_DEBUG, "nl80211: Interface up (%s/%s)", namebuf, ifname); @@ -413,7 +466,23 @@ wpa_printf(MSG_DEBUG, "nl80211: Not the main interface (%s) - do not indicate interface up", drv->first_bss->ifname); -@@ -8432,6 +8432,7 @@ static void *i802_init(struct hostapd_da +@@ -1992,6 +2010,7 @@ static int wpa_driver_nl80211_init_nl_gl + /* Continue without vendor events */ + } + ++ nl_cb_set(global->nl_cb, NL_CB_MSG_IN, NL_CB_CUSTOM, debug_handler, NULL); + nl_cb_set(global->nl_cb, NL_CB_SEQ_CHECK, NL_CB_CUSTOM, + no_seq_check, NULL); + nl_cb_set(global->nl_cb, NL_CB_VALID, NL_CB_CUSTOM, +@@ -2160,6 +2179,7 @@ static int nl80211_init_bss(struct i802_ + if (!bss->nl_cb) + return -1; + ++ nl_cb_set(bss->nl_cb, NL_CB_MSG_IN, NL_CB_CUSTOM, debug_handler, NULL); + nl_cb_set(bss->nl_cb, NL_CB_SEQ_CHECK, NL_CB_CUSTOM, + no_seq_check, NULL); + nl_cb_set(bss->nl_cb, NL_CB_VALID, NL_CB_CUSTOM, +@@ -8432,6 +8452,7 @@ static void *i802_init(struct hostapd_da char master_ifname[IFNAMSIZ]; int ifindex, br_ifindex = 0; int br_added = 0; @@ -421,7 +490,7 @@ bss = wpa_driver_nl80211_drv_init(hapd, params->ifname, params->global_priv, 1, -@@ -8491,21 +8492,17 @@ static void *i802_init(struct hostapd_da +@@ -8491,21 +8512,17 @@ static void *i802_init(struct hostapd_da (params->num_bridge == 0 || !params->bridge[0])) add_ifidx(drv, br_ifindex, drv->ifindex); @@ -453,7 +522,7 @@ } if (drv->capa.flags2 & WPA_DRIVER_FLAGS2_CONTROL_PORT_RX) { -@@ -8875,6 +8872,50 @@ static int wpa_driver_nl80211_if_remove( +@@ -8875,6 +8892,50 @@ static int wpa_driver_nl80211_if_remove( return 0; } @@ -504,7 +573,7 @@ static int cookie_handler(struct nl_msg *msg, void *arg) { -@@ -10513,6 +10554,37 @@ static int driver_nl80211_if_remove(void +@@ -10513,6 +10574,37 @@ static int driver_nl80211_if_remove(void } @@ -542,7 +611,7 @@ static int driver_nl80211_send_mlme(void *priv, const u8 *data, size_t data_len, int noack, unsigned int freq, -@@ -13697,6 +13769,8 @@ const struct wpa_driver_ops wpa_driver_n +@@ -13697,6 +13789,8 @@ const struct wpa_driver_ops wpa_driver_n .set_acl = wpa_driver_nl80211_set_acl, .if_add = wpa_driver_nl80211_if_add, .if_remove = driver_nl80211_if_remove, @@ -551,3 +620,52 @@ .send_mlme = driver_nl80211_send_mlme, .get_hw_feature_data = nl80211_get_hw_feature_data, .sta_add = wpa_driver_nl80211_sta_add, +--- a/src/utils/wpa_debug.c ++++ b/src/utils/wpa_debug.c +@@ -26,6 +26,10 @@ static FILE *wpa_debug_tracing_file = NU + #define WPAS_TRACE_PFX "wpas <%d>: " + #endif /* CONFIG_DEBUG_LINUX_TRACING */ + ++void (*wpa_printf_hook)(int level, const char *fmt, va_list ap); ++void (*wpa_hexdump_hook)(int level, const char *title, const void *buf, ++ size_t len); ++void (*wpa_netlink_hook)(int tx, const void *data, size_t len); + + int wpa_debug_level = MSG_INFO; + int wpa_debug_show_keys = 0; +@@ -210,6 +214,12 @@ void _wpa_printf(int level, const char * + { + va_list ap; + ++ if (wpa_printf_hook) { ++ va_start(ap, fmt); ++ wpa_printf_hook(level, fmt, ap); ++ va_end(ap); ++ } ++ + if (level >= wpa_debug_level) { + #ifdef CONFIG_ANDROID_LOG + va_start(ap, fmt); +@@ -260,6 +270,9 @@ void _wpa_hexdump(int level, const char + { + size_t i; + ++ if (wpa_hexdump_hook) ++ wpa_hexdump_hook(level, title, buf, len); ++ + #ifdef CONFIG_DEBUG_LINUX_TRACING + if (wpa_debug_tracing_file != NULL) { + fprintf(wpa_debug_tracing_file, +--- a/src/utils/wpa_debug.h ++++ b/src/utils/wpa_debug.h +@@ -11,6 +11,10 @@ + + #include "wpabuf.h" + ++extern void (*wpa_printf_hook)(int level, const char *fmt, va_list ap); ++extern void (*wpa_hexdump_hook)(int level, const char *title, ++ const void *buf, size_t len); ++extern void (*wpa_netlink_hook)(int tx, const void *data, size_t len); + extern int wpa_debug_level; + extern int wpa_debug_show_keys; + extern int wpa_debug_timestamp; diff --git a/package/network/services/hostapd/src/src/ap/ucode.c b/package/network/services/hostapd/src/src/ap/ucode.c index af97091be55..16d1b515360 100644 --- a/package/network/services/hostapd/src/src/ap/ucode.c +++ b/package/network/services/hostapd/src/src/ap/ucode.c @@ -711,6 +711,7 @@ int hostapd_ucode_init(struct hapd_interfaces *ifaces) { "freq_info", uc_wpa_freq_info }, { "add_iface", uc_hostapd_add_iface }, { "remove_iface", uc_hostapd_remove_iface }, + { "udebug_set", uc_wpa_udebug_set }, }; static const uc_function_list_t bss_fns[] = { { "ctrl", uc_hostapd_bss_ctrl }, diff --git a/package/network/services/hostapd/src/src/utils/ucode.c b/package/network/services/hostapd/src/src/utils/ucode.c index 2beeb9a7ff6..14fd6bc5ec9 100644 --- a/package/network/services/hostapd/src/src/utils/ucode.c +++ b/package/network/services/hostapd/src/src/utils/ucode.c @@ -4,12 +4,20 @@ #include "crypto/crypto.h" #include "crypto/sha1.h" #include "common/ieee802_11_common.h" +#include +#include +#include #include #include +#include static uc_value_t *registry; static uc_vm_t vm; static struct uloop_timeout gc_timer; +static struct udebug ud; +static struct udebug_buf ud_log, ud_nl[3]; + +#define UDEBUG_FLAG_RX_FRAME (1ULL << 0) static void uc_gc_timer(struct uloop_timeout *timeout) { @@ -251,6 +259,115 @@ int wpa_ucode_call_prepare(const char *fname) return 0; } +static void udebug_printf_hook(int level, const char *fmt, va_list ap) +{ + udebug_entry_init(&ud_log); + udebug_entry_vprintf(&ud_log, fmt, ap); + udebug_entry_add(&ud_log); +} + +static void udebug_hexdump_hook(int level, const char *title, + const void *data, size_t len) +{ + char *buf; + + udebug_entry_init(&ud_log); + udebug_entry_printf(&ud_log, "%s - hexdump:", title); + buf = udebug_entry_append(&ud_log, NULL, 3 * len); + for (size_t i = 0; i < len; i++) + buf += sprintf(buf, " %02x", *(uint8_t *)(data + i)); + udebug_entry_add(&ud_log); +} + +static void udebug_netlink_hook(int tx, const void *data, size_t len) +{ + struct { + uint16_t pkttype; + uint16_t arphdr; + uint16_t _pad[5]; + uint16_t proto; + } hdr = { + .pkttype = host_to_be16(tx ? 7 : 6), + .arphdr = host_to_be16(824), + .proto = host_to_be16(16), + }; + const struct nlmsghdr *nlh = data; + const struct genlmsghdr *gnlh = data + NLMSG_HDRLEN; + struct udebug_buf *buf = &ud_nl[!!tx]; + + if (nlh->nlmsg_type == 0x10) + buf = &ud_nl[2]; + else if (!tx && gnlh->cmd == NL80211_CMD_FRAME && + !(udebug_buf_flags(buf) & UDEBUG_FLAG_RX_FRAME)) + return; + + udebug_entry_init(buf); + udebug_entry_append(buf, &hdr, sizeof(hdr)); + udebug_entry_append(buf, data, len); + udebug_entry_add(buf); +} + +uc_value_t *uc_wpa_udebug_set(uc_vm_t *vm, size_t nargs) +{ + static const struct udebug_buf_meta meta_log = { + .name = "wpa_log", + .format = UDEBUG_FORMAT_STRING, + }; + static const struct udebug_buf_meta meta_nl_ll = { + .name = "wpa_nl_ctrl", + .format = UDEBUG_FORMAT_PACKET, + .sub_format = UDEBUG_DLT_NETLINK, + }; + static const struct udebug_buf_meta meta_nl_tx = { + .name = "wpa_nl_tx", + .format = UDEBUG_FORMAT_PACKET, + .sub_format = UDEBUG_DLT_NETLINK, + }; + static const struct udebug_buf_flag rx_flags[] = { + { "rx_frame", UDEBUG_FLAG_RX_FRAME }, + }; + static const struct udebug_buf_meta meta_nl_rx = { + .name = "wpa_nl_rx", + .format = UDEBUG_FORMAT_PACKET, + .sub_format = UDEBUG_DLT_NETLINK, + .flags = rx_flags, + .n_flags = ARRAY_SIZE(rx_flags), + }; + bool val = ucv_is_truish(uc_fn_arg(0)); + static bool enabled = false; + + if (enabled == val) + return ucv_boolean_new(true); + + enabled = val; + if (val) { + udebug_init(&ud); + udebug_auto_connect(&ud, NULL); + udebug_buf_init(&ud_log, 1024, 64 * 1024); + udebug_buf_add(&ud, &ud_log, &meta_log); + udebug_buf_init(&ud_nl[0], 1024, 256 * 1024); + udebug_buf_add(&ud, &ud_nl[0], &meta_nl_rx); + udebug_buf_init(&ud_nl[1], 1024, 64 * 1024); + udebug_buf_add(&ud, &ud_nl[1], &meta_nl_tx); + udebug_buf_init(&ud_nl[2], 256, 32 * 1024); + udebug_buf_add(&ud, &ud_nl[2], &meta_nl_ll); + + wpa_printf_hook = udebug_printf_hook; + wpa_hexdump_hook = udebug_hexdump_hook; + wpa_netlink_hook = udebug_netlink_hook; + } else { + for (size_t i = 0; i < ARRAY_SIZE(ud_nl); i++) + udebug_buf_free(&ud_nl[i]); + udebug_buf_free(&ud_log); + udebug_free(&ud); + wpa_printf_hook = NULL; + wpa_hexdump_hook = NULL; + wpa_netlink_hook = NULL; + } + + return ucv_boolean_new(true); +} + uc_value_t *wpa_ucode_global_init(const char *name, uc_resource_type_t *global_type) { uc_value_t *global = uc_resource_new(global_type, NULL); diff --git a/package/network/services/hostapd/src/src/utils/ucode.h b/package/network/services/hostapd/src/src/utils/ucode.h index 2c1886976ee..c083241e079 100644 --- a/package/network/services/hostapd/src/src/utils/ucode.h +++ b/package/network/services/hostapd/src/src/utils/ucode.h @@ -21,6 +21,7 @@ int wpa_ucode_registry_add(uc_value_t *reg, uc_value_t *val); uc_value_t *wpa_ucode_registry_get(uc_value_t *reg, int idx); uc_value_t *wpa_ucode_registry_remove(uc_value_t *reg, int idx); +uc_value_t *uc_wpa_udebug_set(uc_vm_t *vm, size_t nargs); uc_value_t *uc_wpa_printf(uc_vm_t *vm, size_t nargs); uc_value_t *uc_wpa_getpid(uc_vm_t *vm, size_t nargs); uc_value_t *uc_wpa_sha1(uc_vm_t *vm, size_t nargs); diff --git a/package/network/services/hostapd/src/wpa_supplicant/ucode.c b/package/network/services/hostapd/src/wpa_supplicant/ucode.c index 6cba73dcd53..397f85bde7f 100644 --- a/package/network/services/hostapd/src/wpa_supplicant/ucode.c +++ b/package/network/services/hostapd/src/wpa_supplicant/ucode.c @@ -262,6 +262,7 @@ int wpas_ucode_init(struct wpa_global *gl) { "getpid", uc_wpa_getpid }, { "add_iface", uc_wpas_add_iface }, { "remove_iface", uc_wpas_remove_iface }, + { "udebug_set", uc_wpa_udebug_set }, }; static const uc_function_list_t iface_fns[] = { { "status", uc_wpas_iface_status }, diff --git a/package/network/services/umdns/Makefile b/package/network/services/umdns/Makefile index 4510bdeb688..5689a6d78d2 100644 --- a/package/network/services/umdns/Makefile +++ b/package/network/services/umdns/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=umdns -PKG_RELEASE:=5 +PKG_RELEASE:=1 PKG_SOURCE_URL=$(PROJECT_GIT)/project/mdnsd.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2023-10-19 -PKG_SOURCE_VERSION:=d45c443aa1e6514aab58bbbf9311913e484d31a6 -PKG_MIRROR_HASH:=20d91d867f4f34a37c7b2a600327884375f9f16c1ea9bbb3199347d8b617d856 +PKG_SOURCE_DATE:=2023-11-21 +PKG_SOURCE_VERSION:=b1e023eda3584da4a5dfbc33016839f977a02040 +PKG_MIRROR_HASH:=e0619afc3b8e1b8a627b35bbe0734746303db02e6d62fd8a3ff047d4fbaa0522 PKG_MAINTAINER:=John Crispin PKG_LICENSE:=LGPL-2.1 @@ -27,7 +27,7 @@ define Package/umdns SECTION:=net CATEGORY:=Network TITLE:=OpenWrt Multicast DNS Daemon - DEPENDS:=+libubox +libubus +libblobmsg-json + DEPENDS:=+libubox +libubus +libblobmsg-json +libudebug endef TARGET_CFLAGS += -I$(STAGING_DIR)/usr/include diff --git a/package/network/services/umdns/files/umdns.json b/package/network/services/umdns/files/umdns.json index 554b6166330..032b498e680 100644 --- a/package/network/services/umdns/files/umdns.json +++ b/package/network/services/umdns/files/umdns.json @@ -19,6 +19,7 @@ "fcntl", "fcntl64", "fstat", + "ftruncate", "getdents64", "getsockname", "getrandom", @@ -48,6 +49,7 @@ "statx", "time", "uname", + "unlinkat", "write", "writev" ], diff --git a/package/system/ubus/Makefile b/package/system/ubus/Makefile index 82c4dc601a2..42737ff470a 100644 --- a/package/system/ubus/Makefile +++ b/package/system/ubus/Makefile @@ -5,9 +5,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubus.git -PKG_SOURCE_DATE:=2023-06-05 -PKG_SOURCE_VERSION:=f787c97b34894a38b15599886cacbca01271684f -PKG_MIRROR_HASH:=f4e898eb9207f069652f1767835f6aa9f015df2282d51e50ab57a0c3736f36e3 +PKG_SOURCE_DATE:=2023-11-14 +PKG_SOURCE_VERSION:=b3e8c4ef07ebb6f0f34a5c1f0dc1539068363619 +PKG_MIRROR_HASH:=bb7296b17d5a59b9080d4c9ae188dee49f49c0ce88a5cbe0317102123583d663 PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE)) CMAKE_INSTALL:=1 diff --git a/package/utils/firmware-utils/Makefile b/package/utils/firmware-utils/Makefile index 1316fa5c6b1..432d3797ac0 100644 --- a/package/utils/firmware-utils/Makefile +++ b/package/utils/firmware-utils/Makefile @@ -3,13 +3,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=firmware-utils -PKG_RELEASE:=2 +PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git -PKG_SOURCE_DATE:=2023-05-18 -PKG_SOURCE_VERSION:=02cdbc6a4d61605c008efef09162f772f553fcde -PKG_MIRROR_HASH:=f5188fc38bb03ddbcc34763ff049597e2d8af98c0854910dc87f10e5927096e2 +PKG_SOURCE_DATE:=2023-11-21 +PKG_SOURCE_VERSION:=12bf1a99bd6eebae90caa144bb4d8b0cd763ff8f +PKG_MIRROR_HASH:=f711bf80123a6f14737da27ab8dfff87a4d429c74057de355b1693e89f223abc PKG_BUILD_DEPENDS:=openssl zlib diff --git a/scripts/sercomm-pid.py b/scripts/sercomm-pid.py index 4d88a678396..2c246fc298b 100755 --- a/scripts/sercomm-pid.py +++ b/scripts/sercomm-pid.py @@ -34,7 +34,7 @@ def get_pid(args): enc = args.hw_version.rjust(8, '0').encode('ascii') struct.pack_into('>8s', buf, 0x0, enc) - enc = binascii.hexlify(args.hw_id.encode()) + enc = binascii.hexlify(args.hw_id.encode()).upper() struct.pack_into('>6s', buf, 0x8, enc) enc = args.sw_version.rjust(4, '0').encode('ascii') diff --git a/target/linux/armsr/base-files.mk b/target/linux/armsr/base-files.mk new file mode 100644 index 00000000000..88ba97d38a3 --- /dev/null +++ b/target/linux/armsr/base-files.mk @@ -0,0 +1,8 @@ +GRUB_SERIAL:=$(call qstrip,$(CONFIG_GRUB_SERIAL)) +ifeq ($(GRUB_SERIAL),) +$(error This platform requires CONFIG_GRUB_SERIAL be set!) +endif + +define Package/base-files/install-target + $(SED) "s#@GRUB_SERIAL@#$(GRUB_SERIAL)#" $(1)/etc/inittab +endef diff --git a/target/linux/armsr/base-files/etc/inittab b/target/linux/armsr/base-files/etc/inittab index 51832eb7756..87d5460d323 100644 --- a/target/linux/armsr/base-files/etc/inittab +++ b/target/linux/armsr/base-files/etc/inittab @@ -1,7 +1,7 @@ ::sysinit:/etc/init.d/rcS S boot ::shutdown:/etc/init.d/rcS K shutdown ttyAMA0::askfirst:/usr/libexec/login.sh -ttyS0::askfirst:/usr/libexec/login.sh +@GRUB_SERIAL@::askfirst:/usr/libexec/login.sh tty0::askfirst:/usr/libexec/login.sh hvc0::askfirst:/usr/libexec/login.sh ttymxc0::askfirst:/usr/libexec/login.sh diff --git a/target/linux/armsr/image/Makefile b/target/linux/armsr/image/Makefile index 1df9657385d..e5be3fbe38f 100644 --- a/target/linux/armsr/image/Makefile +++ b/target/linux/armsr/image/Makefile @@ -17,14 +17,10 @@ endif GRUB_SERIAL:=$(call qstrip,$(CONFIG_GRUB_SERIAL)) -ifneq ($(GRUB_SERIAL),) - GRUB_SERIAL_CONFIG := serial --unit=0 --speed=$(CONFIG_GRUB_BAUDRATE) --word=8 --parity=no --stop=1 --rtscts=$(if $(CONFIG_GRUB_FLOWCONTROL),on,off) - GRUB_TERMINALS += serial -endif +GRUB_SERIAL_CONFIG := serial --unit=0 --speed=$(CONFIG_GRUB_BAUDRATE) --word=8 --parity=no --stop=1 --rtscts=$(if $(CONFIG_GRUB_FLOWCONTROL),on,off) +GRUB_TERMINALS += serial -ifneq ($(GRUB_TERMINALS),) - GRUB_TERMINAL_CONFIG := terminal_input $(GRUB_TERMINALS); terminal_output $(GRUB_TERMINALS) -endif +GRUB_TERMINAL_CONFIG := terminal_input $(GRUB_TERMINALS); terminal_output $(GRUB_TERMINALS) ROOTPART:=$(call qstrip,$(CONFIG_TARGET_ROOTFS_PARTNAME)) ROOTPART:=$(if $(ROOTPART),$(ROOTPART),PARTUUID=$(IMG_PART_SIGNATURE)-02) diff --git a/target/linux/ath79/dts/qca9563_dlink_covr-p2500-a1.dts b/target/linux/ath79/dts/qca9563_dlink_covr-p2500-a1.dts new file mode 100644 index 00000000000..43113ea7b56 --- /dev/null +++ b/target/linux/ath79/dts/qca9563_dlink_covr-p2500-a1.dts @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qca956x.dtsi" + +#include +#include +#include + +/ { + compatible = "dlink,covr-p2500-a1", "qca,qca9563"; + model = "D-Link COVR-P2500 A1"; + + aliases { + led-boot = &led_power_green; + led-failsafe = &led_power_red; + led-running = &led_power_green; + led-upgrade = &led_power_red; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + linux,code = ; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + }; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&jtag_disable_pins>; + + lan { + label = "green:lan"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + + led_power_green: power_green { + label = "green:power"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + wlan5g { + label = "green:wlan5g"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0radio"; + }; + + led_power_red: power_red { + label = "red:power"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + wlan2g { + label = "green:wlan2g"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1radio"; + }; + }; + + virtual_flash { + compatible = "mtd-concat"; + + devices = <&fwconcat0 &fwconcat1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + compatible = "openwrt,uimage", "denx,uimage"; + openwrt,ih-magic = <0x68737173>; + label = "firmware"; + reg = <0x0 0x0>; + }; + }; + }; +}; + +&spi { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x40000 0x10000>; + read-only; + }; + + fwconcat0: partition@50000 { + label = "fwconcat0"; + reg = <0x50000 0xe30000>; + }; + + partition@e80000 { + label = "loader"; + reg = <0xe80000 0x10000>; + read-only; + }; + + fwconcat1: partition@e90000 { + label = "fwconcat1"; + reg = <0xe90000 0x160000>; + }; + + art: partition@ff0000 { + label = "art"; + reg = <0xff0000 0x10000>; + read-only; + + compatible = "nvmem-cells"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + calibration_ath9k: calibration@1000 { + reg = <0x1000 0x440>; + }; + + precalibration_ath10k: pre-calibration@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; +}; + +&pcie { + status = "okay"; + + wifi@0,0 { + compatible = "qcom,ath10k"; + reg = <0 0 0 0 0>; + + nvmem-cells = <&precalibration_ath10k>; + nvmem-cell-names = "pre-calibration"; + }; +}; + +&gpio { + phy-reset { + gpio-hog; + gpios = <11 GPIO_ACTIVE_LOW>; + output-low; + line-name = "phy-reset"; + }; +}; + +&mdio0 { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + phy-mode = "sgmii"; + qca,mib-poll-interval = <500>; + + qca,ar8327-initvals = < + 0x04 0x00080080 /* PORT0 PAD MODE CTRL */ + 0x10 0x81000080 /* POWER_ON_STRAP */ + 0x50 0xcc35cc35 /* LED_CTRL0 */ + 0x54 0xcb37cb37 /* LED_CTRL1 */ + 0x58 0x00000000 /* LED_CTRL2 */ + 0x5c 0x00f3cf00 /* LED_CTRL3 */ + 0x7c 0x0000007e /* PORT0_STATUS */ + >; + }; +}; + +ð0 { + status = "okay"; + + pll-data = <0x03000101 0x00000101 0x00001919>; + + phy-mode = "sgmii"; + phy-handle = <&phy0>; +}; + +&wmac { + status = "okay"; + + nvmem-cells = <&calibration_ath9k>; + nvmem-cell-names = "calibration"; +}; diff --git a/target/linux/ath79/generic/base-files/etc/board.d/01_leds b/target/linux/ath79/generic/base-files/etc/board.d/01_leds index 4ee347c1415..c1d411b9a9c 100644 --- a/target/linux/ath79/generic/base-files/etc/board.d/01_leds +++ b/target/linux/ath79/generic/base-files/etc/board.d/01_leds @@ -230,6 +230,9 @@ devolo,dlan-pro-1200plus-ac|\ devolo,magic-2-wifi) ucidef_set_led_netdev "plcw" "dLAN" "white:dlan" "eth0.1" "rx" ;; +dlink,covr-p2500-a1) + ucidef_set_led_switch "lan" "LAN" "green:lan" "switch0" "0x0e" "" "link" + ;; dlink,dap-1330-a1|\ dlink,dap-1365-a1) ucidef_set_rssimon "wlan0" "200000" "1" diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network index 5d87ea8405d..a9b78e4350d 100644 --- a/target/linux/ath79/generic/base-files/etc/board.d/02_network +++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network @@ -286,6 +286,10 @@ ath79_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth0" "2:wan" "3:lan" "4:lan" ;; + dlink,covr-p2500-a1) + ucidef_add_switch "switch0" \ + "0@eth0" "1:lan" "2:lan" "3:wan" "4:plc" + ;; dlink,dap-2695-a1) ucidef_add_switch "switch0" \ "0@eth0" "2:lan" "3:wan" "6@eth1" @@ -634,6 +638,13 @@ ath79_setup_macs() devolo,magic-2-wifi) label_mac=$(macaddr_add "$(mtd_get_mac_binary art 0x1002)" 3) ;; + dlink,covr-p2500-a1) + lan_mac=$(mtd_get_mac_ascii art "protest_lan_mac") + wan_mac=$(mtd_get_mac_ascii art "protest_lan_mac") + label_mac=$(mtd_get_mac_ascii art "protest_plc_mac") + plc_mac=$(mtd_get_mac_ascii art "protest_plc_mac") + [ -n "$plc_mac" ] && ucidef_set_interface_macaddr "plc" $plc_mac + ;; dlink,dap-1330-a1|\ dlink,dap-1365-a1|\ dlink,dch-g020-a1) diff --git a/target/linux/ath79/generic/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ath79/generic/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac index 5d74208a5d8..ccff35e5c63 100644 --- a/target/linux/ath79/generic/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac +++ b/target/linux/ath79/generic/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac @@ -17,6 +17,12 @@ case "$board" in adtran,bsap1840) macaddr_add "$(mtd_get_mac_binary 'Board data' 2)" $(($PHYNBR * 8 + 1)) > /sys${DEVPATH}/macaddress ;; + dlink,covr-p2500-a1) + [ "$PHYNBR" -eq 0 ] && \ + mtd_get_mac_ascii art "protest_ath1_mac" > /sys${DEVPATH}/macaddress + [ "$PHYNBR" -eq 1 ] && \ + mtd_get_mac_ascii art "protest_ath0_mac" > /sys${DEVPATH}/macaddress + ;; dlink,dap-1330-a1|\ dlink,dap-1365-a1|\ dlink,dch-g020-a1) diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk index b74ce345097..e6e78b92875 100644 --- a/target/linux/ath79/image/generic.mk +++ b/target/linux/ath79/image/generic.mk @@ -33,6 +33,17 @@ define Build/cybertan-trx -rm $@-empty.bin endef +define Build/dlink-sge-signature + ( \ + crc=$$(gzip -c $@ | tail -c 8 | od -An -tx4 --endian little | cut -d " " -f2); \ + cat $@; \ + $(MKHASH) md5 $@ ; \ + echo $(1); \ + echo -n $$crc; \ + ) > $@.new + mv $@.new $@ +endef + define Build/edimax-headers $(eval edimax_magic=$(word 1,$(1))) $(eval edimax_model=$(word 2,$(1))) @@ -995,6 +1006,26 @@ define Device/devolo_magic-2-wifi endef TARGET_DEVICES += devolo_magic-2-wifi +define Device/dlink_covr-p2500-a1 + $(Device/loader-okli-uimage) + SOC := qca9563 + DEVICE_VENDOR := D-Link + DEVICE_MODEL := COVR-P2500 + DEVICE_VARIANT := A1 + DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct + LOADER_FLASH_OFFS := 0x050000 + LOADER_KERNEL_MAGIC := 0x68737173 + KERNEL := kernel-bin | append-dtb | lzma | uImage lzma -M 0x68737173 + IMAGE_SIZE := 14528k + IMAGES += factory.bin recovery.bin + IMAGE/recovery.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | \ + append-rootfs | pad-rootfs | check-size | pad-to 14528k | \ + append-loader-okli-uimage $(1) | pad-to 15616k + IMAGE/factory.bin := $$(IMAGE/recovery.bin) | \ + dlink-sge-image COVR-P2500 | dlink-sge-signature COVR-P2500 +endef +TARGET_DEVICES += dlink_covr-p2500-a1 + define Device/dlink_dap-13xx SOC := qca9533 DEVICE_VENDOR := D-Link diff --git a/target/linux/bcm27xx/patches-6.1/950-0606-hwrng-bcm2835-sleep-more-intelligently.patch b/target/linux/bcm27xx/patches-6.1/950-0606-hwrng-bcm2835-sleep-more-intelligently.patch index 40c1091106a..db806313ccd 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0606-hwrng-bcm2835-sleep-more-intelligently.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0606-hwrng-bcm2835-sleep-more-intelligently.patch @@ -50,10 +50,10 @@ Signed-off-by: Phil Elwell + while (!num_words) { + if (!wait || !retries) return 0; -- hwrng_msleep(rng, 1000); +- hwrng_yield(rng); + retries--; + usleep_range((u32)RNG_US_PER_WORD, -+ (u32)RNG_US_PER_WORD * RNG_FIFO_WORDS); ++ (u32)RNG_US_PER_WORD * RNG_FIFO_WORDS); + num_words = rng_readl(priv, RNG_STATUS) >> 24; } diff --git a/target/linux/bcm53xx/patches-6.1/905-BCM53573-minor-hacks.patch b/target/linux/bcm53xx/patches-6.1/905-BCM53573-minor-hacks.patch index 0d4962462b4..0a52ca98eeb 100644 --- a/target/linux/bcm53xx/patches-6.1/905-BCM53573-minor-hacks.patch +++ b/target/linux/bcm53xx/patches-6.1/905-BCM53573-minor-hacks.patch @@ -61,7 +61,7 @@ Signed-off-by: Rafał Miłecki #include #include #include -@@ -1028,6 +1029,16 @@ static void __init arch_timer_of_configu +@@ -1029,6 +1030,16 @@ static void __init arch_timer_of_configu if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) arch_timer_rate = rate; diff --git a/target/linux/bmips/dts/bcm63167-sercomm-h500-s.dtsi b/target/linux/bmips/dts/bcm63167-sercomm-h500-s.dtsi index 95f330d6c53..4e4431f27ce 100644 --- a/target/linux/bmips/dts/bcm63167-sercomm-h500-s.dtsi +++ b/target/linux/bmips/dts/bcm63167-sercomm-h500-s.dtsi @@ -187,6 +187,16 @@ label = "cferom"; reg = <0x0000000 0x0020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cferom_6a0: macaddr@6a0 { + reg = <0x6a0 0x6>; + }; + }; }; partition@20000 { @@ -284,13 +294,3 @@ &usbh { status = "okay"; }; - -&cferom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cferom_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm63168-comtrend-vr-3032u.dts b/target/linux/bmips/dts/bcm63168-comtrend-vr-3032u.dts index 5196f90afa8..d4520661a58 100644 --- a/target/linux/bmips/dts/bcm63168-comtrend-vr-3032u.dts +++ b/target/linux/bmips/dts/bcm63168-comtrend-vr-3032u.dts @@ -170,6 +170,16 @@ label = "cferom"; reg = <0x0000000 0x0020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cferom_6a0: macaddr@6a0 { + reg = <0x6a0 0x6>; + }; + }; }; partition@20000 { @@ -228,13 +238,3 @@ &usbh { status = "okay"; }; - -&cferom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cferom_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts b/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts index 7b0ebf2aefc..bfa9835b26e 100644 --- a/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts +++ b/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts @@ -46,9 +46,8 @@ pci-bus = <1>; pci-dev = <0>; - nvmem-cells = <&macaddr_cferom_6a0>; + nvmem-cells = <&macaddr_cferom_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm4360-sprom.bin"; }; @@ -61,7 +60,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cferom_6a0>; + nvmem-cells = <&macaddr_cferom_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -196,6 +195,18 @@ label = "cferom"; reg = <0x0000000 0x0020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cferom_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -309,13 +320,3 @@ &usbh { status = "okay"; }; - -&cferom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cferom_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm63169-comtrend-vg-8050.dts b/target/linux/bmips/dts/bcm63169-comtrend-vg-8050.dts index bf96673af8a..be7f90fbd93 100644 --- a/target/linux/bmips/dts/bcm63169-comtrend-vg-8050.dts +++ b/target/linux/bmips/dts/bcm63169-comtrend-vg-8050.dts @@ -185,6 +185,16 @@ label = "cferom"; reg = <0x0000000 0x0020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cferom_6a0: macaddr@6a0 { + reg = <0x6a0 0x6>; + }; + }; }; partition@20000 { @@ -225,13 +235,3 @@ &usbh { status = "okay"; }; - -&cferom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cferom_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6318-comtrend-ar-5315u.dts b/target/linux/bmips/dts/bcm6318-comtrend-ar-5315u.dts index 45ed6e2a3b7..3321bbd0045 100644 --- a/target/linux/bmips/dts/bcm6318-comtrend-ar-5315u.dts +++ b/target/linux/bmips/dts/bcm6318-comtrend-ar-5315u.dts @@ -38,9 +38,8 @@ pci-bus = <1>; pci-dev = <0>; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm43217-sprom.bin"; brcm,sprom-fixups = <6 0x1c00>, @@ -64,7 +63,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -90,6 +89,18 @@ reg = <0x000000 0x010000>; label = "cfe"; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@10000 { @@ -247,13 +258,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6328-arcadyan-ar7516.dts b/target/linux/bmips/dts/bcm6328-arcadyan-ar7516.dts index cc50f575499..779f1da1b9f 100644 --- a/target/linux/bmips/dts/bcm6328-arcadyan-ar7516.dts +++ b/target/linux/bmips/dts/bcm6328-arcadyan-ar7516.dts @@ -36,9 +36,8 @@ pci-bus = <1>; pci-dev = <0>; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm43227-sprom.bin"; }; @@ -51,7 +50,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -74,6 +73,18 @@ label = "cfe"; reg = <0x000000 0x010000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@10000 { @@ -174,13 +185,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6328-comtrend-ar-5381u.dts b/target/linux/bmips/dts/bcm6328-comtrend-ar-5381u.dts index 7499e7090ff..fc7462810c9 100644 --- a/target/linux/bmips/dts/bcm6328-comtrend-ar-5381u.dts +++ b/target/linux/bmips/dts/bcm6328-comtrend-ar-5381u.dts @@ -31,9 +31,8 @@ pci-bus = <1>; pci-dev = <0>; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm43225-sprom.bin"; brcm,sprom-fixups = <97 0xfee5>, @@ -52,7 +51,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -78,6 +77,18 @@ reg = <0x000000 0x010000>; label = "cfe"; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@10000 { @@ -178,13 +189,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6328-comtrend-ar-5387un.dts b/target/linux/bmips/dts/bcm6328-comtrend-ar-5387un.dts index a0d1c117f74..ba15a642654 100644 --- a/target/linux/bmips/dts/bcm6328-comtrend-ar-5387un.dts +++ b/target/linux/bmips/dts/bcm6328-comtrend-ar-5387un.dts @@ -31,9 +31,8 @@ pci-bus = <1>; pci-dev = <0>; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm43225-sprom.bin"; brcm,sprom-fixups = <2 0x05bb>, @@ -70,7 +69,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -96,6 +95,18 @@ reg = <0x000000 0x010000>; label = "cfe"; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@10000 { @@ -205,13 +216,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6328-nucom-r5010unv2.dts b/target/linux/bmips/dts/bcm6328-nucom-r5010unv2.dts index 826b2a61e25..b9cbae7af8e 100644 --- a/target/linux/bmips/dts/bcm6328-nucom-r5010unv2.dts +++ b/target/linux/bmips/dts/bcm6328-nucom-r5010unv2.dts @@ -38,9 +38,8 @@ pci-bus = <1>; pci-dev = <0>; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm43217-sprom.bin"; }; @@ -53,7 +52,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -76,6 +75,18 @@ label = "cfe"; reg = <0x000000 0x010000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@10000 { @@ -204,13 +215,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6328-sercomm-ad1018.dts b/target/linux/bmips/dts/bcm6328-sercomm-ad1018.dts index 5d182668188..aefa72235f1 100644 --- a/target/linux/bmips/dts/bcm6328-sercomm-ad1018.dts +++ b/target/linux/bmips/dts/bcm6328-sercomm-ad1018.dts @@ -45,9 +45,8 @@ pci-bus = <1>; pci-dev = <0>; - nvmem-cells = <&macaddr_cferom_6a0>; + nvmem-cells = <&macaddr_cferom_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm43217-sprom.bin"; brcm,sprom-fixups = <6 0x1c00>, @@ -77,7 +76,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cferom_6a0>; + nvmem-cells = <&macaddr_cferom_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -192,6 +191,18 @@ label = "cferom"; reg = <0x0000000 0x0020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cferom_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -300,13 +311,3 @@ &usbh { status = "okay"; }; - -&cferom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cferom_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6358-huawei-hg556a-b.dts b/target/linux/bmips/dts/bcm6358-huawei-hg556a-b.dts index d5f162846d2..c30612191eb 100644 --- a/target/linux/bmips/dts/bcm6358-huawei-hg556a-b.dts +++ b/target/linux/bmips/dts/bcm6358-huawei-hg556a-b.dts @@ -134,7 +134,7 @@ ðernet1 { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; phy-mode = "mii"; @@ -162,9 +162,8 @@ qca,no-eeprom; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; #gpio-cells = <2>; gpio-controller; @@ -183,6 +182,18 @@ label = "cfe"; reg = <0x000000 0x020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -195,6 +206,16 @@ label = "cal_data"; reg = <0xee0000 0x100000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + cal_data_1e000: cal@1e000 { + reg = <0x1e000 0xeb8>; + }; + }; }; partition@fe0000 { @@ -211,23 +232,3 @@ &usbh { status = "okay"; }; - -&cal_data { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - cal_data_1e000: cal@1e000 { - reg = <0x1e000 0xeb8>; - }; -}; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6362-huawei-hg253s-v2.dts b/target/linux/bmips/dts/bcm6362-huawei-hg253s-v2.dts index f562bcd9b2b..47be99133d3 100644 --- a/target/linux/bmips/dts/bcm6362-huawei-hg253s-v2.dts +++ b/target/linux/bmips/dts/bcm6362-huawei-hg253s-v2.dts @@ -164,6 +164,16 @@ label = "cferom"; reg = <0x0000000 0x0020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cferom_6a0: macaddr@6a0 { + reg = <0x6a0 0x6>; + }; + }; }; partition@20000 { @@ -224,13 +234,3 @@ &usbh { status = "okay"; }; - -&cferom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cferom_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6362-netgear-dgnd3700-v2.dts b/target/linux/bmips/dts/bcm6362-netgear-dgnd3700-v2.dts index a335218be07..53a1c0c01fc 100644 --- a/target/linux/bmips/dts/bcm6362-netgear-dgnd3700-v2.dts +++ b/target/linux/bmips/dts/bcm6362-netgear-dgnd3700-v2.dts @@ -216,6 +216,16 @@ label = "cferom"; reg = <0x0000000 0x0004000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cferom_6a0: macaddr@6a0 { + reg = <0x6a0 0x6>; + }; + }; }; partition@4000 { @@ -298,13 +308,3 @@ &usbh { status = "okay"; }; - -&cferom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cferom_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6368-actiontec-r1000h.dts b/target/linux/bmips/dts/bcm6368-actiontec-r1000h.dts index ff115afb8fb..c5e2e7f67f5 100644 --- a/target/linux/bmips/dts/bcm6368-actiontec-r1000h.dts +++ b/target/linux/bmips/dts/bcm6368-actiontec-r1000h.dts @@ -178,6 +178,16 @@ label = "CFE"; reg = <0x000000 0x020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + reg = <0x6a0 0x6>; + }; + }; }; partition@20000 { @@ -208,13 +218,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6368-comtrend-vr-3025u.dts b/target/linux/bmips/dts/bcm6368-comtrend-vr-3025u.dts index e67db8b6bde..eecf3806f2c 100644 --- a/target/linux/bmips/dts/bcm6368-comtrend-vr-3025u.dts +++ b/target/linux/bmips/dts/bcm6368-comtrend-vr-3025u.dts @@ -61,9 +61,8 @@ pci-bus = <0>; pci-dev = <1>; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm43222-sprom.bin"; brcm,sprom-fixups = <97 0xfeb3>, @@ -82,7 +81,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -106,6 +105,18 @@ label = "CFE"; reg = <0x0000000 0x0020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -170,13 +181,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6368-comtrend-vr-3025un.dts b/target/linux/bmips/dts/bcm6368-comtrend-vr-3025un.dts index 3256783e0e8..fb86adb8991 100644 --- a/target/linux/bmips/dts/bcm6368-comtrend-vr-3025un.dts +++ b/target/linux/bmips/dts/bcm6368-comtrend-vr-3025un.dts @@ -61,9 +61,8 @@ pci-bus = <0>; pci-dev = <1>; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm43222-sprom.bin"; brcm,sprom-fixups = <97 0xfeb3>, @@ -82,7 +81,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -106,6 +105,18 @@ label = "CFE"; reg = <0x000000 0x010000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -170,13 +181,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6368-netgear-dgnd3700.dtsi b/target/linux/bmips/dts/bcm6368-netgear-dgnd3700.dtsi index c878dd2cffa..97836e92e03 100644 --- a/target/linux/bmips/dts/bcm6368-netgear-dgnd3700.dtsi +++ b/target/linux/bmips/dts/bcm6368-netgear-dgnd3700.dtsi @@ -207,6 +207,16 @@ label = "CFE"; reg = <0x0000000 0x0020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + reg = <0x6a0 0x6>; + }; + }; }; partition@20000 { @@ -253,13 +263,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6368-observa-vh4032n.dts b/target/linux/bmips/dts/bcm6368-observa-vh4032n.dts index 14fbd856f8f..8d6135fbdd1 100644 --- a/target/linux/bmips/dts/bcm6368-observa-vh4032n.dts +++ b/target/linux/bmips/dts/bcm6368-observa-vh4032n.dts @@ -83,9 +83,8 @@ pci-bus = <0>; pci-dev = <1>; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm43222-sprom.bin"; brcm,sprom-fixups = <2 0x04d2>, <4 0x4350>, @@ -124,7 +123,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -157,6 +156,18 @@ label = "CFE"; reg = <0x0000000 0x0020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -221,13 +232,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6369-comtrend-wap-5813n.dts b/target/linux/bmips/dts/bcm6369-comtrend-wap-5813n.dts index 517a894cf50..53d20ecba32 100644 --- a/target/linux/bmips/dts/bcm6369-comtrend-wap-5813n.dts +++ b/target/linux/bmips/dts/bcm6369-comtrend-wap-5813n.dts @@ -80,9 +80,8 @@ pci-bus = <0>; pci-dev = <1>; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm4322-sprom.bin"; brcm,sprom-fixups = <97 0xfeed>, @@ -101,7 +100,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -170,6 +169,18 @@ label = "CFE"; reg = <0x000000 0x010000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -218,13 +229,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/bmips/dts/bcm6369-netgear-evg2000.dts b/target/linux/bmips/dts/bcm6369-netgear-evg2000.dts index 460c88f755c..db7f9b0e5b6 100644 --- a/target/linux/bmips/dts/bcm6369-netgear-evg2000.dts +++ b/target/linux/bmips/dts/bcm6369-netgear-evg2000.dts @@ -88,9 +88,8 @@ pci-bus = <0>; pci-dev = <1>; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; brcm,sprom = "brcm/bcm4322-sprom.bin"; brcm,sprom-fixups = <219 0xec08>; @@ -104,7 +103,7 @@ ðernet { status = "okay"; - nvmem-cells = <&macaddr_cfe_6a0>; + nvmem-cells = <&macaddr_cfe_6a0 0>; nvmem-cell-names = "mac-address"; }; @@ -189,6 +188,18 @@ label = "CFE"; reg = <0x000000 0x020000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_cfe_6a0: macaddr@6a0 { + compatible = "mac-base"; + reg = <0x6a0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -225,13 +236,3 @@ &usbh { status = "okay"; }; - -&cfe { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_cfe_6a0: macaddr@6a0 { - reg = <0x6a0 0x6>; - }; -}; diff --git a/target/linux/generic/backport-5.15/020-v6.1-08-mm-multi-gen-LRU-support-page-table-walks.patch b/target/linux/generic/backport-5.15/020-v6.1-08-mm-multi-gen-LRU-support-page-table-walks.patch index 754d97d84b4..43fd69ae794 100644 --- a/target/linux/generic/backport-5.15/020-v6.1-08-mm-multi-gen-LRU-support-page-table-walks.patch +++ b/target/linux/generic/backport-5.15/020-v6.1-08-mm-multi-gen-LRU-support-page-table-walks.patch @@ -414,7 +414,7 @@ Signed-off-by: Andrew Morton /* forking complete and child started to run, tell ptracer */ --- a/kernel/sched/core.c +++ b/kernel/sched/core.c -@@ -5010,6 +5010,7 @@ context_switch(struct rq *rq, struct tas +@@ -5014,6 +5014,7 @@ context_switch(struct rq *rq, struct tas * finish_task_switch()'s mmdrop(). */ switch_mm_irqs_off(prev->active_mm, next->mm, next); diff --git a/target/linux/generic/backport-5.15/350-v5.18-regmap-add-configurable-downshift-for-addresses.patch b/target/linux/generic/backport-5.15/350-v5.18-regmap-add-configurable-downshift-for-addresses.patch index 99cd89ea002..7bb328f3a6d 100644 --- a/target/linux/generic/backport-5.15/350-v5.18-regmap-add-configurable-downshift-for-addresses.patch +++ b/target/linux/generic/backport-5.15/350-v5.18-regmap-add-configurable-downshift-for-addresses.patch @@ -37,7 +37,7 @@ Signed-off-by: Mark Brown map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8); map->format.buf_size = DIV_ROUND_UP(config->reg_bits + config->val_bits + config->pad_bits, 8); -@@ -1735,6 +1736,7 @@ static int _regmap_raw_write_impl(struct +@@ -1737,6 +1738,7 @@ static int _regmap_raw_write_impl(struct return ret; } @@ -45,7 +45,7 @@ Signed-off-by: Mark Brown map->format.format_reg(map->work_buf, reg, map->reg_shift); regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, map->write_flag_mask); -@@ -1905,6 +1907,7 @@ static int _regmap_bus_formatted_write(v +@@ -1907,6 +1909,7 @@ static int _regmap_bus_formatted_write(v return ret; } @@ -53,7 +53,7 @@ Signed-off-by: Mark Brown map->format.format_write(map, reg, val); trace_regmap_hw_write_start(map, reg, 1); -@@ -2346,6 +2349,7 @@ static int _regmap_raw_multi_reg_write(s +@@ -2348,6 +2351,7 @@ static int _regmap_raw_multi_reg_write(s unsigned int reg = regs[i].reg; unsigned int val = regs[i].def; trace_regmap_hw_write_start(map, reg, 1); @@ -61,7 +61,7 @@ Signed-off-by: Mark Brown map->format.format_reg(u8, reg, map->reg_shift); u8 += reg_bytes + pad_bytes; map->format.format_val(u8, val, 0); -@@ -2673,6 +2677,7 @@ static int _regmap_raw_read(struct regma +@@ -2675,6 +2679,7 @@ static int _regmap_raw_read(struct regma return ret; } diff --git a/target/linux/generic/backport-5.15/351-v5.18-regmap-allow-a-defined-reg_base-to-be-added-to-every.patch b/target/linux/generic/backport-5.15/351-v5.18-regmap-allow-a-defined-reg_base-to-be-added-to-every.patch index 0f32288fcab..841f8d45286 100644 --- a/target/linux/generic/backport-5.15/351-v5.18-regmap-allow-a-defined-reg_base-to-be-added-to-every.patch +++ b/target/linux/generic/backport-5.15/351-v5.18-regmap-allow-a-defined-reg_base-to-be-added-to-every.patch @@ -42,7 +42,7 @@ Signed-off-by: Mark Brown map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8); map->format.pad_bytes = config->pad_bits / 8; map->format.reg_downshift = config->reg_downshift; -@@ -1736,6 +1738,7 @@ static int _regmap_raw_write_impl(struct +@@ -1738,6 +1740,7 @@ static int _regmap_raw_write_impl(struct return ret; } @@ -50,7 +50,7 @@ Signed-off-by: Mark Brown reg >>= map->format.reg_downshift; map->format.format_reg(map->work_buf, reg, map->reg_shift); regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, -@@ -1907,6 +1910,7 @@ static int _regmap_bus_formatted_write(v +@@ -1909,6 +1912,7 @@ static int _regmap_bus_formatted_write(v return ret; } @@ -58,7 +58,7 @@ Signed-off-by: Mark Brown reg >>= map->format.reg_downshift; map->format.format_write(map, reg, val); -@@ -2349,6 +2353,7 @@ static int _regmap_raw_multi_reg_write(s +@@ -2351,6 +2355,7 @@ static int _regmap_raw_multi_reg_write(s unsigned int reg = regs[i].reg; unsigned int val = regs[i].def; trace_regmap_hw_write_start(map, reg, 1); @@ -66,7 +66,7 @@ Signed-off-by: Mark Brown reg >>= map->format.reg_downshift; map->format.format_reg(u8, reg, map->reg_shift); u8 += reg_bytes + pad_bytes; -@@ -2677,6 +2682,7 @@ static int _regmap_raw_read(struct regma +@@ -2679,6 +2684,7 @@ static int _regmap_raw_read(struct regma return ret; } diff --git a/target/linux/generic/backport-5.15/352-v6.3-regmap-apply-reg_base-and-reg_downshift-for-single-r.patch b/target/linux/generic/backport-5.15/352-v6.3-regmap-apply-reg_base-and-reg_downshift-for-single-r.patch index 804f68d23c5..bc3865c75b9 100644 --- a/target/linux/generic/backport-5.15/352-v6.3-regmap-apply-reg_base-and-reg_downshift-for-single-r.patch +++ b/target/linux/generic/backport-5.15/352-v6.3-regmap-apply-reg_base-and-reg_downshift-for-single-r.patch @@ -28,7 +28,7 @@ Signed-off-by: Mark Brown --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c -@@ -1929,6 +1929,8 @@ static int _regmap_bus_reg_write(void *c +@@ -1931,6 +1931,8 @@ static int _regmap_bus_reg_write(void *c { struct regmap *map = context; @@ -37,7 +37,7 @@ Signed-off-by: Mark Brown return map->bus->reg_write(map->bus_context, reg, val); } -@@ -2703,6 +2705,8 @@ static int _regmap_bus_reg_read(void *co +@@ -2705,6 +2707,8 @@ static int _regmap_bus_reg_read(void *co { struct regmap *map = context; @@ -46,7 +46,7 @@ Signed-off-by: Mark Brown return map->bus->reg_read(map->bus_context, reg, val); } -@@ -3078,6 +3082,8 @@ static int _regmap_update_bits(struct re +@@ -3080,6 +3084,8 @@ static int _regmap_update_bits(struct re *change = false; if (regmap_volatile(map, reg) && map->reg_update_bits) { diff --git a/target/linux/generic/backport-5.15/830-v6.0-leds-turris-omnia-convert-to-use-dev_groups.patch b/target/linux/generic/backport-5.15/830-v6.0-leds-turris-omnia-convert-to-use-dev_groups.patch index b9ba07b485e..99ebe064388 100644 --- a/target/linux/generic/backport-5.15/830-v6.0-leds-turris-omnia-convert-to-use-dev_groups.patch +++ b/target/linux/generic/backport-5.15/830-v6.0-leds-turris-omnia-convert-to-use-dev_groups.patch @@ -25,7 +25,7 @@ Signed-off-by: Pavel Machek --- a/drivers/leds/leds-turris-omnia.c +++ b/drivers/leds/leds-turris-omnia.c -@@ -239,9 +239,6 @@ static int omnia_leds_probe(struct i2c_c +@@ -260,9 +260,6 @@ static int omnia_leds_probe(struct i2c_c led += ret; } @@ -35,7 +35,7 @@ Signed-off-by: Pavel Machek return 0; } -@@ -283,6 +280,7 @@ static struct i2c_driver omnia_leds_driv +@@ -304,6 +301,7 @@ static struct i2c_driver omnia_leds_driv .driver = { .name = "leds-turris-omnia", .of_match_table = of_omnia_leds_match, diff --git a/target/linux/generic/backport-5.15/830-v6.6-1-leds-turris-omnia-Use-sysfs_emit-instead-of-sprintf.patch b/target/linux/generic/backport-5.15/830-v6.6-1-leds-turris-omnia-Use-sysfs_emit-instead-of-sprintf.patch index 200d693b734..835a5e88470 100644 --- a/target/linux/generic/backport-5.15/830-v6.6-1-leds-turris-omnia-Use-sysfs_emit-instead-of-sprintf.patch +++ b/target/linux/generic/backport-5.15/830-v6.6-1-leds-turris-omnia-Use-sysfs_emit-instead-of-sprintf.patch @@ -20,7 +20,7 @@ Signed-off-by: Lee Jones --- a/drivers/leds/leds-turris-omnia.c +++ b/drivers/leds/leds-turris-omnia.c -@@ -166,7 +166,7 @@ static ssize_t brightness_show(struct de +@@ -194,7 +194,7 @@ static ssize_t brightness_show(struct de if (ret < 0) return ret; diff --git a/target/linux/generic/backport-5.15/830-v6.6-2-leds-turris-omnia-Drop-unnecessary-mutex-locking.patch b/target/linux/generic/backport-5.15/830-v6.6-2-leds-turris-omnia-Drop-unnecessary-mutex-locking.patch deleted file mode 100644 index 4178f150d9f..00000000000 --- a/target/linux/generic/backport-5.15/830-v6.6-2-leds-turris-omnia-Drop-unnecessary-mutex-locking.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 760b6b7925bf09491aafa4727eef74fc6bf738b0 Mon Sep 17 00:00:00 2001 -From: Marek Behún -Date: Wed, 2 Aug 2023 18:07:43 +0200 -Subject: leds: turris-omnia: Drop unnecessary mutex locking -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Do not lock driver mutex in the global LED panel brightness sysfs -accessors brightness_show() and brightness_store(). - -The mutex locking is unnecessary here. The I2C transfers are guarded by -I2C core locking mechanism, and the LED commands itself do not interfere -with other commands. - -Fixes: 089381b27abe ("leds: initial support for Turris Omnia LEDs") -Signed-off-by: Marek Behún -Reviewed-by: Lee Jones -Link: https://lore.kernel.org/r/20230802160748.11208-2-kabel@kernel.org -Signed-off-by: Lee Jones ---- - drivers/leds/leds-turris-omnia.c | 11 +---------- - 1 file changed, 1 insertion(+), 10 deletions(-) - -(limited to 'drivers/leds/leds-turris-omnia.c') - ---- a/drivers/leds/leds-turris-omnia.c -+++ b/drivers/leds/leds-turris-omnia.c -@@ -156,12 +156,9 @@ static ssize_t brightness_show(struct de - char *buf) - { - struct i2c_client *client = to_i2c_client(dev); -- struct omnia_leds *leds = i2c_get_clientdata(client); - int ret; - -- mutex_lock(&leds->lock); - ret = i2c_smbus_read_byte_data(client, CMD_LED_GET_BRIGHTNESS); -- mutex_unlock(&leds->lock); - - if (ret < 0) - return ret; -@@ -173,7 +170,6 @@ static ssize_t brightness_store(struct d - const char *buf, size_t count) - { - struct i2c_client *client = to_i2c_client(dev); -- struct omnia_leds *leds = i2c_get_clientdata(client); - unsigned long brightness; - int ret; - -@@ -183,15 +179,10 @@ static ssize_t brightness_store(struct d - if (brightness > 100) - return -EINVAL; - -- mutex_lock(&leds->lock); - ret = i2c_smbus_write_byte_data(client, CMD_LED_SET_BRIGHTNESS, - (u8)brightness); -- mutex_unlock(&leds->lock); - -- if (ret < 0) -- return ret; -- -- return count; -+ return ret < 0 ? ret : count; - } - static DEVICE_ATTR_RW(brightness); - diff --git a/target/linux/generic/backport-5.15/830-v6.7-1-leds-turris-omnia-Do-not-use-SMBUS-calls.patch b/target/linux/generic/backport-5.15/830-v6.7-1-leds-turris-omnia-Do-not-use-SMBUS-calls.patch deleted file mode 100644 index 5460881cca1..00000000000 --- a/target/linux/generic/backport-5.15/830-v6.7-1-leds-turris-omnia-Do-not-use-SMBUS-calls.patch +++ /dev/null @@ -1,145 +0,0 @@ -From 28350bc0ac77e17365ba87d3edb2db0a79c98fdd Mon Sep 17 00:00:00 2001 -From: Marek Behún -Date: Mon, 18 Sep 2023 18:11:01 +0200 -Subject: leds: turris-omnia: Do not use SMBUS calls -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The leds-turris-omnia driver uses three function for I2C access: -- i2c_smbus_write_byte_data() and i2c_smbus_read_byte_data(), which - cause an emulated SMBUS transfer, -- i2c_master_send(), which causes an ordinary I2C transfer. - -The Turris Omnia MCU LED controller is not semantically SMBUS, it -operates as a simple I2C bus. It does not implement any of the SMBUS -specific features, like PEC, or procedure calls, or anything. Moreover -the I2C controller driver also does not implement SMBUS, and so the -emulated SMBUS procedure from drivers/i2c/i2c-core-smbus.c is used for -the SMBUS calls, which gives an unnecessary overhead. - -When I first wrote the driver, I was unaware of these facts, and I -simply used the first function that worked. - -Drop the I2C SMBUS calls and instead use simple I2C transfers. - -Fixes: 089381b27abe ("leds: initial support for Turris Omnia LEDs") -Signed-off-by: Marek Behún -Link: https://lore.kernel.org/r/20230918161104.20860-2-kabel@kernel.org -Signed-off-by: Lee Jones ---- - drivers/leds/leds-turris-omnia.c | 54 +++++++++++++++++++++++++++++++--------- - 1 file changed, 42 insertions(+), 12 deletions(-) - ---- a/drivers/leds/leds-turris-omnia.c -+++ b/drivers/leds/leds-turris-omnia.c -@@ -2,7 +2,7 @@ - /* - * CZ.NIC's Turris Omnia LEDs driver - * -- * 2020 by Marek Behún -+ * 2020, 2023 by Marek Behún - */ - - #include -@@ -41,6 +41,37 @@ struct omnia_leds { - struct omnia_led leds[]; - }; - -+static int omnia_cmd_write_u8(const struct i2c_client *client, u8 cmd, u8 val) -+{ -+ u8 buf[2] = { cmd, val }; -+ -+ return i2c_master_send(client, buf, sizeof(buf)); -+} -+ -+static int omnia_cmd_read_u8(const struct i2c_client *client, u8 cmd) -+{ -+ struct i2c_msg msgs[2]; -+ u8 reply; -+ int ret; -+ -+ msgs[0].addr = client->addr; -+ msgs[0].flags = 0; -+ msgs[0].len = 1; -+ msgs[0].buf = &cmd; -+ msgs[1].addr = client->addr; -+ msgs[1].flags = I2C_M_RD; -+ msgs[1].len = 1; -+ msgs[1].buf = &reply; -+ -+ ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); -+ if (likely(ret == ARRAY_SIZE(msgs))) -+ return reply; -+ else if (ret < 0) -+ return ret; -+ else -+ return -EIO; -+} -+ - static int omnia_led_brightness_set_blocking(struct led_classdev *cdev, - enum led_brightness brightness) - { -@@ -64,7 +95,7 @@ static int omnia_led_brightness_set_bloc - if (buf[2] || buf[3] || buf[4]) - state |= CMD_LED_STATE_ON; - -- ret = i2c_smbus_write_byte_data(leds->client, CMD_LED_STATE, state); -+ ret = omnia_cmd_write_u8(leds->client, CMD_LED_STATE, state); - if (ret >= 0 && (state & CMD_LED_STATE_ON)) - ret = i2c_master_send(leds->client, buf, 5); - -@@ -114,9 +145,9 @@ static int omnia_led_register(struct i2c - cdev->brightness_set_blocking = omnia_led_brightness_set_blocking; - - /* put the LED into software mode */ -- ret = i2c_smbus_write_byte_data(client, CMD_LED_MODE, -- CMD_LED_MODE_LED(led->reg) | -- CMD_LED_MODE_USER); -+ ret = omnia_cmd_write_u8(client, CMD_LED_MODE, -+ CMD_LED_MODE_LED(led->reg) | -+ CMD_LED_MODE_USER); - if (ret < 0) { - dev_err(dev, "Cannot set LED %pOF to software mode: %i\n", np, - ret); -@@ -124,8 +155,8 @@ static int omnia_led_register(struct i2c - } - - /* disable the LED */ -- ret = i2c_smbus_write_byte_data(client, CMD_LED_STATE, -- CMD_LED_STATE_LED(led->reg)); -+ ret = omnia_cmd_write_u8(client, CMD_LED_STATE, -+ CMD_LED_STATE_LED(led->reg)); - if (ret < 0) { - dev_err(dev, "Cannot set LED %pOF brightness: %i\n", np, ret); - return ret; -@@ -158,7 +189,7 @@ static ssize_t brightness_show(struct de - struct i2c_client *client = to_i2c_client(dev); - int ret; - -- ret = i2c_smbus_read_byte_data(client, CMD_LED_GET_BRIGHTNESS); -+ ret = omnia_cmd_read_u8(client, CMD_LED_GET_BRIGHTNESS); - - if (ret < 0) - return ret; -@@ -179,8 +210,7 @@ static ssize_t brightness_store(struct d - if (brightness > 100) - return -EINVAL; - -- ret = i2c_smbus_write_byte_data(client, CMD_LED_SET_BRIGHTNESS, -- (u8)brightness); -+ ret = omnia_cmd_write_u8(client, CMD_LED_SET_BRIGHTNESS, brightness); - - return ret < 0 ? ret : count; - } -@@ -238,8 +268,8 @@ static int omnia_leds_remove(struct i2c_ - u8 buf[5]; - - /* put all LEDs into default (HW triggered) mode */ -- i2c_smbus_write_byte_data(client, CMD_LED_MODE, -- CMD_LED_MODE_LED(OMNIA_BOARD_LEDS)); -+ omnia_cmd_write_u8(client, CMD_LED_MODE, -+ CMD_LED_MODE_LED(OMNIA_BOARD_LEDS)); - - /* set all LEDs color to [255, 255, 255] */ - buf[0] = CMD_LED_COLOR; diff --git a/target/linux/generic/backport-6.1/702-01-v6.7-net-phy-aquantia-move-to-separate-directory.patch b/target/linux/generic/backport-6.1/702-01-v6.7-net-phy-aquantia-move-to-separate-directory.patch new file mode 100644 index 00000000000..0cad6c53d42 --- /dev/null +++ b/target/linux/generic/backport-6.1/702-01-v6.7-net-phy-aquantia-move-to-separate-directory.patch @@ -0,0 +1,2306 @@ +From d2213db3f49bce8e7a87c8de05b9a091f78f654e Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 14 Nov 2023 15:08:41 +0100 +Subject: [PATCH 1/3] net: phy: aquantia: move to separate directory + +Move aquantia PHY driver to separate driectory in preparation for +firmware loading support to keep things tidy. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/net/phy/Kconfig | 5 +---- + drivers/net/phy/Makefile | 6 +----- + drivers/net/phy/aquantia/Kconfig | 5 +++++ + drivers/net/phy/aquantia/Makefile | 6 ++++++ + drivers/net/phy/{ => aquantia}/aquantia.h | 0 + drivers/net/phy/{ => aquantia}/aquantia_hwmon.c | 0 + drivers/net/phy/{ => aquantia}/aquantia_main.c | 0 + 7 files changed, 13 insertions(+), 9 deletions(-) + create mode 100644 drivers/net/phy/aquantia/Kconfig + create mode 100644 drivers/net/phy/aquantia/Makefile + rename drivers/net/phy/{ => aquantia}/aquantia.h (100%) + rename drivers/net/phy/{ => aquantia}/aquantia_hwmon.c (100%) + rename drivers/net/phy/{ => aquantia}/aquantia_main.c (100%) + +--- a/drivers/net/phy/Kconfig ++++ b/drivers/net/phy/Kconfig +@@ -90,10 +90,7 @@ config ADIN1100_PHY + Currently supports the: + - ADIN1100 - Robust,Industrial, Low Power 10BASE-T1L Ethernet PHY + +-config AQUANTIA_PHY +- tristate "Aquantia PHYs" +- help +- Currently supports the Aquantia AQ1202, AQ2104, AQR105, AQR405 ++source "drivers/net/phy/aquantia/Kconfig" + + config AX88796B_PHY + tristate "Asix PHYs" +--- a/drivers/net/phy/Makefile ++++ b/drivers/net/phy/Makefile +@@ -33,11 +33,7 @@ obj-y += $(sfp-obj-y) $(sfp-obj-m) + obj-$(CONFIG_ADIN_PHY) += adin.o + obj-$(CONFIG_ADIN1100_PHY) += adin1100.o + obj-$(CONFIG_AMD_PHY) += amd.o +-aquantia-objs += aquantia_main.o +-ifdef CONFIG_HWMON +-aquantia-objs += aquantia_hwmon.o +-endif +-obj-$(CONFIG_AQUANTIA_PHY) += aquantia.o ++obj-$(CONFIG_AQUANTIA_PHY) += aquantia/ + obj-$(CONFIG_AT803X_PHY) += at803x.o + obj-$(CONFIG_AX88796B_PHY) += ax88796b.o + obj-$(CONFIG_BCM54140_PHY) += bcm54140.o +--- /dev/null ++++ b/drivers/net/phy/aquantia/Kconfig +@@ -0,0 +1,5 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++config AQUANTIA_PHY ++ tristate "Aquantia PHYs" ++ help ++ Currently supports the Aquantia AQ1202, AQ2104, AQR105, AQR405 +--- /dev/null ++++ b/drivers/net/phy/aquantia/Makefile +@@ -0,0 +1,6 @@ ++# SPDX-License-Identifier: GPL-2.0 ++aquantia-objs += aquantia_main.o ++ifdef CONFIG_HWMON ++aquantia-objs += aquantia_hwmon.o ++endif ++obj-$(CONFIG_AQUANTIA_PHY) += aquantia.o +--- a/drivers/net/phy/aquantia.h ++++ /dev/null +@@ -1,16 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* HWMON driver for Aquantia PHY +- * +- * Author: Nikita Yushchenko +- * Author: Andrew Lunn +- * Author: Heiner Kallweit +- */ +- +-#include +-#include +- +-#if IS_REACHABLE(CONFIG_HWMON) +-int aqr_hwmon_probe(struct phy_device *phydev); +-#else +-static inline int aqr_hwmon_probe(struct phy_device *phydev) { return 0; } +-#endif +--- /dev/null ++++ b/drivers/net/phy/aquantia/aquantia.h +@@ -0,0 +1,16 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* HWMON driver for Aquantia PHY ++ * ++ * Author: Nikita Yushchenko ++ * Author: Andrew Lunn ++ * Author: Heiner Kallweit ++ */ ++ ++#include ++#include ++ ++#if IS_REACHABLE(CONFIG_HWMON) ++int aqr_hwmon_probe(struct phy_device *phydev); ++#else ++static inline int aqr_hwmon_probe(struct phy_device *phydev) { return 0; } ++#endif +--- /dev/null ++++ b/drivers/net/phy/aquantia/aquantia_hwmon.c +@@ -0,0 +1,250 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* HWMON driver for Aquantia PHY ++ * ++ * Author: Nikita Yushchenko ++ * Author: Andrew Lunn ++ * Author: Heiner Kallweit ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "aquantia.h" ++ ++/* Vendor specific 1, MDIO_MMD_VEND2 */ ++#define VEND1_THERMAL_PROV_HIGH_TEMP_FAIL 0xc421 ++#define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422 ++#define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423 ++#define VEND1_THERMAL_PROV_LOW_TEMP_WARN 0xc424 ++#define VEND1_THERMAL_STAT1 0xc820 ++#define VEND1_THERMAL_STAT2 0xc821 ++#define VEND1_THERMAL_STAT2_VALID BIT(0) ++#define VEND1_GENERAL_STAT1 0xc830 ++#define VEND1_GENERAL_STAT1_HIGH_TEMP_FAIL BIT(14) ++#define VEND1_GENERAL_STAT1_LOW_TEMP_FAIL BIT(13) ++#define VEND1_GENERAL_STAT1_HIGH_TEMP_WARN BIT(12) ++#define VEND1_GENERAL_STAT1_LOW_TEMP_WARN BIT(11) ++ ++#if IS_REACHABLE(CONFIG_HWMON) ++ ++static umode_t aqr_hwmon_is_visible(const void *data, ++ enum hwmon_sensor_types type, ++ u32 attr, int channel) ++{ ++ if (type != hwmon_temp) ++ return 0; ++ ++ switch (attr) { ++ case hwmon_temp_input: ++ case hwmon_temp_min_alarm: ++ case hwmon_temp_max_alarm: ++ case hwmon_temp_lcrit_alarm: ++ case hwmon_temp_crit_alarm: ++ return 0444; ++ case hwmon_temp_min: ++ case hwmon_temp_max: ++ case hwmon_temp_lcrit: ++ case hwmon_temp_crit: ++ return 0644; ++ default: ++ return 0; ++ } ++} ++ ++static int aqr_hwmon_get(struct phy_device *phydev, int reg, long *value) ++{ ++ int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); ++ ++ if (temp < 0) ++ return temp; ++ ++ /* 16 bit value is 2's complement with LSB = 1/256th degree Celsius */ ++ *value = (s16)temp * 1000 / 256; ++ ++ return 0; ++} ++ ++static int aqr_hwmon_set(struct phy_device *phydev, int reg, long value) ++{ ++ int temp; ++ ++ if (value >= 128000 || value < -128000) ++ return -ERANGE; ++ ++ temp = value * 256 / 1000; ++ ++ /* temp is in s16 range and we're interested in lower 16 bits only */ ++ return phy_write_mmd(phydev, MDIO_MMD_VEND1, reg, (u16)temp); ++} ++ ++static int aqr_hwmon_test_bit(struct phy_device *phydev, int reg, int bit) ++{ ++ int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); ++ ++ if (val < 0) ++ return val; ++ ++ return !!(val & bit); ++} ++ ++static int aqr_hwmon_status1(struct phy_device *phydev, int bit, long *value) ++{ ++ int val = aqr_hwmon_test_bit(phydev, VEND1_GENERAL_STAT1, bit); ++ ++ if (val < 0) ++ return val; ++ ++ *value = val; ++ ++ return 0; ++} ++ ++static int aqr_hwmon_read(struct device *dev, enum hwmon_sensor_types type, ++ u32 attr, int channel, long *value) ++{ ++ struct phy_device *phydev = dev_get_drvdata(dev); ++ int reg; ++ ++ if (type != hwmon_temp) ++ return -EOPNOTSUPP; ++ ++ switch (attr) { ++ case hwmon_temp_input: ++ reg = aqr_hwmon_test_bit(phydev, VEND1_THERMAL_STAT2, ++ VEND1_THERMAL_STAT2_VALID); ++ if (reg < 0) ++ return reg; ++ if (!reg) ++ return -EBUSY; ++ ++ return aqr_hwmon_get(phydev, VEND1_THERMAL_STAT1, value); ++ ++ case hwmon_temp_lcrit: ++ return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_LOW_TEMP_FAIL, ++ value); ++ case hwmon_temp_min: ++ return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_LOW_TEMP_WARN, ++ value); ++ case hwmon_temp_max: ++ return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_WARN, ++ value); ++ case hwmon_temp_crit: ++ return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_FAIL, ++ value); ++ case hwmon_temp_lcrit_alarm: ++ return aqr_hwmon_status1(phydev, ++ VEND1_GENERAL_STAT1_LOW_TEMP_FAIL, ++ value); ++ case hwmon_temp_min_alarm: ++ return aqr_hwmon_status1(phydev, ++ VEND1_GENERAL_STAT1_LOW_TEMP_WARN, ++ value); ++ case hwmon_temp_max_alarm: ++ return aqr_hwmon_status1(phydev, ++ VEND1_GENERAL_STAT1_HIGH_TEMP_WARN, ++ value); ++ case hwmon_temp_crit_alarm: ++ return aqr_hwmon_status1(phydev, ++ VEND1_GENERAL_STAT1_HIGH_TEMP_FAIL, ++ value); ++ default: ++ return -EOPNOTSUPP; ++ } ++} ++ ++static int aqr_hwmon_write(struct device *dev, enum hwmon_sensor_types type, ++ u32 attr, int channel, long value) ++{ ++ struct phy_device *phydev = dev_get_drvdata(dev); ++ ++ if (type != hwmon_temp) ++ return -EOPNOTSUPP; ++ ++ switch (attr) { ++ case hwmon_temp_lcrit: ++ return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_LOW_TEMP_FAIL, ++ value); ++ case hwmon_temp_min: ++ return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_LOW_TEMP_WARN, ++ value); ++ case hwmon_temp_max: ++ return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_WARN, ++ value); ++ case hwmon_temp_crit: ++ return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_FAIL, ++ value); ++ default: ++ return -EOPNOTSUPP; ++ } ++} ++ ++static const struct hwmon_ops aqr_hwmon_ops = { ++ .is_visible = aqr_hwmon_is_visible, ++ .read = aqr_hwmon_read, ++ .write = aqr_hwmon_write, ++}; ++ ++static u32 aqr_hwmon_chip_config[] = { ++ HWMON_C_REGISTER_TZ, ++ 0, ++}; ++ ++static const struct hwmon_channel_info aqr_hwmon_chip = { ++ .type = hwmon_chip, ++ .config = aqr_hwmon_chip_config, ++}; ++ ++static u32 aqr_hwmon_temp_config[] = { ++ HWMON_T_INPUT | ++ HWMON_T_MAX | HWMON_T_MIN | ++ HWMON_T_MAX_ALARM | HWMON_T_MIN_ALARM | ++ HWMON_T_CRIT | HWMON_T_LCRIT | ++ HWMON_T_CRIT_ALARM | HWMON_T_LCRIT_ALARM, ++ 0, ++}; ++ ++static const struct hwmon_channel_info aqr_hwmon_temp = { ++ .type = hwmon_temp, ++ .config = aqr_hwmon_temp_config, ++}; ++ ++static const struct hwmon_channel_info *aqr_hwmon_info[] = { ++ &aqr_hwmon_chip, ++ &aqr_hwmon_temp, ++ NULL, ++}; ++ ++static const struct hwmon_chip_info aqr_hwmon_chip_info = { ++ .ops = &aqr_hwmon_ops, ++ .info = aqr_hwmon_info, ++}; ++ ++int aqr_hwmon_probe(struct phy_device *phydev) ++{ ++ struct device *dev = &phydev->mdio.dev; ++ struct device *hwmon_dev; ++ char *hwmon_name; ++ int i, j; ++ ++ hwmon_name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL); ++ if (!hwmon_name) ++ return -ENOMEM; ++ ++ for (i = j = 0; hwmon_name[i]; i++) { ++ if (isalnum(hwmon_name[i])) { ++ if (i != j) ++ hwmon_name[j] = hwmon_name[i]; ++ j++; ++ } ++ } ++ hwmon_name[j] = '\0'; ++ ++ hwmon_dev = devm_hwmon_device_register_with_info(dev, hwmon_name, ++ phydev, &aqr_hwmon_chip_info, NULL); ++ ++ return PTR_ERR_OR_ZERO(hwmon_dev); ++} ++ ++#endif +--- /dev/null ++++ b/drivers/net/phy/aquantia/aquantia_main.c +@@ -0,0 +1,842 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Driver for Aquantia PHY ++ * ++ * Author: Shaohui Xie ++ * ++ * Copyright 2015 Freescale Semiconductor, Inc. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "aquantia.h" ++ ++#define PHY_ID_AQ1202 0x03a1b445 ++#define PHY_ID_AQ2104 0x03a1b460 ++#define PHY_ID_AQR105 0x03a1b4a2 ++#define PHY_ID_AQR106 0x03a1b4d0 ++#define PHY_ID_AQR107 0x03a1b4e0 ++#define PHY_ID_AQCS109 0x03a1b5c2 ++#define PHY_ID_AQR405 0x03a1b4b0 ++#define PHY_ID_AQR113C 0x31c31c12 ++ ++#define MDIO_PHYXS_VEND_IF_STATUS 0xe812 ++#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3) ++#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR 0 ++#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX 1 ++#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI 2 ++#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII 3 ++#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI 4 ++#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII 6 ++#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI 7 ++#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII 10 ++ ++#define MDIO_AN_VEND_PROV 0xc400 ++#define MDIO_AN_VEND_PROV_1000BASET_FULL BIT(15) ++#define MDIO_AN_VEND_PROV_1000BASET_HALF BIT(14) ++#define MDIO_AN_VEND_PROV_5000BASET_FULL BIT(11) ++#define MDIO_AN_VEND_PROV_2500BASET_FULL BIT(10) ++#define MDIO_AN_VEND_PROV_DOWNSHIFT_EN BIT(4) ++#define MDIO_AN_VEND_PROV_DOWNSHIFT_MASK GENMASK(3, 0) ++#define MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT 4 ++ ++#define MDIO_AN_TX_VEND_STATUS1 0xc800 ++#define MDIO_AN_TX_VEND_STATUS1_RATE_MASK GENMASK(3, 1) ++#define MDIO_AN_TX_VEND_STATUS1_10BASET 0 ++#define MDIO_AN_TX_VEND_STATUS1_100BASETX 1 ++#define MDIO_AN_TX_VEND_STATUS1_1000BASET 2 ++#define MDIO_AN_TX_VEND_STATUS1_10GBASET 3 ++#define MDIO_AN_TX_VEND_STATUS1_2500BASET 4 ++#define MDIO_AN_TX_VEND_STATUS1_5000BASET 5 ++#define MDIO_AN_TX_VEND_STATUS1_FULL_DUPLEX BIT(0) ++ ++#define MDIO_AN_TX_VEND_INT_STATUS1 0xcc00 ++#define MDIO_AN_TX_VEND_INT_STATUS1_DOWNSHIFT BIT(1) ++ ++#define MDIO_AN_TX_VEND_INT_STATUS2 0xcc01 ++#define MDIO_AN_TX_VEND_INT_STATUS2_MASK BIT(0) ++ ++#define MDIO_AN_TX_VEND_INT_MASK2 0xd401 ++#define MDIO_AN_TX_VEND_INT_MASK2_LINK BIT(0) ++ ++#define MDIO_AN_RX_LP_STAT1 0xe820 ++#define MDIO_AN_RX_LP_STAT1_1000BASET_FULL BIT(15) ++#define MDIO_AN_RX_LP_STAT1_1000BASET_HALF BIT(14) ++#define MDIO_AN_RX_LP_STAT1_SHORT_REACH BIT(13) ++#define MDIO_AN_RX_LP_STAT1_AQRATE_DOWNSHIFT BIT(12) ++#define MDIO_AN_RX_LP_STAT1_AQ_PHY BIT(2) ++ ++#define MDIO_AN_RX_LP_STAT4 0xe823 ++#define MDIO_AN_RX_LP_STAT4_FW_MAJOR GENMASK(15, 8) ++#define MDIO_AN_RX_LP_STAT4_FW_MINOR GENMASK(7, 0) ++ ++#define MDIO_AN_RX_VEND_STAT3 0xe832 ++#define MDIO_AN_RX_VEND_STAT3_AFR BIT(0) ++ ++/* MDIO_MMD_C22EXT */ ++#define MDIO_C22EXT_STAT_SGMII_RX_GOOD_FRAMES 0xd292 ++#define MDIO_C22EXT_STAT_SGMII_RX_BAD_FRAMES 0xd294 ++#define MDIO_C22EXT_STAT_SGMII_RX_FALSE_CARRIER 0xd297 ++#define MDIO_C22EXT_STAT_SGMII_TX_GOOD_FRAMES 0xd313 ++#define MDIO_C22EXT_STAT_SGMII_TX_BAD_FRAMES 0xd315 ++#define MDIO_C22EXT_STAT_SGMII_TX_FALSE_CARRIER 0xd317 ++#define MDIO_C22EXT_STAT_SGMII_TX_COLLISIONS 0xd318 ++#define MDIO_C22EXT_STAT_SGMII_TX_LINE_COLLISIONS 0xd319 ++#define MDIO_C22EXT_STAT_SGMII_TX_FRAME_ALIGN_ERR 0xd31a ++#define MDIO_C22EXT_STAT_SGMII_TX_RUNT_FRAMES 0xd31b ++ ++/* Vendor specific 1, MDIO_MMD_VEND1 */ ++#define VEND1_GLOBAL_FW_ID 0x0020 ++#define VEND1_GLOBAL_FW_ID_MAJOR GENMASK(15, 8) ++#define VEND1_GLOBAL_FW_ID_MINOR GENMASK(7, 0) ++ ++#define VEND1_GLOBAL_GEN_STAT2 0xc831 ++#define VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG BIT(15) ++ ++/* The following registers all have similar layouts; first the registers... */ ++#define VEND1_GLOBAL_CFG_10M 0x0310 ++#define VEND1_GLOBAL_CFG_100M 0x031b ++#define VEND1_GLOBAL_CFG_1G 0x031c ++#define VEND1_GLOBAL_CFG_2_5G 0x031d ++#define VEND1_GLOBAL_CFG_5G 0x031e ++#define VEND1_GLOBAL_CFG_10G 0x031f ++/* ...and now the fields */ ++#define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7) ++#define VEND1_GLOBAL_CFG_RATE_ADAPT_NONE 0 ++#define VEND1_GLOBAL_CFG_RATE_ADAPT_USX 1 ++#define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2 ++ ++#define VEND1_GLOBAL_RSVD_STAT1 0xc885 ++#define VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID GENMASK(7, 4) ++#define VEND1_GLOBAL_RSVD_STAT1_PROV_ID GENMASK(3, 0) ++ ++#define VEND1_GLOBAL_RSVD_STAT9 0xc88d ++#define VEND1_GLOBAL_RSVD_STAT9_MODE GENMASK(7, 0) ++#define VEND1_GLOBAL_RSVD_STAT9_1000BT2 0x23 ++ ++#define VEND1_GLOBAL_INT_STD_STATUS 0xfc00 ++#define VEND1_GLOBAL_INT_VEND_STATUS 0xfc01 ++ ++#define VEND1_GLOBAL_INT_STD_MASK 0xff00 ++#define VEND1_GLOBAL_INT_STD_MASK_PMA1 BIT(15) ++#define VEND1_GLOBAL_INT_STD_MASK_PMA2 BIT(14) ++#define VEND1_GLOBAL_INT_STD_MASK_PCS1 BIT(13) ++#define VEND1_GLOBAL_INT_STD_MASK_PCS2 BIT(12) ++#define VEND1_GLOBAL_INT_STD_MASK_PCS3 BIT(11) ++#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS1 BIT(10) ++#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS2 BIT(9) ++#define VEND1_GLOBAL_INT_STD_MASK_AN1 BIT(8) ++#define VEND1_GLOBAL_INT_STD_MASK_AN2 BIT(7) ++#define VEND1_GLOBAL_INT_STD_MASK_GBE BIT(6) ++#define VEND1_GLOBAL_INT_STD_MASK_ALL BIT(0) ++ ++#define VEND1_GLOBAL_INT_VEND_MASK 0xff01 ++#define VEND1_GLOBAL_INT_VEND_MASK_PMA BIT(15) ++#define VEND1_GLOBAL_INT_VEND_MASK_PCS BIT(14) ++#define VEND1_GLOBAL_INT_VEND_MASK_PHY_XS BIT(13) ++#define VEND1_GLOBAL_INT_VEND_MASK_AN BIT(12) ++#define VEND1_GLOBAL_INT_VEND_MASK_GBE BIT(11) ++#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL1 BIT(2) ++#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2 BIT(1) ++#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 BIT(0) ++ ++/* Sleep and timeout for checking if the Processor-Intensive ++ * MDIO operation is finished ++ */ ++#define AQR107_OP_IN_PROG_SLEEP 1000 ++#define AQR107_OP_IN_PROG_TIMEOUT 100000 ++ ++struct aqr107_hw_stat { ++ const char *name; ++ int reg; ++ int size; ++}; ++ ++#define SGMII_STAT(n, r, s) { n, MDIO_C22EXT_STAT_SGMII_ ## r, s } ++static const struct aqr107_hw_stat aqr107_hw_stats[] = { ++ SGMII_STAT("sgmii_rx_good_frames", RX_GOOD_FRAMES, 26), ++ SGMII_STAT("sgmii_rx_bad_frames", RX_BAD_FRAMES, 26), ++ SGMII_STAT("sgmii_rx_false_carrier_events", RX_FALSE_CARRIER, 8), ++ SGMII_STAT("sgmii_tx_good_frames", TX_GOOD_FRAMES, 26), ++ SGMII_STAT("sgmii_tx_bad_frames", TX_BAD_FRAMES, 26), ++ SGMII_STAT("sgmii_tx_false_carrier_events", TX_FALSE_CARRIER, 8), ++ SGMII_STAT("sgmii_tx_collisions", TX_COLLISIONS, 8), ++ SGMII_STAT("sgmii_tx_line_collisions", TX_LINE_COLLISIONS, 8), ++ SGMII_STAT("sgmii_tx_frame_alignment_err", TX_FRAME_ALIGN_ERR, 16), ++ SGMII_STAT("sgmii_tx_runt_frames", TX_RUNT_FRAMES, 22), ++}; ++#define AQR107_SGMII_STAT_SZ ARRAY_SIZE(aqr107_hw_stats) ++ ++struct aqr107_priv { ++ u64 sgmii_stats[AQR107_SGMII_STAT_SZ]; ++}; ++ ++static int aqr107_get_sset_count(struct phy_device *phydev) ++{ ++ return AQR107_SGMII_STAT_SZ; ++} ++ ++static void aqr107_get_strings(struct phy_device *phydev, u8 *data) ++{ ++ int i; ++ ++ for (i = 0; i < AQR107_SGMII_STAT_SZ; i++) ++ strscpy(data + i * ETH_GSTRING_LEN, aqr107_hw_stats[i].name, ++ ETH_GSTRING_LEN); ++} ++ ++static u64 aqr107_get_stat(struct phy_device *phydev, int index) ++{ ++ const struct aqr107_hw_stat *stat = aqr107_hw_stats + index; ++ int len_l = min(stat->size, 16); ++ int len_h = stat->size - len_l; ++ u64 ret; ++ int val; ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); ++ if (val < 0) ++ return U64_MAX; ++ ++ ret = val & GENMASK(len_l - 1, 0); ++ if (len_h) { ++ val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); ++ if (val < 0) ++ return U64_MAX; ++ ++ ret += (val & GENMASK(len_h - 1, 0)) << 16; ++ } ++ ++ return ret; ++} ++ ++static void aqr107_get_stats(struct phy_device *phydev, ++ struct ethtool_stats *stats, u64 *data) ++{ ++ struct aqr107_priv *priv = phydev->priv; ++ u64 val; ++ int i; ++ ++ for (i = 0; i < AQR107_SGMII_STAT_SZ; i++) { ++ val = aqr107_get_stat(phydev, i); ++ if (val == U64_MAX) ++ phydev_err(phydev, "Reading HW Statistics failed for %s\n", ++ aqr107_hw_stats[i].name); ++ else ++ priv->sgmii_stats[i] += val; ++ ++ data[i] = priv->sgmii_stats[i]; ++ } ++} ++ ++static int aqr_config_aneg(struct phy_device *phydev) ++{ ++ bool changed = false; ++ u16 reg; ++ int ret; ++ ++ if (phydev->autoneg == AUTONEG_DISABLE) ++ return genphy_c45_pma_setup_forced(phydev); ++ ++ ret = genphy_c45_an_config_aneg(phydev); ++ if (ret < 0) ++ return ret; ++ if (ret > 0) ++ changed = true; ++ ++ /* Clause 45 has no standardized support for 1000BaseT, therefore ++ * use vendor registers for this mode. ++ */ ++ reg = 0; ++ if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, ++ phydev->advertising)) ++ reg |= MDIO_AN_VEND_PROV_1000BASET_FULL; ++ ++ if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, ++ phydev->advertising)) ++ reg |= MDIO_AN_VEND_PROV_1000BASET_HALF; ++ ++ /* Handle the case when the 2.5G and 5G speeds are not advertised */ ++ if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, ++ phydev->advertising)) ++ reg |= MDIO_AN_VEND_PROV_2500BASET_FULL; ++ ++ if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, ++ phydev->advertising)) ++ reg |= MDIO_AN_VEND_PROV_5000BASET_FULL; ++ ++ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV, ++ MDIO_AN_VEND_PROV_1000BASET_HALF | ++ MDIO_AN_VEND_PROV_1000BASET_FULL | ++ MDIO_AN_VEND_PROV_2500BASET_FULL | ++ MDIO_AN_VEND_PROV_5000BASET_FULL, reg); ++ if (ret < 0) ++ return ret; ++ if (ret > 0) ++ changed = true; ++ ++ return genphy_c45_check_and_restart_aneg(phydev, changed); ++} ++ ++static int aqr_config_intr(struct phy_device *phydev) ++{ ++ bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED; ++ int err; ++ ++ if (en) { ++ /* Clear any pending interrupts before enabling them */ ++ err = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_STATUS2); ++ if (err < 0) ++ return err; ++ } ++ ++ err = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_MASK2, ++ en ? MDIO_AN_TX_VEND_INT_MASK2_LINK : 0); ++ if (err < 0) ++ return err; ++ ++ err = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_STD_MASK, ++ en ? VEND1_GLOBAL_INT_STD_MASK_ALL : 0); ++ if (err < 0) ++ return err; ++ ++ err = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_VEND_MASK, ++ en ? VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 | ++ VEND1_GLOBAL_INT_VEND_MASK_AN : 0); ++ if (err < 0) ++ return err; ++ ++ if (!en) { ++ /* Clear any pending interrupts after we have disabled them */ ++ err = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_STATUS2); ++ if (err < 0) ++ return err; ++ } ++ ++ return 0; ++} ++ ++static irqreturn_t aqr_handle_interrupt(struct phy_device *phydev) ++{ ++ int irq_status; ++ ++ irq_status = phy_read_mmd(phydev, MDIO_MMD_AN, ++ MDIO_AN_TX_VEND_INT_STATUS2); ++ if (irq_status < 0) { ++ phy_error(phydev); ++ return IRQ_NONE; ++ } ++ ++ if (!(irq_status & MDIO_AN_TX_VEND_INT_STATUS2_MASK)) ++ return IRQ_NONE; ++ ++ phy_trigger_machine(phydev); ++ ++ return IRQ_HANDLED; ++} ++ ++static int aqr_read_status(struct phy_device *phydev) ++{ ++ int val; ++ ++ if (phydev->autoneg == AUTONEG_ENABLE) { ++ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); ++ if (val < 0) ++ return val; ++ ++ linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, ++ phydev->lp_advertising, ++ val & MDIO_AN_RX_LP_STAT1_1000BASET_FULL); ++ linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, ++ phydev->lp_advertising, ++ val & MDIO_AN_RX_LP_STAT1_1000BASET_HALF); ++ } ++ ++ return genphy_c45_read_status(phydev); ++} ++ ++static int aqr107_read_rate(struct phy_device *phydev) ++{ ++ u32 config_reg; ++ int val; ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1); ++ if (val < 0) ++ return val; ++ ++ if (val & MDIO_AN_TX_VEND_STATUS1_FULL_DUPLEX) ++ phydev->duplex = DUPLEX_FULL; ++ else ++ phydev->duplex = DUPLEX_HALF; ++ ++ switch (FIELD_GET(MDIO_AN_TX_VEND_STATUS1_RATE_MASK, val)) { ++ case MDIO_AN_TX_VEND_STATUS1_10BASET: ++ phydev->speed = SPEED_10; ++ config_reg = VEND1_GLOBAL_CFG_10M; ++ break; ++ case MDIO_AN_TX_VEND_STATUS1_100BASETX: ++ phydev->speed = SPEED_100; ++ config_reg = VEND1_GLOBAL_CFG_100M; ++ break; ++ case MDIO_AN_TX_VEND_STATUS1_1000BASET: ++ phydev->speed = SPEED_1000; ++ config_reg = VEND1_GLOBAL_CFG_1G; ++ break; ++ case MDIO_AN_TX_VEND_STATUS1_2500BASET: ++ phydev->speed = SPEED_2500; ++ config_reg = VEND1_GLOBAL_CFG_2_5G; ++ break; ++ case MDIO_AN_TX_VEND_STATUS1_5000BASET: ++ phydev->speed = SPEED_5000; ++ config_reg = VEND1_GLOBAL_CFG_5G; ++ break; ++ case MDIO_AN_TX_VEND_STATUS1_10GBASET: ++ phydev->speed = SPEED_10000; ++ config_reg = VEND1_GLOBAL_CFG_10G; ++ break; ++ default: ++ phydev->speed = SPEED_UNKNOWN; ++ return 0; ++ } ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg); ++ if (val < 0) ++ return val; ++ ++ if (FIELD_GET(VEND1_GLOBAL_CFG_RATE_ADAPT, val) == ++ VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE) ++ phydev->rate_matching = RATE_MATCH_PAUSE; ++ else ++ phydev->rate_matching = RATE_MATCH_NONE; ++ ++ return 0; ++} ++ ++static int aqr107_read_status(struct phy_device *phydev) ++{ ++ int val, ret; ++ ++ ret = aqr_read_status(phydev); ++ if (ret) ++ return ret; ++ ++ if (!phydev->link || phydev->autoneg == AUTONEG_DISABLE) ++ return 0; ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_VEND_IF_STATUS); ++ if (val < 0) ++ return val; ++ ++ switch (FIELD_GET(MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK, val)) { ++ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR: ++ phydev->interface = PHY_INTERFACE_MODE_10GKR; ++ break; ++ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX: ++ phydev->interface = PHY_INTERFACE_MODE_1000BASEKX; ++ break; ++ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI: ++ phydev->interface = PHY_INTERFACE_MODE_10GBASER; ++ break; ++ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII: ++ phydev->interface = PHY_INTERFACE_MODE_USXGMII; ++ break; ++ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI: ++ phydev->interface = PHY_INTERFACE_MODE_XAUI; ++ break; ++ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII: ++ phydev->interface = PHY_INTERFACE_MODE_SGMII; ++ break; ++ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI: ++ phydev->interface = PHY_INTERFACE_MODE_RXAUI; ++ break; ++ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII: ++ phydev->interface = PHY_INTERFACE_MODE_2500BASEX; ++ break; ++ default: ++ phydev->interface = PHY_INTERFACE_MODE_NA; ++ break; ++ } ++ ++ /* Read possibly downshifted rate from vendor register */ ++ return aqr107_read_rate(phydev); ++} ++ ++static int aqr107_get_downshift(struct phy_device *phydev, u8 *data) ++{ ++ int val, cnt, enable; ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV); ++ if (val < 0) ++ return val; ++ ++ enable = FIELD_GET(MDIO_AN_VEND_PROV_DOWNSHIFT_EN, val); ++ cnt = FIELD_GET(MDIO_AN_VEND_PROV_DOWNSHIFT_MASK, val); ++ ++ *data = enable && cnt ? cnt : DOWNSHIFT_DEV_DISABLE; ++ ++ return 0; ++} ++ ++static int aqr107_set_downshift(struct phy_device *phydev, u8 cnt) ++{ ++ int val = 0; ++ ++ if (!FIELD_FIT(MDIO_AN_VEND_PROV_DOWNSHIFT_MASK, cnt)) ++ return -E2BIG; ++ ++ if (cnt != DOWNSHIFT_DEV_DISABLE) { ++ val = MDIO_AN_VEND_PROV_DOWNSHIFT_EN; ++ val |= FIELD_PREP(MDIO_AN_VEND_PROV_DOWNSHIFT_MASK, cnt); ++ } ++ ++ return phy_modify_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV, ++ MDIO_AN_VEND_PROV_DOWNSHIFT_EN | ++ MDIO_AN_VEND_PROV_DOWNSHIFT_MASK, val); ++} ++ ++static int aqr107_get_tunable(struct phy_device *phydev, ++ struct ethtool_tunable *tuna, void *data) ++{ ++ switch (tuna->id) { ++ case ETHTOOL_PHY_DOWNSHIFT: ++ return aqr107_get_downshift(phydev, data); ++ default: ++ return -EOPNOTSUPP; ++ } ++} ++ ++static int aqr107_set_tunable(struct phy_device *phydev, ++ struct ethtool_tunable *tuna, const void *data) ++{ ++ switch (tuna->id) { ++ case ETHTOOL_PHY_DOWNSHIFT: ++ return aqr107_set_downshift(phydev, *(const u8 *)data); ++ default: ++ return -EOPNOTSUPP; ++ } ++} ++ ++/* If we configure settings whilst firmware is still initializing the chip, ++ * then these settings may be overwritten. Therefore make sure chip ++ * initialization has completed. Use presence of the firmware ID as ++ * indicator for initialization having completed. ++ * The chip also provides a "reset completed" bit, but it's cleared after ++ * read. Therefore function would time out if called again. ++ */ ++static int aqr107_wait_reset_complete(struct phy_device *phydev) ++{ ++ int val; ++ ++ return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, ++ VEND1_GLOBAL_FW_ID, val, val != 0, ++ 20000, 2000000, false); ++} ++ ++static void aqr107_chip_info(struct phy_device *phydev) ++{ ++ u8 fw_major, fw_minor, build_id, prov_id; ++ int val; ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); ++ if (val < 0) ++ return; ++ ++ fw_major = FIELD_GET(VEND1_GLOBAL_FW_ID_MAJOR, val); ++ fw_minor = FIELD_GET(VEND1_GLOBAL_FW_ID_MINOR, val); ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT1); ++ if (val < 0) ++ return; ++ ++ build_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID, val); ++ prov_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_PROV_ID, val); ++ ++ phydev_dbg(phydev, "FW %u.%u, Build %u, Provisioning %u\n", ++ fw_major, fw_minor, build_id, prov_id); ++} ++ ++static int aqr107_config_init(struct phy_device *phydev) ++{ ++ int ret; ++ ++ /* Check that the PHY interface type is compatible */ ++ if (phydev->interface != PHY_INTERFACE_MODE_SGMII && ++ phydev->interface != PHY_INTERFACE_MODE_1000BASEKX && ++ phydev->interface != PHY_INTERFACE_MODE_2500BASEX && ++ phydev->interface != PHY_INTERFACE_MODE_XGMII && ++ phydev->interface != PHY_INTERFACE_MODE_USXGMII && ++ phydev->interface != PHY_INTERFACE_MODE_10GKR && ++ phydev->interface != PHY_INTERFACE_MODE_10GBASER && ++ phydev->interface != PHY_INTERFACE_MODE_XAUI && ++ phydev->interface != PHY_INTERFACE_MODE_RXAUI) ++ return -ENODEV; ++ ++ WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII, ++ "Your devicetree is out of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n"); ++ ++ ret = aqr107_wait_reset_complete(phydev); ++ if (!ret) ++ aqr107_chip_info(phydev); ++ ++ return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); ++} ++ ++static int aqcs109_config_init(struct phy_device *phydev) ++{ ++ int ret; ++ ++ /* Check that the PHY interface type is compatible */ ++ if (phydev->interface != PHY_INTERFACE_MODE_SGMII && ++ phydev->interface != PHY_INTERFACE_MODE_2500BASEX) ++ return -ENODEV; ++ ++ ret = aqr107_wait_reset_complete(phydev); ++ if (!ret) ++ aqr107_chip_info(phydev); ++ ++ /* AQCS109 belongs to a chip family partially supporting 10G and 5G. ++ * PMA speed ability bits are the same for all members of the family, ++ * AQCS109 however supports speeds up to 2.5G only. ++ */ ++ phy_set_max_speed(phydev, SPEED_2500); ++ ++ return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); ++} ++ ++static void aqr107_link_change_notify(struct phy_device *phydev) ++{ ++ u8 fw_major, fw_minor; ++ bool downshift, short_reach, afr; ++ int mode, val; ++ ++ if (phydev->state != PHY_RUNNING || phydev->autoneg == AUTONEG_DISABLE) ++ return; ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); ++ /* call failed or link partner is no Aquantia PHY */ ++ if (val < 0 || !(val & MDIO_AN_RX_LP_STAT1_AQ_PHY)) ++ return; ++ ++ short_reach = val & MDIO_AN_RX_LP_STAT1_SHORT_REACH; ++ downshift = val & MDIO_AN_RX_LP_STAT1_AQRATE_DOWNSHIFT; ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT4); ++ if (val < 0) ++ return; ++ ++ fw_major = FIELD_GET(MDIO_AN_RX_LP_STAT4_FW_MAJOR, val); ++ fw_minor = FIELD_GET(MDIO_AN_RX_LP_STAT4_FW_MINOR, val); ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_VEND_STAT3); ++ if (val < 0) ++ return; ++ ++ afr = val & MDIO_AN_RX_VEND_STAT3_AFR; ++ ++ phydev_dbg(phydev, "Link partner is Aquantia PHY, FW %u.%u%s%s%s\n", ++ fw_major, fw_minor, ++ short_reach ? ", short reach mode" : "", ++ downshift ? ", fast-retrain downshift advertised" : "", ++ afr ? ", fast reframe advertised" : ""); ++ ++ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT9); ++ if (val < 0) ++ return; ++ ++ mode = FIELD_GET(VEND1_GLOBAL_RSVD_STAT9_MODE, val); ++ if (mode == VEND1_GLOBAL_RSVD_STAT9_1000BT2) ++ phydev_info(phydev, "Aquantia 1000Base-T2 mode active\n"); ++} ++ ++static int aqr107_wait_processor_intensive_op(struct phy_device *phydev) ++{ ++ int val, err; ++ ++ /* The datasheet notes to wait at least 1ms after issuing a ++ * processor intensive operation before checking. ++ * We cannot use the 'sleep_before_read' parameter of read_poll_timeout ++ * because that just determines the maximum time slept, not the minimum. ++ */ ++ usleep_range(1000, 5000); ++ ++ err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, ++ VEND1_GLOBAL_GEN_STAT2, val, ++ !(val & VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG), ++ AQR107_OP_IN_PROG_SLEEP, ++ AQR107_OP_IN_PROG_TIMEOUT, false); ++ if (err) { ++ phydev_err(phydev, "timeout: processor-intensive MDIO operation\n"); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static int aqr107_get_rate_matching(struct phy_device *phydev, ++ phy_interface_t iface) ++{ ++ if (iface == PHY_INTERFACE_MODE_10GBASER || ++ iface == PHY_INTERFACE_MODE_2500BASEX || ++ iface == PHY_INTERFACE_MODE_NA) ++ return RATE_MATCH_PAUSE; ++ return RATE_MATCH_NONE; ++} ++ ++static int aqr107_suspend(struct phy_device *phydev) ++{ ++ int err; ++ ++ err = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, ++ MDIO_CTRL1_LPOWER); ++ if (err) ++ return err; ++ ++ return aqr107_wait_processor_intensive_op(phydev); ++} ++ ++static int aqr107_resume(struct phy_device *phydev) ++{ ++ int err; ++ ++ err = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, ++ MDIO_CTRL1_LPOWER); ++ if (err) ++ return err; ++ ++ return aqr107_wait_processor_intensive_op(phydev); ++} ++ ++static int aqr107_probe(struct phy_device *phydev) ++{ ++ phydev->priv = devm_kzalloc(&phydev->mdio.dev, ++ sizeof(struct aqr107_priv), GFP_KERNEL); ++ if (!phydev->priv) ++ return -ENOMEM; ++ ++ return aqr_hwmon_probe(phydev); ++} ++ ++static struct phy_driver aqr_driver[] = { ++{ ++ PHY_ID_MATCH_MODEL(PHY_ID_AQ1202), ++ .name = "Aquantia AQ1202", ++ .config_aneg = aqr_config_aneg, ++ .config_intr = aqr_config_intr, ++ .handle_interrupt = aqr_handle_interrupt, ++ .read_status = aqr_read_status, ++}, ++{ ++ PHY_ID_MATCH_MODEL(PHY_ID_AQ2104), ++ .name = "Aquantia AQ2104", ++ .config_aneg = aqr_config_aneg, ++ .config_intr = aqr_config_intr, ++ .handle_interrupt = aqr_handle_interrupt, ++ .read_status = aqr_read_status, ++}, ++{ ++ PHY_ID_MATCH_MODEL(PHY_ID_AQR105), ++ .name = "Aquantia AQR105", ++ .config_aneg = aqr_config_aneg, ++ .config_intr = aqr_config_intr, ++ .handle_interrupt = aqr_handle_interrupt, ++ .read_status = aqr_read_status, ++ .suspend = aqr107_suspend, ++ .resume = aqr107_resume, ++}, ++{ ++ PHY_ID_MATCH_MODEL(PHY_ID_AQR106), ++ .name = "Aquantia AQR106", ++ .config_aneg = aqr_config_aneg, ++ .config_intr = aqr_config_intr, ++ .handle_interrupt = aqr_handle_interrupt, ++ .read_status = aqr_read_status, ++}, ++{ ++ PHY_ID_MATCH_MODEL(PHY_ID_AQR107), ++ .name = "Aquantia AQR107", ++ .probe = aqr107_probe, ++ .get_rate_matching = aqr107_get_rate_matching, ++ .config_init = aqr107_config_init, ++ .config_aneg = aqr_config_aneg, ++ .config_intr = aqr_config_intr, ++ .handle_interrupt = aqr_handle_interrupt, ++ .read_status = aqr107_read_status, ++ .get_tunable = aqr107_get_tunable, ++ .set_tunable = aqr107_set_tunable, ++ .suspend = aqr107_suspend, ++ .resume = aqr107_resume, ++ .get_sset_count = aqr107_get_sset_count, ++ .get_strings = aqr107_get_strings, ++ .get_stats = aqr107_get_stats, ++ .link_change_notify = aqr107_link_change_notify, ++}, ++{ ++ PHY_ID_MATCH_MODEL(PHY_ID_AQCS109), ++ .name = "Aquantia AQCS109", ++ .probe = aqr107_probe, ++ .get_rate_matching = aqr107_get_rate_matching, ++ .config_init = aqcs109_config_init, ++ .config_aneg = aqr_config_aneg, ++ .config_intr = aqr_config_intr, ++ .handle_interrupt = aqr_handle_interrupt, ++ .read_status = aqr107_read_status, ++ .get_tunable = aqr107_get_tunable, ++ .set_tunable = aqr107_set_tunable, ++ .suspend = aqr107_suspend, ++ .resume = aqr107_resume, ++ .get_sset_count = aqr107_get_sset_count, ++ .get_strings = aqr107_get_strings, ++ .get_stats = aqr107_get_stats, ++ .link_change_notify = aqr107_link_change_notify, ++}, ++{ ++ PHY_ID_MATCH_MODEL(PHY_ID_AQR405), ++ .name = "Aquantia AQR405", ++ .config_aneg = aqr_config_aneg, ++ .config_intr = aqr_config_intr, ++ .handle_interrupt = aqr_handle_interrupt, ++ .read_status = aqr_read_status, ++}, ++{ ++ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C), ++ .name = "Aquantia AQR113C", ++ .probe = aqr107_probe, ++ .get_rate_matching = aqr107_get_rate_matching, ++ .config_init = aqr107_config_init, ++ .config_aneg = aqr_config_aneg, ++ .config_intr = aqr_config_intr, ++ .handle_interrupt = aqr_handle_interrupt, ++ .read_status = aqr107_read_status, ++ .get_tunable = aqr107_get_tunable, ++ .set_tunable = aqr107_set_tunable, ++ .suspend = aqr107_suspend, ++ .resume = aqr107_resume, ++ .get_sset_count = aqr107_get_sset_count, ++ .get_strings = aqr107_get_strings, ++ .get_stats = aqr107_get_stats, ++ .link_change_notify = aqr107_link_change_notify, ++}, ++}; ++ ++module_phy_driver(aqr_driver); ++ ++static struct mdio_device_id __maybe_unused aqr_tbl[] = { ++ { PHY_ID_MATCH_MODEL(PHY_ID_AQ1202) }, ++ { PHY_ID_MATCH_MODEL(PHY_ID_AQ2104) }, ++ { PHY_ID_MATCH_MODEL(PHY_ID_AQR105) }, ++ { PHY_ID_MATCH_MODEL(PHY_ID_AQR106) }, ++ { PHY_ID_MATCH_MODEL(PHY_ID_AQR107) }, ++ { PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) }, ++ { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) }, ++ { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) }, ++ { } ++}; ++ ++MODULE_DEVICE_TABLE(mdio, aqr_tbl); ++ ++MODULE_DESCRIPTION("Aquantia PHY driver"); ++MODULE_AUTHOR("Shaohui Xie "); ++MODULE_LICENSE("GPL v2"); +--- a/drivers/net/phy/aquantia_hwmon.c ++++ /dev/null +@@ -1,250 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* HWMON driver for Aquantia PHY +- * +- * Author: Nikita Yushchenko +- * Author: Andrew Lunn +- * Author: Heiner Kallweit +- */ +- +-#include +-#include +-#include +-#include +- +-#include "aquantia.h" +- +-/* Vendor specific 1, MDIO_MMD_VEND2 */ +-#define VEND1_THERMAL_PROV_HIGH_TEMP_FAIL 0xc421 +-#define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422 +-#define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423 +-#define VEND1_THERMAL_PROV_LOW_TEMP_WARN 0xc424 +-#define VEND1_THERMAL_STAT1 0xc820 +-#define VEND1_THERMAL_STAT2 0xc821 +-#define VEND1_THERMAL_STAT2_VALID BIT(0) +-#define VEND1_GENERAL_STAT1 0xc830 +-#define VEND1_GENERAL_STAT1_HIGH_TEMP_FAIL BIT(14) +-#define VEND1_GENERAL_STAT1_LOW_TEMP_FAIL BIT(13) +-#define VEND1_GENERAL_STAT1_HIGH_TEMP_WARN BIT(12) +-#define VEND1_GENERAL_STAT1_LOW_TEMP_WARN BIT(11) +- +-#if IS_REACHABLE(CONFIG_HWMON) +- +-static umode_t aqr_hwmon_is_visible(const void *data, +- enum hwmon_sensor_types type, +- u32 attr, int channel) +-{ +- if (type != hwmon_temp) +- return 0; +- +- switch (attr) { +- case hwmon_temp_input: +- case hwmon_temp_min_alarm: +- case hwmon_temp_max_alarm: +- case hwmon_temp_lcrit_alarm: +- case hwmon_temp_crit_alarm: +- return 0444; +- case hwmon_temp_min: +- case hwmon_temp_max: +- case hwmon_temp_lcrit: +- case hwmon_temp_crit: +- return 0644; +- default: +- return 0; +- } +-} +- +-static int aqr_hwmon_get(struct phy_device *phydev, int reg, long *value) +-{ +- int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); +- +- if (temp < 0) +- return temp; +- +- /* 16 bit value is 2's complement with LSB = 1/256th degree Celsius */ +- *value = (s16)temp * 1000 / 256; +- +- return 0; +-} +- +-static int aqr_hwmon_set(struct phy_device *phydev, int reg, long value) +-{ +- int temp; +- +- if (value >= 128000 || value < -128000) +- return -ERANGE; +- +- temp = value * 256 / 1000; +- +- /* temp is in s16 range and we're interested in lower 16 bits only */ +- return phy_write_mmd(phydev, MDIO_MMD_VEND1, reg, (u16)temp); +-} +- +-static int aqr_hwmon_test_bit(struct phy_device *phydev, int reg, int bit) +-{ +- int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); +- +- if (val < 0) +- return val; +- +- return !!(val & bit); +-} +- +-static int aqr_hwmon_status1(struct phy_device *phydev, int bit, long *value) +-{ +- int val = aqr_hwmon_test_bit(phydev, VEND1_GENERAL_STAT1, bit); +- +- if (val < 0) +- return val; +- +- *value = val; +- +- return 0; +-} +- +-static int aqr_hwmon_read(struct device *dev, enum hwmon_sensor_types type, +- u32 attr, int channel, long *value) +-{ +- struct phy_device *phydev = dev_get_drvdata(dev); +- int reg; +- +- if (type != hwmon_temp) +- return -EOPNOTSUPP; +- +- switch (attr) { +- case hwmon_temp_input: +- reg = aqr_hwmon_test_bit(phydev, VEND1_THERMAL_STAT2, +- VEND1_THERMAL_STAT2_VALID); +- if (reg < 0) +- return reg; +- if (!reg) +- return -EBUSY; +- +- return aqr_hwmon_get(phydev, VEND1_THERMAL_STAT1, value); +- +- case hwmon_temp_lcrit: +- return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_LOW_TEMP_FAIL, +- value); +- case hwmon_temp_min: +- return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_LOW_TEMP_WARN, +- value); +- case hwmon_temp_max: +- return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_WARN, +- value); +- case hwmon_temp_crit: +- return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_FAIL, +- value); +- case hwmon_temp_lcrit_alarm: +- return aqr_hwmon_status1(phydev, +- VEND1_GENERAL_STAT1_LOW_TEMP_FAIL, +- value); +- case hwmon_temp_min_alarm: +- return aqr_hwmon_status1(phydev, +- VEND1_GENERAL_STAT1_LOW_TEMP_WARN, +- value); +- case hwmon_temp_max_alarm: +- return aqr_hwmon_status1(phydev, +- VEND1_GENERAL_STAT1_HIGH_TEMP_WARN, +- value); +- case hwmon_temp_crit_alarm: +- return aqr_hwmon_status1(phydev, +- VEND1_GENERAL_STAT1_HIGH_TEMP_FAIL, +- value); +- default: +- return -EOPNOTSUPP; +- } +-} +- +-static int aqr_hwmon_write(struct device *dev, enum hwmon_sensor_types type, +- u32 attr, int channel, long value) +-{ +- struct phy_device *phydev = dev_get_drvdata(dev); +- +- if (type != hwmon_temp) +- return -EOPNOTSUPP; +- +- switch (attr) { +- case hwmon_temp_lcrit: +- return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_LOW_TEMP_FAIL, +- value); +- case hwmon_temp_min: +- return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_LOW_TEMP_WARN, +- value); +- case hwmon_temp_max: +- return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_WARN, +- value); +- case hwmon_temp_crit: +- return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_FAIL, +- value); +- default: +- return -EOPNOTSUPP; +- } +-} +- +-static const struct hwmon_ops aqr_hwmon_ops = { +- .is_visible = aqr_hwmon_is_visible, +- .read = aqr_hwmon_read, +- .write = aqr_hwmon_write, +-}; +- +-static u32 aqr_hwmon_chip_config[] = { +- HWMON_C_REGISTER_TZ, +- 0, +-}; +- +-static const struct hwmon_channel_info aqr_hwmon_chip = { +- .type = hwmon_chip, +- .config = aqr_hwmon_chip_config, +-}; +- +-static u32 aqr_hwmon_temp_config[] = { +- HWMON_T_INPUT | +- HWMON_T_MAX | HWMON_T_MIN | +- HWMON_T_MAX_ALARM | HWMON_T_MIN_ALARM | +- HWMON_T_CRIT | HWMON_T_LCRIT | +- HWMON_T_CRIT_ALARM | HWMON_T_LCRIT_ALARM, +- 0, +-}; +- +-static const struct hwmon_channel_info aqr_hwmon_temp = { +- .type = hwmon_temp, +- .config = aqr_hwmon_temp_config, +-}; +- +-static const struct hwmon_channel_info *aqr_hwmon_info[] = { +- &aqr_hwmon_chip, +- &aqr_hwmon_temp, +- NULL, +-}; +- +-static const struct hwmon_chip_info aqr_hwmon_chip_info = { +- .ops = &aqr_hwmon_ops, +- .info = aqr_hwmon_info, +-}; +- +-int aqr_hwmon_probe(struct phy_device *phydev) +-{ +- struct device *dev = &phydev->mdio.dev; +- struct device *hwmon_dev; +- char *hwmon_name; +- int i, j; +- +- hwmon_name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL); +- if (!hwmon_name) +- return -ENOMEM; +- +- for (i = j = 0; hwmon_name[i]; i++) { +- if (isalnum(hwmon_name[i])) { +- if (i != j) +- hwmon_name[j] = hwmon_name[i]; +- j++; +- } +- } +- hwmon_name[j] = '\0'; +- +- hwmon_dev = devm_hwmon_device_register_with_info(dev, hwmon_name, +- phydev, &aqr_hwmon_chip_info, NULL); +- +- return PTR_ERR_OR_ZERO(hwmon_dev); +-} +- +-#endif +--- a/drivers/net/phy/aquantia_main.c ++++ /dev/null +@@ -1,842 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* +- * Driver for Aquantia PHY +- * +- * Author: Shaohui Xie +- * +- * Copyright 2015 Freescale Semiconductor, Inc. +- */ +- +-#include +-#include +-#include +-#include +-#include +- +-#include "aquantia.h" +- +-#define PHY_ID_AQ1202 0x03a1b445 +-#define PHY_ID_AQ2104 0x03a1b460 +-#define PHY_ID_AQR105 0x03a1b4a2 +-#define PHY_ID_AQR106 0x03a1b4d0 +-#define PHY_ID_AQR107 0x03a1b4e0 +-#define PHY_ID_AQCS109 0x03a1b5c2 +-#define PHY_ID_AQR405 0x03a1b4b0 +-#define PHY_ID_AQR113C 0x31c31c12 +- +-#define MDIO_PHYXS_VEND_IF_STATUS 0xe812 +-#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3) +-#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR 0 +-#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX 1 +-#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI 2 +-#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII 3 +-#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI 4 +-#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII 6 +-#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI 7 +-#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII 10 +- +-#define MDIO_AN_VEND_PROV 0xc400 +-#define MDIO_AN_VEND_PROV_1000BASET_FULL BIT(15) +-#define MDIO_AN_VEND_PROV_1000BASET_HALF BIT(14) +-#define MDIO_AN_VEND_PROV_5000BASET_FULL BIT(11) +-#define MDIO_AN_VEND_PROV_2500BASET_FULL BIT(10) +-#define MDIO_AN_VEND_PROV_DOWNSHIFT_EN BIT(4) +-#define MDIO_AN_VEND_PROV_DOWNSHIFT_MASK GENMASK(3, 0) +-#define MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT 4 +- +-#define MDIO_AN_TX_VEND_STATUS1 0xc800 +-#define MDIO_AN_TX_VEND_STATUS1_RATE_MASK GENMASK(3, 1) +-#define MDIO_AN_TX_VEND_STATUS1_10BASET 0 +-#define MDIO_AN_TX_VEND_STATUS1_100BASETX 1 +-#define MDIO_AN_TX_VEND_STATUS1_1000BASET 2 +-#define MDIO_AN_TX_VEND_STATUS1_10GBASET 3 +-#define MDIO_AN_TX_VEND_STATUS1_2500BASET 4 +-#define MDIO_AN_TX_VEND_STATUS1_5000BASET 5 +-#define MDIO_AN_TX_VEND_STATUS1_FULL_DUPLEX BIT(0) +- +-#define MDIO_AN_TX_VEND_INT_STATUS1 0xcc00 +-#define MDIO_AN_TX_VEND_INT_STATUS1_DOWNSHIFT BIT(1) +- +-#define MDIO_AN_TX_VEND_INT_STATUS2 0xcc01 +-#define MDIO_AN_TX_VEND_INT_STATUS2_MASK BIT(0) +- +-#define MDIO_AN_TX_VEND_INT_MASK2 0xd401 +-#define MDIO_AN_TX_VEND_INT_MASK2_LINK BIT(0) +- +-#define MDIO_AN_RX_LP_STAT1 0xe820 +-#define MDIO_AN_RX_LP_STAT1_1000BASET_FULL BIT(15) +-#define MDIO_AN_RX_LP_STAT1_1000BASET_HALF BIT(14) +-#define MDIO_AN_RX_LP_STAT1_SHORT_REACH BIT(13) +-#define MDIO_AN_RX_LP_STAT1_AQRATE_DOWNSHIFT BIT(12) +-#define MDIO_AN_RX_LP_STAT1_AQ_PHY BIT(2) +- +-#define MDIO_AN_RX_LP_STAT4 0xe823 +-#define MDIO_AN_RX_LP_STAT4_FW_MAJOR GENMASK(15, 8) +-#define MDIO_AN_RX_LP_STAT4_FW_MINOR GENMASK(7, 0) +- +-#define MDIO_AN_RX_VEND_STAT3 0xe832 +-#define MDIO_AN_RX_VEND_STAT3_AFR BIT(0) +- +-/* MDIO_MMD_C22EXT */ +-#define MDIO_C22EXT_STAT_SGMII_RX_GOOD_FRAMES 0xd292 +-#define MDIO_C22EXT_STAT_SGMII_RX_BAD_FRAMES 0xd294 +-#define MDIO_C22EXT_STAT_SGMII_RX_FALSE_CARRIER 0xd297 +-#define MDIO_C22EXT_STAT_SGMII_TX_GOOD_FRAMES 0xd313 +-#define MDIO_C22EXT_STAT_SGMII_TX_BAD_FRAMES 0xd315 +-#define MDIO_C22EXT_STAT_SGMII_TX_FALSE_CARRIER 0xd317 +-#define MDIO_C22EXT_STAT_SGMII_TX_COLLISIONS 0xd318 +-#define MDIO_C22EXT_STAT_SGMII_TX_LINE_COLLISIONS 0xd319 +-#define MDIO_C22EXT_STAT_SGMII_TX_FRAME_ALIGN_ERR 0xd31a +-#define MDIO_C22EXT_STAT_SGMII_TX_RUNT_FRAMES 0xd31b +- +-/* Vendor specific 1, MDIO_MMD_VEND1 */ +-#define VEND1_GLOBAL_FW_ID 0x0020 +-#define VEND1_GLOBAL_FW_ID_MAJOR GENMASK(15, 8) +-#define VEND1_GLOBAL_FW_ID_MINOR GENMASK(7, 0) +- +-#define VEND1_GLOBAL_GEN_STAT2 0xc831 +-#define VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG BIT(15) +- +-/* The following registers all have similar layouts; first the registers... */ +-#define VEND1_GLOBAL_CFG_10M 0x0310 +-#define VEND1_GLOBAL_CFG_100M 0x031b +-#define VEND1_GLOBAL_CFG_1G 0x031c +-#define VEND1_GLOBAL_CFG_2_5G 0x031d +-#define VEND1_GLOBAL_CFG_5G 0x031e +-#define VEND1_GLOBAL_CFG_10G 0x031f +-/* ...and now the fields */ +-#define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7) +-#define VEND1_GLOBAL_CFG_RATE_ADAPT_NONE 0 +-#define VEND1_GLOBAL_CFG_RATE_ADAPT_USX 1 +-#define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2 +- +-#define VEND1_GLOBAL_RSVD_STAT1 0xc885 +-#define VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID GENMASK(7, 4) +-#define VEND1_GLOBAL_RSVD_STAT1_PROV_ID GENMASK(3, 0) +- +-#define VEND1_GLOBAL_RSVD_STAT9 0xc88d +-#define VEND1_GLOBAL_RSVD_STAT9_MODE GENMASK(7, 0) +-#define VEND1_GLOBAL_RSVD_STAT9_1000BT2 0x23 +- +-#define VEND1_GLOBAL_INT_STD_STATUS 0xfc00 +-#define VEND1_GLOBAL_INT_VEND_STATUS 0xfc01 +- +-#define VEND1_GLOBAL_INT_STD_MASK 0xff00 +-#define VEND1_GLOBAL_INT_STD_MASK_PMA1 BIT(15) +-#define VEND1_GLOBAL_INT_STD_MASK_PMA2 BIT(14) +-#define VEND1_GLOBAL_INT_STD_MASK_PCS1 BIT(13) +-#define VEND1_GLOBAL_INT_STD_MASK_PCS2 BIT(12) +-#define VEND1_GLOBAL_INT_STD_MASK_PCS3 BIT(11) +-#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS1 BIT(10) +-#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS2 BIT(9) +-#define VEND1_GLOBAL_INT_STD_MASK_AN1 BIT(8) +-#define VEND1_GLOBAL_INT_STD_MASK_AN2 BIT(7) +-#define VEND1_GLOBAL_INT_STD_MASK_GBE BIT(6) +-#define VEND1_GLOBAL_INT_STD_MASK_ALL BIT(0) +- +-#define VEND1_GLOBAL_INT_VEND_MASK 0xff01 +-#define VEND1_GLOBAL_INT_VEND_MASK_PMA BIT(15) +-#define VEND1_GLOBAL_INT_VEND_MASK_PCS BIT(14) +-#define VEND1_GLOBAL_INT_VEND_MASK_PHY_XS BIT(13) +-#define VEND1_GLOBAL_INT_VEND_MASK_AN BIT(12) +-#define VEND1_GLOBAL_INT_VEND_MASK_GBE BIT(11) +-#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL1 BIT(2) +-#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2 BIT(1) +-#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 BIT(0) +- +-/* Sleep and timeout for checking if the Processor-Intensive +- * MDIO operation is finished +- */ +-#define AQR107_OP_IN_PROG_SLEEP 1000 +-#define AQR107_OP_IN_PROG_TIMEOUT 100000 +- +-struct aqr107_hw_stat { +- const char *name; +- int reg; +- int size; +-}; +- +-#define SGMII_STAT(n, r, s) { n, MDIO_C22EXT_STAT_SGMII_ ## r, s } +-static const struct aqr107_hw_stat aqr107_hw_stats[] = { +- SGMII_STAT("sgmii_rx_good_frames", RX_GOOD_FRAMES, 26), +- SGMII_STAT("sgmii_rx_bad_frames", RX_BAD_FRAMES, 26), +- SGMII_STAT("sgmii_rx_false_carrier_events", RX_FALSE_CARRIER, 8), +- SGMII_STAT("sgmii_tx_good_frames", TX_GOOD_FRAMES, 26), +- SGMII_STAT("sgmii_tx_bad_frames", TX_BAD_FRAMES, 26), +- SGMII_STAT("sgmii_tx_false_carrier_events", TX_FALSE_CARRIER, 8), +- SGMII_STAT("sgmii_tx_collisions", TX_COLLISIONS, 8), +- SGMII_STAT("sgmii_tx_line_collisions", TX_LINE_COLLISIONS, 8), +- SGMII_STAT("sgmii_tx_frame_alignment_err", TX_FRAME_ALIGN_ERR, 16), +- SGMII_STAT("sgmii_tx_runt_frames", TX_RUNT_FRAMES, 22), +-}; +-#define AQR107_SGMII_STAT_SZ ARRAY_SIZE(aqr107_hw_stats) +- +-struct aqr107_priv { +- u64 sgmii_stats[AQR107_SGMII_STAT_SZ]; +-}; +- +-static int aqr107_get_sset_count(struct phy_device *phydev) +-{ +- return AQR107_SGMII_STAT_SZ; +-} +- +-static void aqr107_get_strings(struct phy_device *phydev, u8 *data) +-{ +- int i; +- +- for (i = 0; i < AQR107_SGMII_STAT_SZ; i++) +- strscpy(data + i * ETH_GSTRING_LEN, aqr107_hw_stats[i].name, +- ETH_GSTRING_LEN); +-} +- +-static u64 aqr107_get_stat(struct phy_device *phydev, int index) +-{ +- const struct aqr107_hw_stat *stat = aqr107_hw_stats + index; +- int len_l = min(stat->size, 16); +- int len_h = stat->size - len_l; +- u64 ret; +- int val; +- +- val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); +- if (val < 0) +- return U64_MAX; +- +- ret = val & GENMASK(len_l - 1, 0); +- if (len_h) { +- val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); +- if (val < 0) +- return U64_MAX; +- +- ret += (val & GENMASK(len_h - 1, 0)) << 16; +- } +- +- return ret; +-} +- +-static void aqr107_get_stats(struct phy_device *phydev, +- struct ethtool_stats *stats, u64 *data) +-{ +- struct aqr107_priv *priv = phydev->priv; +- u64 val; +- int i; +- +- for (i = 0; i < AQR107_SGMII_STAT_SZ; i++) { +- val = aqr107_get_stat(phydev, i); +- if (val == U64_MAX) +- phydev_err(phydev, "Reading HW Statistics failed for %s\n", +- aqr107_hw_stats[i].name); +- else +- priv->sgmii_stats[i] += val; +- +- data[i] = priv->sgmii_stats[i]; +- } +-} +- +-static int aqr_config_aneg(struct phy_device *phydev) +-{ +- bool changed = false; +- u16 reg; +- int ret; +- +- if (phydev->autoneg == AUTONEG_DISABLE) +- return genphy_c45_pma_setup_forced(phydev); +- +- ret = genphy_c45_an_config_aneg(phydev); +- if (ret < 0) +- return ret; +- if (ret > 0) +- changed = true; +- +- /* Clause 45 has no standardized support for 1000BaseT, therefore +- * use vendor registers for this mode. +- */ +- reg = 0; +- if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, +- phydev->advertising)) +- reg |= MDIO_AN_VEND_PROV_1000BASET_FULL; +- +- if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, +- phydev->advertising)) +- reg |= MDIO_AN_VEND_PROV_1000BASET_HALF; +- +- /* Handle the case when the 2.5G and 5G speeds are not advertised */ +- if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, +- phydev->advertising)) +- reg |= MDIO_AN_VEND_PROV_2500BASET_FULL; +- +- if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, +- phydev->advertising)) +- reg |= MDIO_AN_VEND_PROV_5000BASET_FULL; +- +- ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV, +- MDIO_AN_VEND_PROV_1000BASET_HALF | +- MDIO_AN_VEND_PROV_1000BASET_FULL | +- MDIO_AN_VEND_PROV_2500BASET_FULL | +- MDIO_AN_VEND_PROV_5000BASET_FULL, reg); +- if (ret < 0) +- return ret; +- if (ret > 0) +- changed = true; +- +- return genphy_c45_check_and_restart_aneg(phydev, changed); +-} +- +-static int aqr_config_intr(struct phy_device *phydev) +-{ +- bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED; +- int err; +- +- if (en) { +- /* Clear any pending interrupts before enabling them */ +- err = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_STATUS2); +- if (err < 0) +- return err; +- } +- +- err = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_MASK2, +- en ? MDIO_AN_TX_VEND_INT_MASK2_LINK : 0); +- if (err < 0) +- return err; +- +- err = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_STD_MASK, +- en ? VEND1_GLOBAL_INT_STD_MASK_ALL : 0); +- if (err < 0) +- return err; +- +- err = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_VEND_MASK, +- en ? VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 | +- VEND1_GLOBAL_INT_VEND_MASK_AN : 0); +- if (err < 0) +- return err; +- +- if (!en) { +- /* Clear any pending interrupts after we have disabled them */ +- err = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_STATUS2); +- if (err < 0) +- return err; +- } +- +- return 0; +-} +- +-static irqreturn_t aqr_handle_interrupt(struct phy_device *phydev) +-{ +- int irq_status; +- +- irq_status = phy_read_mmd(phydev, MDIO_MMD_AN, +- MDIO_AN_TX_VEND_INT_STATUS2); +- if (irq_status < 0) { +- phy_error(phydev); +- return IRQ_NONE; +- } +- +- if (!(irq_status & MDIO_AN_TX_VEND_INT_STATUS2_MASK)) +- return IRQ_NONE; +- +- phy_trigger_machine(phydev); +- +- return IRQ_HANDLED; +-} +- +-static int aqr_read_status(struct phy_device *phydev) +-{ +- int val; +- +- if (phydev->autoneg == AUTONEG_ENABLE) { +- val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); +- if (val < 0) +- return val; +- +- linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, +- phydev->lp_advertising, +- val & MDIO_AN_RX_LP_STAT1_1000BASET_FULL); +- linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, +- phydev->lp_advertising, +- val & MDIO_AN_RX_LP_STAT1_1000BASET_HALF); +- } +- +- return genphy_c45_read_status(phydev); +-} +- +-static int aqr107_read_rate(struct phy_device *phydev) +-{ +- u32 config_reg; +- int val; +- +- val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1); +- if (val < 0) +- return val; +- +- if (val & MDIO_AN_TX_VEND_STATUS1_FULL_DUPLEX) +- phydev->duplex = DUPLEX_FULL; +- else +- phydev->duplex = DUPLEX_HALF; +- +- switch (FIELD_GET(MDIO_AN_TX_VEND_STATUS1_RATE_MASK, val)) { +- case MDIO_AN_TX_VEND_STATUS1_10BASET: +- phydev->speed = SPEED_10; +- config_reg = VEND1_GLOBAL_CFG_10M; +- break; +- case MDIO_AN_TX_VEND_STATUS1_100BASETX: +- phydev->speed = SPEED_100; +- config_reg = VEND1_GLOBAL_CFG_100M; +- break; +- case MDIO_AN_TX_VEND_STATUS1_1000BASET: +- phydev->speed = SPEED_1000; +- config_reg = VEND1_GLOBAL_CFG_1G; +- break; +- case MDIO_AN_TX_VEND_STATUS1_2500BASET: +- phydev->speed = SPEED_2500; +- config_reg = VEND1_GLOBAL_CFG_2_5G; +- break; +- case MDIO_AN_TX_VEND_STATUS1_5000BASET: +- phydev->speed = SPEED_5000; +- config_reg = VEND1_GLOBAL_CFG_5G; +- break; +- case MDIO_AN_TX_VEND_STATUS1_10GBASET: +- phydev->speed = SPEED_10000; +- config_reg = VEND1_GLOBAL_CFG_10G; +- break; +- default: +- phydev->speed = SPEED_UNKNOWN; +- return 0; +- } +- +- val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg); +- if (val < 0) +- return val; +- +- if (FIELD_GET(VEND1_GLOBAL_CFG_RATE_ADAPT, val) == +- VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE) +- phydev->rate_matching = RATE_MATCH_PAUSE; +- else +- phydev->rate_matching = RATE_MATCH_NONE; +- +- return 0; +-} +- +-static int aqr107_read_status(struct phy_device *phydev) +-{ +- int val, ret; +- +- ret = aqr_read_status(phydev); +- if (ret) +- return ret; +- +- if (!phydev->link || phydev->autoneg == AUTONEG_DISABLE) +- return 0; +- +- val = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_VEND_IF_STATUS); +- if (val < 0) +- return val; +- +- switch (FIELD_GET(MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK, val)) { +- case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR: +- phydev->interface = PHY_INTERFACE_MODE_10GKR; +- break; +- case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX: +- phydev->interface = PHY_INTERFACE_MODE_1000BASEKX; +- break; +- case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI: +- phydev->interface = PHY_INTERFACE_MODE_10GBASER; +- break; +- case MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII: +- phydev->interface = PHY_INTERFACE_MODE_USXGMII; +- break; +- case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI: +- phydev->interface = PHY_INTERFACE_MODE_XAUI; +- break; +- case MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII: +- phydev->interface = PHY_INTERFACE_MODE_SGMII; +- break; +- case MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI: +- phydev->interface = PHY_INTERFACE_MODE_RXAUI; +- break; +- case MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII: +- phydev->interface = PHY_INTERFACE_MODE_2500BASEX; +- break; +- default: +- phydev->interface = PHY_INTERFACE_MODE_NA; +- break; +- } +- +- /* Read possibly downshifted rate from vendor register */ +- return aqr107_read_rate(phydev); +-} +- +-static int aqr107_get_downshift(struct phy_device *phydev, u8 *data) +-{ +- int val, cnt, enable; +- +- val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV); +- if (val < 0) +- return val; +- +- enable = FIELD_GET(MDIO_AN_VEND_PROV_DOWNSHIFT_EN, val); +- cnt = FIELD_GET(MDIO_AN_VEND_PROV_DOWNSHIFT_MASK, val); +- +- *data = enable && cnt ? cnt : DOWNSHIFT_DEV_DISABLE; +- +- return 0; +-} +- +-static int aqr107_set_downshift(struct phy_device *phydev, u8 cnt) +-{ +- int val = 0; +- +- if (!FIELD_FIT(MDIO_AN_VEND_PROV_DOWNSHIFT_MASK, cnt)) +- return -E2BIG; +- +- if (cnt != DOWNSHIFT_DEV_DISABLE) { +- val = MDIO_AN_VEND_PROV_DOWNSHIFT_EN; +- val |= FIELD_PREP(MDIO_AN_VEND_PROV_DOWNSHIFT_MASK, cnt); +- } +- +- return phy_modify_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV, +- MDIO_AN_VEND_PROV_DOWNSHIFT_EN | +- MDIO_AN_VEND_PROV_DOWNSHIFT_MASK, val); +-} +- +-static int aqr107_get_tunable(struct phy_device *phydev, +- struct ethtool_tunable *tuna, void *data) +-{ +- switch (tuna->id) { +- case ETHTOOL_PHY_DOWNSHIFT: +- return aqr107_get_downshift(phydev, data); +- default: +- return -EOPNOTSUPP; +- } +-} +- +-static int aqr107_set_tunable(struct phy_device *phydev, +- struct ethtool_tunable *tuna, const void *data) +-{ +- switch (tuna->id) { +- case ETHTOOL_PHY_DOWNSHIFT: +- return aqr107_set_downshift(phydev, *(const u8 *)data); +- default: +- return -EOPNOTSUPP; +- } +-} +- +-/* If we configure settings whilst firmware is still initializing the chip, +- * then these settings may be overwritten. Therefore make sure chip +- * initialization has completed. Use presence of the firmware ID as +- * indicator for initialization having completed. +- * The chip also provides a "reset completed" bit, but it's cleared after +- * read. Therefore function would time out if called again. +- */ +-static int aqr107_wait_reset_complete(struct phy_device *phydev) +-{ +- int val; +- +- return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, +- VEND1_GLOBAL_FW_ID, val, val != 0, +- 20000, 2000000, false); +-} +- +-static void aqr107_chip_info(struct phy_device *phydev) +-{ +- u8 fw_major, fw_minor, build_id, prov_id; +- int val; +- +- val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); +- if (val < 0) +- return; +- +- fw_major = FIELD_GET(VEND1_GLOBAL_FW_ID_MAJOR, val); +- fw_minor = FIELD_GET(VEND1_GLOBAL_FW_ID_MINOR, val); +- +- val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT1); +- if (val < 0) +- return; +- +- build_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID, val); +- prov_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_PROV_ID, val); +- +- phydev_dbg(phydev, "FW %u.%u, Build %u, Provisioning %u\n", +- fw_major, fw_minor, build_id, prov_id); +-} +- +-static int aqr107_config_init(struct phy_device *phydev) +-{ +- int ret; +- +- /* Check that the PHY interface type is compatible */ +- if (phydev->interface != PHY_INTERFACE_MODE_SGMII && +- phydev->interface != PHY_INTERFACE_MODE_1000BASEKX && +- phydev->interface != PHY_INTERFACE_MODE_2500BASEX && +- phydev->interface != PHY_INTERFACE_MODE_XGMII && +- phydev->interface != PHY_INTERFACE_MODE_USXGMII && +- phydev->interface != PHY_INTERFACE_MODE_10GKR && +- phydev->interface != PHY_INTERFACE_MODE_10GBASER && +- phydev->interface != PHY_INTERFACE_MODE_XAUI && +- phydev->interface != PHY_INTERFACE_MODE_RXAUI) +- return -ENODEV; +- +- WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII, +- "Your devicetree is out of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n"); +- +- ret = aqr107_wait_reset_complete(phydev); +- if (!ret) +- aqr107_chip_info(phydev); +- +- return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); +-} +- +-static int aqcs109_config_init(struct phy_device *phydev) +-{ +- int ret; +- +- /* Check that the PHY interface type is compatible */ +- if (phydev->interface != PHY_INTERFACE_MODE_SGMII && +- phydev->interface != PHY_INTERFACE_MODE_2500BASEX) +- return -ENODEV; +- +- ret = aqr107_wait_reset_complete(phydev); +- if (!ret) +- aqr107_chip_info(phydev); +- +- /* AQCS109 belongs to a chip family partially supporting 10G and 5G. +- * PMA speed ability bits are the same for all members of the family, +- * AQCS109 however supports speeds up to 2.5G only. +- */ +- phy_set_max_speed(phydev, SPEED_2500); +- +- return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); +-} +- +-static void aqr107_link_change_notify(struct phy_device *phydev) +-{ +- u8 fw_major, fw_minor; +- bool downshift, short_reach, afr; +- int mode, val; +- +- if (phydev->state != PHY_RUNNING || phydev->autoneg == AUTONEG_DISABLE) +- return; +- +- val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); +- /* call failed or link partner is no Aquantia PHY */ +- if (val < 0 || !(val & MDIO_AN_RX_LP_STAT1_AQ_PHY)) +- return; +- +- short_reach = val & MDIO_AN_RX_LP_STAT1_SHORT_REACH; +- downshift = val & MDIO_AN_RX_LP_STAT1_AQRATE_DOWNSHIFT; +- +- val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT4); +- if (val < 0) +- return; +- +- fw_major = FIELD_GET(MDIO_AN_RX_LP_STAT4_FW_MAJOR, val); +- fw_minor = FIELD_GET(MDIO_AN_RX_LP_STAT4_FW_MINOR, val); +- +- val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_VEND_STAT3); +- if (val < 0) +- return; +- +- afr = val & MDIO_AN_RX_VEND_STAT3_AFR; +- +- phydev_dbg(phydev, "Link partner is Aquantia PHY, FW %u.%u%s%s%s\n", +- fw_major, fw_minor, +- short_reach ? ", short reach mode" : "", +- downshift ? ", fast-retrain downshift advertised" : "", +- afr ? ", fast reframe advertised" : ""); +- +- val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT9); +- if (val < 0) +- return; +- +- mode = FIELD_GET(VEND1_GLOBAL_RSVD_STAT9_MODE, val); +- if (mode == VEND1_GLOBAL_RSVD_STAT9_1000BT2) +- phydev_info(phydev, "Aquantia 1000Base-T2 mode active\n"); +-} +- +-static int aqr107_wait_processor_intensive_op(struct phy_device *phydev) +-{ +- int val, err; +- +- /* The datasheet notes to wait at least 1ms after issuing a +- * processor intensive operation before checking. +- * We cannot use the 'sleep_before_read' parameter of read_poll_timeout +- * because that just determines the maximum time slept, not the minimum. +- */ +- usleep_range(1000, 5000); +- +- err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, +- VEND1_GLOBAL_GEN_STAT2, val, +- !(val & VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG), +- AQR107_OP_IN_PROG_SLEEP, +- AQR107_OP_IN_PROG_TIMEOUT, false); +- if (err) { +- phydev_err(phydev, "timeout: processor-intensive MDIO operation\n"); +- return err; +- } +- +- return 0; +-} +- +-static int aqr107_get_rate_matching(struct phy_device *phydev, +- phy_interface_t iface) +-{ +- if (iface == PHY_INTERFACE_MODE_10GBASER || +- iface == PHY_INTERFACE_MODE_2500BASEX || +- iface == PHY_INTERFACE_MODE_NA) +- return RATE_MATCH_PAUSE; +- return RATE_MATCH_NONE; +-} +- +-static int aqr107_suspend(struct phy_device *phydev) +-{ +- int err; +- +- err = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, +- MDIO_CTRL1_LPOWER); +- if (err) +- return err; +- +- return aqr107_wait_processor_intensive_op(phydev); +-} +- +-static int aqr107_resume(struct phy_device *phydev) +-{ +- int err; +- +- err = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, +- MDIO_CTRL1_LPOWER); +- if (err) +- return err; +- +- return aqr107_wait_processor_intensive_op(phydev); +-} +- +-static int aqr107_probe(struct phy_device *phydev) +-{ +- phydev->priv = devm_kzalloc(&phydev->mdio.dev, +- sizeof(struct aqr107_priv), GFP_KERNEL); +- if (!phydev->priv) +- return -ENOMEM; +- +- return aqr_hwmon_probe(phydev); +-} +- +-static struct phy_driver aqr_driver[] = { +-{ +- PHY_ID_MATCH_MODEL(PHY_ID_AQ1202), +- .name = "Aquantia AQ1202", +- .config_aneg = aqr_config_aneg, +- .config_intr = aqr_config_intr, +- .handle_interrupt = aqr_handle_interrupt, +- .read_status = aqr_read_status, +-}, +-{ +- PHY_ID_MATCH_MODEL(PHY_ID_AQ2104), +- .name = "Aquantia AQ2104", +- .config_aneg = aqr_config_aneg, +- .config_intr = aqr_config_intr, +- .handle_interrupt = aqr_handle_interrupt, +- .read_status = aqr_read_status, +-}, +-{ +- PHY_ID_MATCH_MODEL(PHY_ID_AQR105), +- .name = "Aquantia AQR105", +- .config_aneg = aqr_config_aneg, +- .config_intr = aqr_config_intr, +- .handle_interrupt = aqr_handle_interrupt, +- .read_status = aqr_read_status, +- .suspend = aqr107_suspend, +- .resume = aqr107_resume, +-}, +-{ +- PHY_ID_MATCH_MODEL(PHY_ID_AQR106), +- .name = "Aquantia AQR106", +- .config_aneg = aqr_config_aneg, +- .config_intr = aqr_config_intr, +- .handle_interrupt = aqr_handle_interrupt, +- .read_status = aqr_read_status, +-}, +-{ +- PHY_ID_MATCH_MODEL(PHY_ID_AQR107), +- .name = "Aquantia AQR107", +- .probe = aqr107_probe, +- .get_rate_matching = aqr107_get_rate_matching, +- .config_init = aqr107_config_init, +- .config_aneg = aqr_config_aneg, +- .config_intr = aqr_config_intr, +- .handle_interrupt = aqr_handle_interrupt, +- .read_status = aqr107_read_status, +- .get_tunable = aqr107_get_tunable, +- .set_tunable = aqr107_set_tunable, +- .suspend = aqr107_suspend, +- .resume = aqr107_resume, +- .get_sset_count = aqr107_get_sset_count, +- .get_strings = aqr107_get_strings, +- .get_stats = aqr107_get_stats, +- .link_change_notify = aqr107_link_change_notify, +-}, +-{ +- PHY_ID_MATCH_MODEL(PHY_ID_AQCS109), +- .name = "Aquantia AQCS109", +- .probe = aqr107_probe, +- .get_rate_matching = aqr107_get_rate_matching, +- .config_init = aqcs109_config_init, +- .config_aneg = aqr_config_aneg, +- .config_intr = aqr_config_intr, +- .handle_interrupt = aqr_handle_interrupt, +- .read_status = aqr107_read_status, +- .get_tunable = aqr107_get_tunable, +- .set_tunable = aqr107_set_tunable, +- .suspend = aqr107_suspend, +- .resume = aqr107_resume, +- .get_sset_count = aqr107_get_sset_count, +- .get_strings = aqr107_get_strings, +- .get_stats = aqr107_get_stats, +- .link_change_notify = aqr107_link_change_notify, +-}, +-{ +- PHY_ID_MATCH_MODEL(PHY_ID_AQR405), +- .name = "Aquantia AQR405", +- .config_aneg = aqr_config_aneg, +- .config_intr = aqr_config_intr, +- .handle_interrupt = aqr_handle_interrupt, +- .read_status = aqr_read_status, +-}, +-{ +- PHY_ID_MATCH_MODEL(PHY_ID_AQR113C), +- .name = "Aquantia AQR113C", +- .probe = aqr107_probe, +- .get_rate_matching = aqr107_get_rate_matching, +- .config_init = aqr107_config_init, +- .config_aneg = aqr_config_aneg, +- .config_intr = aqr_config_intr, +- .handle_interrupt = aqr_handle_interrupt, +- .read_status = aqr107_read_status, +- .get_tunable = aqr107_get_tunable, +- .set_tunable = aqr107_set_tunable, +- .suspend = aqr107_suspend, +- .resume = aqr107_resume, +- .get_sset_count = aqr107_get_sset_count, +- .get_strings = aqr107_get_strings, +- .get_stats = aqr107_get_stats, +- .link_change_notify = aqr107_link_change_notify, +-}, +-}; +- +-module_phy_driver(aqr_driver); +- +-static struct mdio_device_id __maybe_unused aqr_tbl[] = { +- { PHY_ID_MATCH_MODEL(PHY_ID_AQ1202) }, +- { PHY_ID_MATCH_MODEL(PHY_ID_AQ2104) }, +- { PHY_ID_MATCH_MODEL(PHY_ID_AQR105) }, +- { PHY_ID_MATCH_MODEL(PHY_ID_AQR106) }, +- { PHY_ID_MATCH_MODEL(PHY_ID_AQR107) }, +- { PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) }, +- { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) }, +- { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) }, +- { } +-}; +- +-MODULE_DEVICE_TABLE(mdio, aqr_tbl); +- +-MODULE_DESCRIPTION("Aquantia PHY driver"); +-MODULE_AUTHOR("Shaohui Xie "); +-MODULE_LICENSE("GPL v2"); diff --git a/target/linux/generic/backport-6.1/702-02-v6.7-net-phy-aquantia-move-MMD_VEND-define-to-header.patch b/target/linux/generic/backport-6.1/702-02-v6.7-net-phy-aquantia-move-MMD_VEND-define-to-header.patch new file mode 100644 index 00000000000..2b945227237 --- /dev/null +++ b/target/linux/generic/backport-6.1/702-02-v6.7-net-phy-aquantia-move-MMD_VEND-define-to-header.patch @@ -0,0 +1,183 @@ +From e1fbfa4a995d42e02e22b0dff2f8b4fdee1504b3 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 14 Nov 2023 15:08:42 +0100 +Subject: [PATCH 2/3] net: phy: aquantia: move MMD_VEND define to header + +Move MMD_VEND define to header to clean things up and in preparation for +firmware loading support that require some define placed in +aquantia_main. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/net/phy/aquantia/aquantia.h | 69 +++++++++++++++++++++++ + drivers/net/phy/aquantia/aquantia_hwmon.c | 14 ----- + drivers/net/phy/aquantia/aquantia_main.c | 55 ------------------ + 3 files changed, 69 insertions(+), 69 deletions(-) + +--- a/drivers/net/phy/aquantia/aquantia.h ++++ b/drivers/net/phy/aquantia/aquantia.h +@@ -9,6 +9,75 @@ + #include + #include + ++/* Vendor specific 1, MDIO_MMD_VEND1 */ ++#define VEND1_GLOBAL_FW_ID 0x0020 ++#define VEND1_GLOBAL_FW_ID_MAJOR GENMASK(15, 8) ++#define VEND1_GLOBAL_FW_ID_MINOR GENMASK(7, 0) ++ ++/* The following registers all have similar layouts; first the registers... */ ++#define VEND1_GLOBAL_CFG_10M 0x0310 ++#define VEND1_GLOBAL_CFG_100M 0x031b ++#define VEND1_GLOBAL_CFG_1G 0x031c ++#define VEND1_GLOBAL_CFG_2_5G 0x031d ++#define VEND1_GLOBAL_CFG_5G 0x031e ++#define VEND1_GLOBAL_CFG_10G 0x031f ++/* ...and now the fields */ ++#define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7) ++#define VEND1_GLOBAL_CFG_RATE_ADAPT_NONE 0 ++#define VEND1_GLOBAL_CFG_RATE_ADAPT_USX 1 ++#define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2 ++ ++/* Vendor specific 1, MDIO_MMD_VEND2 */ ++#define VEND1_THERMAL_PROV_HIGH_TEMP_FAIL 0xc421 ++#define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422 ++#define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423 ++#define VEND1_THERMAL_PROV_LOW_TEMP_WARN 0xc424 ++#define VEND1_THERMAL_STAT1 0xc820 ++#define VEND1_THERMAL_STAT2 0xc821 ++#define VEND1_THERMAL_STAT2_VALID BIT(0) ++#define VEND1_GENERAL_STAT1 0xc830 ++#define VEND1_GENERAL_STAT1_HIGH_TEMP_FAIL BIT(14) ++#define VEND1_GENERAL_STAT1_LOW_TEMP_FAIL BIT(13) ++#define VEND1_GENERAL_STAT1_HIGH_TEMP_WARN BIT(12) ++#define VEND1_GENERAL_STAT1_LOW_TEMP_WARN BIT(11) ++ ++#define VEND1_GLOBAL_GEN_STAT2 0xc831 ++#define VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG BIT(15) ++ ++#define VEND1_GLOBAL_RSVD_STAT1 0xc885 ++#define VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID GENMASK(7, 4) ++#define VEND1_GLOBAL_RSVD_STAT1_PROV_ID GENMASK(3, 0) ++ ++#define VEND1_GLOBAL_RSVD_STAT9 0xc88d ++#define VEND1_GLOBAL_RSVD_STAT9_MODE GENMASK(7, 0) ++#define VEND1_GLOBAL_RSVD_STAT9_1000BT2 0x23 ++ ++#define VEND1_GLOBAL_INT_STD_STATUS 0xfc00 ++#define VEND1_GLOBAL_INT_VEND_STATUS 0xfc01 ++ ++#define VEND1_GLOBAL_INT_STD_MASK 0xff00 ++#define VEND1_GLOBAL_INT_STD_MASK_PMA1 BIT(15) ++#define VEND1_GLOBAL_INT_STD_MASK_PMA2 BIT(14) ++#define VEND1_GLOBAL_INT_STD_MASK_PCS1 BIT(13) ++#define VEND1_GLOBAL_INT_STD_MASK_PCS2 BIT(12) ++#define VEND1_GLOBAL_INT_STD_MASK_PCS3 BIT(11) ++#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS1 BIT(10) ++#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS2 BIT(9) ++#define VEND1_GLOBAL_INT_STD_MASK_AN1 BIT(8) ++#define VEND1_GLOBAL_INT_STD_MASK_AN2 BIT(7) ++#define VEND1_GLOBAL_INT_STD_MASK_GBE BIT(6) ++#define VEND1_GLOBAL_INT_STD_MASK_ALL BIT(0) ++ ++#define VEND1_GLOBAL_INT_VEND_MASK 0xff01 ++#define VEND1_GLOBAL_INT_VEND_MASK_PMA BIT(15) ++#define VEND1_GLOBAL_INT_VEND_MASK_PCS BIT(14) ++#define VEND1_GLOBAL_INT_VEND_MASK_PHY_XS BIT(13) ++#define VEND1_GLOBAL_INT_VEND_MASK_AN BIT(12) ++#define VEND1_GLOBAL_INT_VEND_MASK_GBE BIT(11) ++#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL1 BIT(2) ++#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2 BIT(1) ++#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 BIT(0) ++ + #if IS_REACHABLE(CONFIG_HWMON) + int aqr_hwmon_probe(struct phy_device *phydev); + #else +--- a/drivers/net/phy/aquantia/aquantia_hwmon.c ++++ b/drivers/net/phy/aquantia/aquantia_hwmon.c +@@ -13,20 +13,6 @@ + + #include "aquantia.h" + +-/* Vendor specific 1, MDIO_MMD_VEND2 */ +-#define VEND1_THERMAL_PROV_HIGH_TEMP_FAIL 0xc421 +-#define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422 +-#define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423 +-#define VEND1_THERMAL_PROV_LOW_TEMP_WARN 0xc424 +-#define VEND1_THERMAL_STAT1 0xc820 +-#define VEND1_THERMAL_STAT2 0xc821 +-#define VEND1_THERMAL_STAT2_VALID BIT(0) +-#define VEND1_GENERAL_STAT1 0xc830 +-#define VEND1_GENERAL_STAT1_HIGH_TEMP_FAIL BIT(14) +-#define VEND1_GENERAL_STAT1_LOW_TEMP_FAIL BIT(13) +-#define VEND1_GENERAL_STAT1_HIGH_TEMP_WARN BIT(12) +-#define VEND1_GENERAL_STAT1_LOW_TEMP_WARN BIT(11) +- + #if IS_REACHABLE(CONFIG_HWMON) + + static umode_t aqr_hwmon_is_visible(const void *data, +--- a/drivers/net/phy/aquantia/aquantia_main.c ++++ b/drivers/net/phy/aquantia/aquantia_main.c +@@ -89,61 +89,6 @@ + #define MDIO_C22EXT_STAT_SGMII_TX_FRAME_ALIGN_ERR 0xd31a + #define MDIO_C22EXT_STAT_SGMII_TX_RUNT_FRAMES 0xd31b + +-/* Vendor specific 1, MDIO_MMD_VEND1 */ +-#define VEND1_GLOBAL_FW_ID 0x0020 +-#define VEND1_GLOBAL_FW_ID_MAJOR GENMASK(15, 8) +-#define VEND1_GLOBAL_FW_ID_MINOR GENMASK(7, 0) +- +-#define VEND1_GLOBAL_GEN_STAT2 0xc831 +-#define VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG BIT(15) +- +-/* The following registers all have similar layouts; first the registers... */ +-#define VEND1_GLOBAL_CFG_10M 0x0310 +-#define VEND1_GLOBAL_CFG_100M 0x031b +-#define VEND1_GLOBAL_CFG_1G 0x031c +-#define VEND1_GLOBAL_CFG_2_5G 0x031d +-#define VEND1_GLOBAL_CFG_5G 0x031e +-#define VEND1_GLOBAL_CFG_10G 0x031f +-/* ...and now the fields */ +-#define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7) +-#define VEND1_GLOBAL_CFG_RATE_ADAPT_NONE 0 +-#define VEND1_GLOBAL_CFG_RATE_ADAPT_USX 1 +-#define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2 +- +-#define VEND1_GLOBAL_RSVD_STAT1 0xc885 +-#define VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID GENMASK(7, 4) +-#define VEND1_GLOBAL_RSVD_STAT1_PROV_ID GENMASK(3, 0) +- +-#define VEND1_GLOBAL_RSVD_STAT9 0xc88d +-#define VEND1_GLOBAL_RSVD_STAT9_MODE GENMASK(7, 0) +-#define VEND1_GLOBAL_RSVD_STAT9_1000BT2 0x23 +- +-#define VEND1_GLOBAL_INT_STD_STATUS 0xfc00 +-#define VEND1_GLOBAL_INT_VEND_STATUS 0xfc01 +- +-#define VEND1_GLOBAL_INT_STD_MASK 0xff00 +-#define VEND1_GLOBAL_INT_STD_MASK_PMA1 BIT(15) +-#define VEND1_GLOBAL_INT_STD_MASK_PMA2 BIT(14) +-#define VEND1_GLOBAL_INT_STD_MASK_PCS1 BIT(13) +-#define VEND1_GLOBAL_INT_STD_MASK_PCS2 BIT(12) +-#define VEND1_GLOBAL_INT_STD_MASK_PCS3 BIT(11) +-#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS1 BIT(10) +-#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS2 BIT(9) +-#define VEND1_GLOBAL_INT_STD_MASK_AN1 BIT(8) +-#define VEND1_GLOBAL_INT_STD_MASK_AN2 BIT(7) +-#define VEND1_GLOBAL_INT_STD_MASK_GBE BIT(6) +-#define VEND1_GLOBAL_INT_STD_MASK_ALL BIT(0) +- +-#define VEND1_GLOBAL_INT_VEND_MASK 0xff01 +-#define VEND1_GLOBAL_INT_VEND_MASK_PMA BIT(15) +-#define VEND1_GLOBAL_INT_VEND_MASK_PCS BIT(14) +-#define VEND1_GLOBAL_INT_VEND_MASK_PHY_XS BIT(13) +-#define VEND1_GLOBAL_INT_VEND_MASK_AN BIT(12) +-#define VEND1_GLOBAL_INT_VEND_MASK_GBE BIT(11) +-#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL1 BIT(2) +-#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2 BIT(1) +-#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 BIT(0) +- + /* Sleep and timeout for checking if the Processor-Intensive + * MDIO operation is finished + */ diff --git a/target/linux/generic/backport-6.1/702-03-v6.7-net-phy-aquantia-add-firmware-load-support.patch b/target/linux/generic/backport-6.1/702-03-v6.7-net-phy-aquantia-add-firmware-load-support.patch new file mode 100644 index 00000000000..aa52b3baa64 --- /dev/null +++ b/target/linux/generic/backport-6.1/702-03-v6.7-net-phy-aquantia-add-firmware-load-support.patch @@ -0,0 +1,504 @@ +From e93984ebc1c82bd34f7a1b3391efaceee0a8ae96 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 14 Nov 2023 15:08:43 +0100 +Subject: [PATCH 3/3] net: phy: aquantia: add firmware load support + +Aquantia PHY-s require firmware to be loaded before they start operating. +It can be automatically loaded in case when there is a SPI-NOR connected +to Aquantia PHY-s or can be loaded from the host via MDIO. + +This patch adds support for loading the firmware via MDIO as in most cases +there is no SPI-NOR being used to save on cost. +Firmware loading code itself is ported from mainline U-boot with cleanups. + +The firmware has mixed values both in big and little endian. +PHY core itself is big-endian but it expects values to be in little-endian. +The firmware is little-endian but CRC-16 value for it is stored at the end +of firmware in big-endian. + +It seems the PHY does the conversion internally from firmware that is +little-endian to the PHY that is big-endian on using the mailbox +but mailbox returns a big-endian CRC-16 to verify the written data +integrity. + +Co-developed-by: Christian Marangi +Signed-off-by: Robert Marko +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/net/phy/aquantia/Kconfig | 1 + + drivers/net/phy/aquantia/Makefile | 2 +- + drivers/net/phy/aquantia/aquantia.h | 32 ++ + drivers/net/phy/aquantia/aquantia_firmware.c | 370 +++++++++++++++++++ + drivers/net/phy/aquantia/aquantia_main.c | 6 + + 5 files changed, 410 insertions(+), 1 deletion(-) + create mode 100644 drivers/net/phy/aquantia/aquantia_firmware.c + +--- a/drivers/net/phy/aquantia/Kconfig ++++ b/drivers/net/phy/aquantia/Kconfig +@@ -1,5 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0-only + config AQUANTIA_PHY + tristate "Aquantia PHYs" ++ select CRC_CCITT + help + Currently supports the Aquantia AQ1202, AQ2104, AQR105, AQR405 +--- a/drivers/net/phy/aquantia/Makefile ++++ b/drivers/net/phy/aquantia/Makefile +@@ -1,5 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 +-aquantia-objs += aquantia_main.o ++aquantia-objs += aquantia_main.o aquantia_firmware.o + ifdef CONFIG_HWMON + aquantia-objs += aquantia_hwmon.o + endif +--- a/drivers/net/phy/aquantia/aquantia.h ++++ b/drivers/net/phy/aquantia/aquantia.h +@@ -10,10 +10,35 @@ + #include + + /* Vendor specific 1, MDIO_MMD_VEND1 */ ++#define VEND1_GLOBAL_SC 0x0 ++#define VEND1_GLOBAL_SC_SOFT_RESET BIT(15) ++#define VEND1_GLOBAL_SC_LOW_POWER BIT(11) ++ + #define VEND1_GLOBAL_FW_ID 0x0020 + #define VEND1_GLOBAL_FW_ID_MAJOR GENMASK(15, 8) + #define VEND1_GLOBAL_FW_ID_MINOR GENMASK(7, 0) + ++#define VEND1_GLOBAL_MAILBOX_INTERFACE1 0x0200 ++#define VEND1_GLOBAL_MAILBOX_INTERFACE1_EXECUTE BIT(15) ++#define VEND1_GLOBAL_MAILBOX_INTERFACE1_WRITE BIT(14) ++#define VEND1_GLOBAL_MAILBOX_INTERFACE1_CRC_RESET BIT(12) ++#define VEND1_GLOBAL_MAILBOX_INTERFACE1_BUSY BIT(8) ++ ++#define VEND1_GLOBAL_MAILBOX_INTERFACE2 0x0201 ++#define VEND1_GLOBAL_MAILBOX_INTERFACE3 0x0202 ++#define VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR_MASK GENMASK(15, 0) ++#define VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR_MASK, (u16)((x) >> 16)) ++#define VEND1_GLOBAL_MAILBOX_INTERFACE4 0x0203 ++#define VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_MASK GENMASK(15, 2) ++#define VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_MASK, (u16)(x)) ++ ++#define VEND1_GLOBAL_MAILBOX_INTERFACE5 0x0204 ++#define VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA_MASK GENMASK(15, 0) ++#define VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA_MASK, (u16)((x) >> 16)) ++#define VEND1_GLOBAL_MAILBOX_INTERFACE6 0x0205 ++#define VEND1_GLOBAL_MAILBOX_INTERFACE6_LSW_DATA_MASK GENMASK(15, 0) ++#define VEND1_GLOBAL_MAILBOX_INTERFACE6_LSW_DATA(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE6_LSW_DATA_MASK, (u16)(x)) ++ + /* The following registers all have similar layouts; first the registers... */ + #define VEND1_GLOBAL_CFG_10M 0x0310 + #define VEND1_GLOBAL_CFG_100M 0x031b +@@ -28,6 +53,11 @@ + #define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2 + + /* Vendor specific 1, MDIO_MMD_VEND2 */ ++#define VEND1_GLOBAL_CONTROL2 0xc001 ++#define VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_RST BIT(15) ++#define VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_OVD BIT(6) ++#define VEND1_GLOBAL_CONTROL2_UP_RUN_STALL BIT(0) ++ + #define VEND1_THERMAL_PROV_HIGH_TEMP_FAIL 0xc421 + #define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422 + #define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423 +@@ -83,3 +113,5 @@ int aqr_hwmon_probe(struct phy_device *p + #else + static inline int aqr_hwmon_probe(struct phy_device *phydev) { return 0; } + #endif ++ ++int aqr_firmware_load(struct phy_device *phydev); +--- /dev/null ++++ b/drivers/net/phy/aquantia/aquantia_firmware.c +@@ -0,0 +1,370 @@ ++// SPDX-License-Identifier: GPL-2.0 ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "aquantia.h" ++ ++#define UP_RESET_SLEEP 100 ++ ++/* addresses of memory segments in the phy */ ++#define DRAM_BASE_ADDR 0x3FFE0000 ++#define IRAM_BASE_ADDR 0x40000000 ++ ++/* firmware image format constants */ ++#define VERSION_STRING_SIZE 0x40 ++#define VERSION_STRING_OFFSET 0x0200 ++/* primary offset is written at an offset from the start of the fw blob */ ++#define PRIMARY_OFFSET_OFFSET 0x8 ++/* primary offset needs to be then added to a base offset */ ++#define PRIMARY_OFFSET_SHIFT 12 ++#define PRIMARY_OFFSET(x) ((x) << PRIMARY_OFFSET_SHIFT) ++#define HEADER_OFFSET 0x300 ++ ++struct aqr_fw_header { ++ u32 padding; ++ u8 iram_offset[3]; ++ u8 iram_size[3]; ++ u8 dram_offset[3]; ++ u8 dram_size[3]; ++} __packed; ++ ++enum aqr_fw_src { ++ AQR_FW_SRC_NVMEM = 0, ++ AQR_FW_SRC_FS, ++}; ++ ++static const char * const aqr_fw_src_string[] = { ++ [AQR_FW_SRC_NVMEM] = "NVMEM", ++ [AQR_FW_SRC_FS] = "FS", ++}; ++ ++/* AQR firmware doesn't have fixed offsets for iram and dram section ++ * but instead provide an header with the offset to use on reading ++ * and parsing the firmware. ++ * ++ * AQR firmware can't be trusted and each offset is validated to be ++ * not negative and be in the size of the firmware itself. ++ */ ++static bool aqr_fw_validate_get(size_t size, size_t offset, size_t get_size) ++{ ++ return offset + get_size <= size; ++} ++ ++static int aqr_fw_get_be16(const u8 *data, size_t offset, size_t size, u16 *value) ++{ ++ if (!aqr_fw_validate_get(size, offset, sizeof(u16))) ++ return -EINVAL; ++ ++ *value = get_unaligned_be16(data + offset); ++ ++ return 0; ++} ++ ++static int aqr_fw_get_le16(const u8 *data, size_t offset, size_t size, u16 *value) ++{ ++ if (!aqr_fw_validate_get(size, offset, sizeof(u16))) ++ return -EINVAL; ++ ++ *value = get_unaligned_le16(data + offset); ++ ++ return 0; ++} ++ ++static int aqr_fw_get_le24(const u8 *data, size_t offset, size_t size, u32 *value) ++{ ++ if (!aqr_fw_validate_get(size, offset, sizeof(u8) * 3)) ++ return -EINVAL; ++ ++ *value = get_unaligned_le24(data + offset); ++ ++ return 0; ++} ++ ++/* load data into the phy's memory */ ++static int aqr_fw_load_memory(struct phy_device *phydev, u32 addr, ++ const u8 *data, size_t len) ++{ ++ u16 crc = 0, up_crc; ++ size_t pos; ++ ++ /* PHY expect addr in LE */ ++ addr = (__force u32)cpu_to_le32(addr); ++ ++ phy_write_mmd(phydev, MDIO_MMD_VEND1, ++ VEND1_GLOBAL_MAILBOX_INTERFACE1, ++ VEND1_GLOBAL_MAILBOX_INTERFACE1_CRC_RESET); ++ phy_write_mmd(phydev, MDIO_MMD_VEND1, ++ VEND1_GLOBAL_MAILBOX_INTERFACE3, ++ VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR(addr)); ++ phy_write_mmd(phydev, MDIO_MMD_VEND1, ++ VEND1_GLOBAL_MAILBOX_INTERFACE4, ++ VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR(addr)); ++ ++ /* We assume and enforce the size to be word aligned. ++ * If a firmware that is not word aligned is found, please report upstream. ++ */ ++ for (pos = 0; pos < len; pos += sizeof(u32)) { ++ u32 word; ++ ++ /* FW data is always stored in little-endian */ ++ word = get_unaligned((const u32 *)(data + pos)); ++ ++ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_MAILBOX_INTERFACE5, ++ VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA(word)); ++ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_MAILBOX_INTERFACE6, ++ VEND1_GLOBAL_MAILBOX_INTERFACE6_LSW_DATA(word)); ++ ++ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_MAILBOX_INTERFACE1, ++ VEND1_GLOBAL_MAILBOX_INTERFACE1_EXECUTE | ++ VEND1_GLOBAL_MAILBOX_INTERFACE1_WRITE); ++ ++ /* calculate CRC as we load data to the mailbox. ++ * We convert word to big-endian as PHY is BE and mailbox will ++ * return a BE CRC. ++ */ ++ word = (__force u32)cpu_to_be32(word); ++ crc = crc_ccitt_false(crc, (u8 *)&word, sizeof(word)); ++ } ++ ++ up_crc = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_MAILBOX_INTERFACE2); ++ if (crc != up_crc) { ++ phydev_err(phydev, "CRC mismatch: calculated 0x%04x PHY 0x%04x\n", ++ crc, up_crc); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int aqr_fw_boot(struct phy_device *phydev, const u8 *data, size_t size, ++ enum aqr_fw_src fw_src) ++{ ++ u16 calculated_crc, read_crc, read_primary_offset; ++ u32 iram_offset = 0, iram_size = 0; ++ u32 dram_offset = 0, dram_size = 0; ++ char version[VERSION_STRING_SIZE]; ++ u32 primary_offset = 0; ++ int ret; ++ ++ /* extract saved CRC at the end of the fw ++ * CRC is saved in big-endian as PHY is BE ++ */ ++ ret = aqr_fw_get_be16(data, size - sizeof(u16), size, &read_crc); ++ if (ret) { ++ phydev_err(phydev, "bad firmware CRC in firmware\n"); ++ return ret; ++ } ++ calculated_crc = crc_ccitt_false(0, data, size - sizeof(u16)); ++ if (read_crc != calculated_crc) { ++ phydev_err(phydev, "bad firmware CRC: file 0x%04x calculated 0x%04x\n", ++ read_crc, calculated_crc); ++ return -EINVAL; ++ } ++ ++ /* Get the primary offset to extract DRAM and IRAM sections. */ ++ ret = aqr_fw_get_le16(data, PRIMARY_OFFSET_OFFSET, size, &read_primary_offset); ++ if (ret) { ++ phydev_err(phydev, "bad primary offset in firmware\n"); ++ return ret; ++ } ++ primary_offset = PRIMARY_OFFSET(read_primary_offset); ++ ++ /* Find the DRAM and IRAM sections within the firmware file. ++ * Make sure the fw_header is correctly in the firmware. ++ */ ++ if (!aqr_fw_validate_get(size, primary_offset + HEADER_OFFSET, ++ sizeof(struct aqr_fw_header))) { ++ phydev_err(phydev, "bad fw_header in firmware\n"); ++ return -EINVAL; ++ } ++ ++ /* offset are in LE and values needs to be converted to cpu endian */ ++ ret = aqr_fw_get_le24(data, primary_offset + HEADER_OFFSET + ++ offsetof(struct aqr_fw_header, iram_offset), ++ size, &iram_offset); ++ if (ret) { ++ phydev_err(phydev, "bad iram offset in firmware\n"); ++ return ret; ++ } ++ ret = aqr_fw_get_le24(data, primary_offset + HEADER_OFFSET + ++ offsetof(struct aqr_fw_header, iram_size), ++ size, &iram_size); ++ if (ret) { ++ phydev_err(phydev, "invalid iram size in firmware\n"); ++ return ret; ++ } ++ ret = aqr_fw_get_le24(data, primary_offset + HEADER_OFFSET + ++ offsetof(struct aqr_fw_header, dram_offset), ++ size, &dram_offset); ++ if (ret) { ++ phydev_err(phydev, "bad dram offset in firmware\n"); ++ return ret; ++ } ++ ret = aqr_fw_get_le24(data, primary_offset + HEADER_OFFSET + ++ offsetof(struct aqr_fw_header, dram_size), ++ size, &dram_size); ++ if (ret) { ++ phydev_err(phydev, "invalid dram size in firmware\n"); ++ return ret; ++ } ++ ++ /* Increment the offset with the primary offset. ++ * Validate iram/dram offset and size. ++ */ ++ iram_offset += primary_offset; ++ if (iram_size % sizeof(u32)) { ++ phydev_err(phydev, "iram size if not aligned to word size. Please report this upstream!\n"); ++ return -EINVAL; ++ } ++ if (!aqr_fw_validate_get(size, iram_offset, iram_size)) { ++ phydev_err(phydev, "invalid iram offset for iram size\n"); ++ return -EINVAL; ++ } ++ ++ dram_offset += primary_offset; ++ if (dram_size % sizeof(u32)) { ++ phydev_err(phydev, "dram size if not aligned to word size. Please report this upstream!\n"); ++ return -EINVAL; ++ } ++ if (!aqr_fw_validate_get(size, dram_offset, dram_size)) { ++ phydev_err(phydev, "invalid iram offset for iram size\n"); ++ return -EINVAL; ++ } ++ ++ phydev_dbg(phydev, "primary %d IRAM offset=%d size=%d DRAM offset=%d size=%d\n", ++ primary_offset, iram_offset, iram_size, dram_offset, dram_size); ++ ++ if (!aqr_fw_validate_get(size, dram_offset + VERSION_STRING_OFFSET, ++ VERSION_STRING_SIZE)) { ++ phydev_err(phydev, "invalid version in firmware\n"); ++ return -EINVAL; ++ } ++ strscpy(version, (char *)data + dram_offset + VERSION_STRING_OFFSET, ++ VERSION_STRING_SIZE); ++ if (version[0] == '\0') { ++ phydev_err(phydev, "invalid version in firmware\n"); ++ return -EINVAL; ++ } ++ phydev_info(phydev, "loading firmware version '%s' from '%s'\n", version, ++ aqr_fw_src_string[fw_src]); ++ ++ /* stall the microcprocessor */ ++ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_CONTROL2, ++ VEND1_GLOBAL_CONTROL2_UP_RUN_STALL | VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_OVD); ++ ++ phydev_dbg(phydev, "loading DRAM 0x%08x from offset=%d size=%d\n", ++ DRAM_BASE_ADDR, dram_offset, dram_size); ++ ret = aqr_fw_load_memory(phydev, DRAM_BASE_ADDR, data + dram_offset, ++ dram_size); ++ if (ret) ++ return ret; ++ ++ phydev_dbg(phydev, "loading IRAM 0x%08x from offset=%d size=%d\n", ++ IRAM_BASE_ADDR, iram_offset, iram_size); ++ ret = aqr_fw_load_memory(phydev, IRAM_BASE_ADDR, data + iram_offset, ++ iram_size); ++ if (ret) ++ return ret; ++ ++ /* make sure soft reset and low power mode are clear */ ++ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_SC, ++ VEND1_GLOBAL_SC_SOFT_RESET | VEND1_GLOBAL_SC_LOW_POWER); ++ ++ /* Release the microprocessor. UP_RESET must be held for 100 usec. */ ++ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_CONTROL2, ++ VEND1_GLOBAL_CONTROL2_UP_RUN_STALL | ++ VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_OVD | ++ VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_RST); ++ usleep_range(UP_RESET_SLEEP, UP_RESET_SLEEP * 2); ++ ++ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_CONTROL2, ++ VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_OVD); ++ ++ return 0; ++} ++ ++static int aqr_firmware_load_nvmem(struct phy_device *phydev) ++{ ++ struct nvmem_cell *cell; ++ size_t size; ++ u8 *buf; ++ int ret; ++ ++ cell = nvmem_cell_get(&phydev->mdio.dev, "firmware"); ++ if (IS_ERR(cell)) ++ return PTR_ERR(cell); ++ ++ buf = nvmem_cell_read(cell, &size); ++ if (IS_ERR(buf)) { ++ ret = PTR_ERR(buf); ++ goto exit; ++ } ++ ++ ret = aqr_fw_boot(phydev, buf, size, AQR_FW_SRC_NVMEM); ++ if (ret) ++ phydev_err(phydev, "firmware loading failed: %d\n", ret); ++ ++ kfree(buf); ++exit: ++ nvmem_cell_put(cell); ++ ++ return ret; ++} ++ ++static int aqr_firmware_load_fs(struct phy_device *phydev) ++{ ++ struct device *dev = &phydev->mdio.dev; ++ const struct firmware *fw; ++ const char *fw_name; ++ int ret; ++ ++ ret = of_property_read_string(dev->of_node, "firmware-name", ++ &fw_name); ++ if (ret) ++ return ret; ++ ++ ret = request_firmware(&fw, fw_name, dev); ++ if (ret) { ++ phydev_err(phydev, "failed to find FW file %s (%d)\n", ++ fw_name, ret); ++ return ret; ++ } ++ ++ ret = aqr_fw_boot(phydev, fw->data, fw->size, AQR_FW_SRC_FS); ++ if (ret) ++ phydev_err(phydev, "firmware loading failed: %d\n", ret); ++ ++ release_firmware(fw); ++ ++ return ret; ++} ++ ++int aqr_firmware_load(struct phy_device *phydev) ++{ ++ int ret; ++ ++ /* Check if the firmware is not already loaded by pooling ++ * the current version returned by the PHY. If 0 is returned, ++ * no firmware is loaded. ++ */ ++ ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); ++ if (ret > 0) ++ goto exit; ++ ++ ret = aqr_firmware_load_nvmem(phydev); ++ if (!ret) ++ goto exit; ++ ++ ret = aqr_firmware_load_fs(phydev); ++ if (ret) ++ return ret; ++ ++exit: ++ return 0; ++} +--- a/drivers/net/phy/aquantia/aquantia_main.c ++++ b/drivers/net/phy/aquantia/aquantia_main.c +@@ -656,11 +656,17 @@ static int aqr107_resume(struct phy_devi + + static int aqr107_probe(struct phy_device *phydev) + { ++ int ret; ++ + phydev->priv = devm_kzalloc(&phydev->mdio.dev, + sizeof(struct aqr107_priv), GFP_KERNEL); + if (!phydev->priv) + return -ENOMEM; + ++ ret = aqr_firmware_load(phydev); ++ if (ret) ++ return ret; ++ + return aqr_hwmon_probe(phydev); + } + diff --git a/target/linux/generic/backport-6.1/791-v6.2-01-net-phy-Add-driver-for-Motorcomm-yt8521-gigabit-ethernet.patch b/target/linux/generic/backport-6.1/791-v6.2-01-net-phy-Add-driver-for-Motorcomm-yt8521-gigabit-ethernet.patch index ddb32385e4e..06dddffcaa5 100644 --- a/target/linux/generic/backport-6.1/791-v6.2-01-net-phy-Add-driver-for-Motorcomm-yt8521-gigabit-ethernet.patch +++ b/target/linux/generic/backport-6.1/791-v6.2-01-net-phy-Add-driver-for-Motorcomm-yt8521-gigabit-ethernet.patch @@ -31,7 +31,7 @@ Signed-off-by: David S. Miller F: drivers/net/phy/motorcomm.c --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -260,7 +260,7 @@ config MOTORCOMM_PHY +@@ -257,7 +257,7 @@ config MOTORCOMM_PHY tristate "Motorcomm PHYs" help Enables support for Motorcomm network PHYs. diff --git a/target/linux/generic/backport-6.1/791-v6.2-03-net-phy-add-Motorcomm-YT8531S-phy-id.patch b/target/linux/generic/backport-6.1/791-v6.2-03-net-phy-add-Motorcomm-YT8531S-phy-id.patch index a2f22ee99b6..d22cc69425d 100644 --- a/target/linux/generic/backport-6.1/791-v6.2-03-net-phy-add-Motorcomm-YT8531S-phy-id.patch +++ b/target/linux/generic/backport-6.1/791-v6.2-03-net-phy-add-Motorcomm-YT8531S-phy-id.patch @@ -22,7 +22,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -260,7 +260,7 @@ config MOTORCOMM_PHY +@@ -257,7 +257,7 @@ config MOTORCOMM_PHY tristate "Motorcomm PHYs" help Enables support for Motorcomm network PHYs. diff --git a/target/linux/generic/backport-6.1/791-v6.3-09-net-phy-Add-driver-for-Motorcomm-yt8531-gigabit-ethernet.patch b/target/linux/generic/backport-6.1/791-v6.3-09-net-phy-Add-driver-for-Motorcomm-yt8531-gigabit-ethernet.patch index 35495978efa..60eea4fa477 100644 --- a/target/linux/generic/backport-6.1/791-v6.3-09-net-phy-Add-driver-for-Motorcomm-yt8531-gigabit-ethernet.patch +++ b/target/linux/generic/backport-6.1/791-v6.3-09-net-phy-Add-driver-for-Motorcomm-yt8531-gigabit-ethernet.patch @@ -19,7 +19,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -260,7 +260,7 @@ config MOTORCOMM_PHY +@@ -257,7 +257,7 @@ config MOTORCOMM_PHY tristate "Motorcomm PHYs" help Enables support for Motorcomm network PHYs. diff --git a/target/linux/generic/backport-6.1/815-v6.6-1-leds-turris-omnia-Use-sysfs_emit-instead-of-sprintf.patch b/target/linux/generic/backport-6.1/815-v6.6-1-leds-turris-omnia-Use-sysfs_emit-instead-of-sprintf.patch index 2ade1025ea2..e17be439b24 100644 --- a/target/linux/generic/backport-6.1/815-v6.6-1-leds-turris-omnia-Use-sysfs_emit-instead-of-sprintf.patch +++ b/target/linux/generic/backport-6.1/815-v6.6-1-leds-turris-omnia-Use-sysfs_emit-instead-of-sprintf.patch @@ -18,7 +18,7 @@ Signed-off-by: Lee Jones --- a/drivers/leds/leds-turris-omnia.c +++ b/drivers/leds/leds-turris-omnia.c -@@ -166,7 +166,7 @@ static ssize_t brightness_show(struct de +@@ -194,7 +194,7 @@ static ssize_t brightness_show(struct de if (ret < 0) return ret; diff --git a/target/linux/generic/backport-6.1/815-v6.6-2-leds-turris-omnia-Drop-unnecessary-mutex-locking.patch b/target/linux/generic/backport-6.1/815-v6.6-2-leds-turris-omnia-Drop-unnecessary-mutex-locking.patch deleted file mode 100644 index 74bde4706d1..00000000000 --- a/target/linux/generic/backport-6.1/815-v6.6-2-leds-turris-omnia-Drop-unnecessary-mutex-locking.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 8f3d612a5c949489b2860b74ff34c5914a9216dd Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Beh=C3=BAn?= -Date: Wed, 2 Aug 2023 18:07:43 +0200 -Subject: [PATCH 2/6] leds: turris-omnia: Drop unnecessary mutex locking -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Do not lock driver mutex in the global LED panel brightness sysfs -accessors brightness_show() and brightness_store(). - -The mutex locking is unnecessary here. The I2C transfers are guarded by -I2C core locking mechanism, and the LED commands itself do not interfere -with other commands. - -Fixes: 089381b27abe ("leds: initial support for Turris Omnia LEDs") -Signed-off-by: Marek Behún -Reviewed-by: Lee Jones -Link: https://lore.kernel.org/r/20230802160748.11208-2-kabel@kernel.org -Signed-off-by: Lee Jones ---- - drivers/leds/leds-turris-omnia.c | 11 +---------- - 1 file changed, 1 insertion(+), 10 deletions(-) - ---- a/drivers/leds/leds-turris-omnia.c -+++ b/drivers/leds/leds-turris-omnia.c -@@ -156,12 +156,9 @@ static ssize_t brightness_show(struct de - char *buf) - { - struct i2c_client *client = to_i2c_client(dev); -- struct omnia_leds *leds = i2c_get_clientdata(client); - int ret; - -- mutex_lock(&leds->lock); - ret = i2c_smbus_read_byte_data(client, CMD_LED_GET_BRIGHTNESS); -- mutex_unlock(&leds->lock); - - if (ret < 0) - return ret; -@@ -173,7 +170,6 @@ static ssize_t brightness_store(struct d - const char *buf, size_t count) - { - struct i2c_client *client = to_i2c_client(dev); -- struct omnia_leds *leds = i2c_get_clientdata(client); - unsigned long brightness; - int ret; - -@@ -183,15 +179,10 @@ static ssize_t brightness_store(struct d - if (brightness > 100) - return -EINVAL; - -- mutex_lock(&leds->lock); - ret = i2c_smbus_write_byte_data(client, CMD_LED_SET_BRIGHTNESS, - (u8)brightness); -- mutex_unlock(&leds->lock); - -- if (ret < 0) -- return ret; -- -- return count; -+ return ret < 0 ? ret : count; - } - static DEVICE_ATTR_RW(brightness); - diff --git a/target/linux/generic/backport-6.1/815-v6.7-1-leds-turris-omnia-Do-not-use-SMBUS-calls.patch b/target/linux/generic/backport-6.1/815-v6.7-1-leds-turris-omnia-Do-not-use-SMBUS-calls.patch deleted file mode 100644 index 6b3fe0d74d8..00000000000 --- a/target/linux/generic/backport-6.1/815-v6.7-1-leds-turris-omnia-Do-not-use-SMBUS-calls.patch +++ /dev/null @@ -1,145 +0,0 @@ -From 1848bb28f0579582f653ae95355b544fd8a51d1e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Beh=C3=BAn?= -Date: Mon, 18 Sep 2023 18:11:01 +0200 -Subject: [PATCH 3/6] leds: turris-omnia: Do not use SMBUS calls -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The leds-turris-omnia driver uses three function for I2C access: -- i2c_smbus_write_byte_data() and i2c_smbus_read_byte_data(), which - cause an emulated SMBUS transfer, -- i2c_master_send(), which causes an ordinary I2C transfer. - -The Turris Omnia MCU LED controller is not semantically SMBUS, it -operates as a simple I2C bus. It does not implement any of the SMBUS -specific features, like PEC, or procedure calls, or anything. Moreover -the I2C controller driver also does not implement SMBUS, and so the -emulated SMBUS procedure from drivers/i2c/i2c-core-smbus.c is used for -the SMBUS calls, which gives an unnecessary overhead. - -When I first wrote the driver, I was unaware of these facts, and I -simply used the first function that worked. - -Drop the I2C SMBUS calls and instead use simple I2C transfers. - -Fixes: 089381b27abe ("leds: initial support for Turris Omnia LEDs") -Signed-off-by: Marek Behún -Link: https://lore.kernel.org/r/20230918161104.20860-2-kabel@kernel.org -Signed-off-by: Lee Jones ---- - drivers/leds/leds-turris-omnia.c | 54 +++++++++++++++++++++++++------- - 1 file changed, 42 insertions(+), 12 deletions(-) - ---- a/drivers/leds/leds-turris-omnia.c -+++ b/drivers/leds/leds-turris-omnia.c -@@ -2,7 +2,7 @@ - /* - * CZ.NIC's Turris Omnia LEDs driver - * -- * 2020 by Marek Behún -+ * 2020, 2023 by Marek Behún - */ - - #include -@@ -41,6 +41,37 @@ struct omnia_leds { - struct omnia_led leds[]; - }; - -+static int omnia_cmd_write_u8(const struct i2c_client *client, u8 cmd, u8 val) -+{ -+ u8 buf[2] = { cmd, val }; -+ -+ return i2c_master_send(client, buf, sizeof(buf)); -+} -+ -+static int omnia_cmd_read_u8(const struct i2c_client *client, u8 cmd) -+{ -+ struct i2c_msg msgs[2]; -+ u8 reply; -+ int ret; -+ -+ msgs[0].addr = client->addr; -+ msgs[0].flags = 0; -+ msgs[0].len = 1; -+ msgs[0].buf = &cmd; -+ msgs[1].addr = client->addr; -+ msgs[1].flags = I2C_M_RD; -+ msgs[1].len = 1; -+ msgs[1].buf = &reply; -+ -+ ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); -+ if (likely(ret == ARRAY_SIZE(msgs))) -+ return reply; -+ else if (ret < 0) -+ return ret; -+ else -+ return -EIO; -+} -+ - static int omnia_led_brightness_set_blocking(struct led_classdev *cdev, - enum led_brightness brightness) - { -@@ -64,7 +95,7 @@ static int omnia_led_brightness_set_bloc - if (buf[2] || buf[3] || buf[4]) - state |= CMD_LED_STATE_ON; - -- ret = i2c_smbus_write_byte_data(leds->client, CMD_LED_STATE, state); -+ ret = omnia_cmd_write_u8(leds->client, CMD_LED_STATE, state); - if (ret >= 0 && (state & CMD_LED_STATE_ON)) - ret = i2c_master_send(leds->client, buf, 5); - -@@ -114,9 +145,9 @@ static int omnia_led_register(struct i2c - cdev->brightness_set_blocking = omnia_led_brightness_set_blocking; - - /* put the LED into software mode */ -- ret = i2c_smbus_write_byte_data(client, CMD_LED_MODE, -- CMD_LED_MODE_LED(led->reg) | -- CMD_LED_MODE_USER); -+ ret = omnia_cmd_write_u8(client, CMD_LED_MODE, -+ CMD_LED_MODE_LED(led->reg) | -+ CMD_LED_MODE_USER); - if (ret < 0) { - dev_err(dev, "Cannot set LED %pOF to software mode: %i\n", np, - ret); -@@ -124,8 +155,8 @@ static int omnia_led_register(struct i2c - } - - /* disable the LED */ -- ret = i2c_smbus_write_byte_data(client, CMD_LED_STATE, -- CMD_LED_STATE_LED(led->reg)); -+ ret = omnia_cmd_write_u8(client, CMD_LED_STATE, -+ CMD_LED_STATE_LED(led->reg)); - if (ret < 0) { - dev_err(dev, "Cannot set LED %pOF brightness: %i\n", np, ret); - return ret; -@@ -158,7 +189,7 @@ static ssize_t brightness_show(struct de - struct i2c_client *client = to_i2c_client(dev); - int ret; - -- ret = i2c_smbus_read_byte_data(client, CMD_LED_GET_BRIGHTNESS); -+ ret = omnia_cmd_read_u8(client, CMD_LED_GET_BRIGHTNESS); - - if (ret < 0) - return ret; -@@ -179,8 +210,7 @@ static ssize_t brightness_store(struct d - if (brightness > 100) - return -EINVAL; - -- ret = i2c_smbus_write_byte_data(client, CMD_LED_SET_BRIGHTNESS, -- (u8)brightness); -+ ret = omnia_cmd_write_u8(client, CMD_LED_SET_BRIGHTNESS, brightness); - - return ret < 0 ? ret : count; - } -@@ -238,8 +268,8 @@ static void omnia_leds_remove(struct i2c - u8 buf[5]; - - /* put all LEDs into default (HW triggered) mode */ -- i2c_smbus_write_byte_data(client, CMD_LED_MODE, -- CMD_LED_MODE_LED(OMNIA_BOARD_LEDS)); -+ omnia_cmd_write_u8(client, CMD_LED_MODE, -+ CMD_LED_MODE_LED(OMNIA_BOARD_LEDS)); - - /* set all LEDs color to [255, 255, 255] */ - buf[0] = CMD_LED_COLOR; diff --git a/target/linux/generic/config-6.1 b/target/linux/generic/config-6.1 index cc339e476f9..d11c946dbca 100644 --- a/target/linux/generic/config-6.1 +++ b/target/linux/generic/config-6.1 @@ -1479,6 +1479,7 @@ CONFIG_DEVPORT=y # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set # CONFIG_DEVTMPFS is not set # CONFIG_DEVTMPFS_MOUNT is not set +# CONFIG_DEVTMPFS_SAFE is not set # CONFIG_DEV_DAX is not set # CONFIG_DGAP is not set # CONFIG_DGNC is not set diff --git a/target/linux/generic/hack-5.15/259-regmap_dynamic.patch b/target/linux/generic/hack-5.15/259-regmap_dynamic.patch index 76a5ace6f31..e0820ccfc0d 100644 --- a/target/linux/generic/hack-5.15/259-regmap_dynamic.patch +++ b/target/linux/generic/hack-5.15/259-regmap_dynamic.patch @@ -125,7 +125,7 @@ Signed-off-by: Felix Fietkau #include #include #include -@@ -3358,3 +3359,5 @@ static int __init regmap_initcall(void) +@@ -3360,3 +3361,5 @@ static int __init regmap_initcall(void) return 0; } postcore_initcall(regmap_initcall); diff --git a/target/linux/generic/hack-5.15/904-debloat_dma_buf.patch b/target/linux/generic/hack-5.15/904-debloat_dma_buf.patch index 0291a5e9bd8..71546bf942d 100644 --- a/target/linux/generic/hack-5.15/904-debloat_dma_buf.patch +++ b/target/linux/generic/hack-5.15/904-debloat_dma_buf.patch @@ -72,7 +72,7 @@ Signed-off-by: Felix Fietkau +MODULE_LICENSE("GPL"); --- a/kernel/sched/core.c +++ b/kernel/sched/core.c -@@ -4216,6 +4216,7 @@ int wake_up_state(struct task_struct *p, +@@ -4220,6 +4220,7 @@ int wake_up_state(struct task_struct *p, { return try_to_wake_up(p, state, 0); } diff --git a/target/linux/generic/hack-6.1/259-regmap_dynamic.patch b/target/linux/generic/hack-6.1/259-regmap_dynamic.patch index 407bc72ac8d..8d25f59ce28 100644 --- a/target/linux/generic/hack-6.1/259-regmap_dynamic.patch +++ b/target/linux/generic/hack-6.1/259-regmap_dynamic.patch @@ -125,7 +125,7 @@ Signed-off-by: Felix Fietkau #include #include #include -@@ -3511,3 +3512,5 @@ static int __init regmap_initcall(void) +@@ -3513,3 +3514,5 @@ static int __init regmap_initcall(void) return 0; } postcore_initcall(regmap_initcall); diff --git a/target/linux/generic/hack-6.1/720-net-phy-add-aqr-phys.patch b/target/linux/generic/hack-6.1/720-net-phy-add-aqr-phys.patch index fd2687d8ba9..df04511c81b 100644 --- a/target/linux/generic/hack-6.1/720-net-phy-add-aqr-phys.patch +++ b/target/linux/generic/hack-6.1/720-net-phy-add-aqr-phys.patch @@ -7,8 +7,8 @@ PHYs AQR113C and AQR813. Signed-off-by: Birger Koblitz ---- a/drivers/net/phy/aquantia_main.c -+++ b/drivers/net/phy/aquantia_main.c +--- a/drivers/net/phy/aquantia/aquantia_main.c ++++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -23,6 +23,7 @@ #define PHY_ID_AQCS109 0x03a1b5c2 #define PHY_ID_AQR405 0x03a1b4b0 @@ -17,7 +17,7 @@ Signed-off-by: Birger Koblitz #define MDIO_PHYXS_VEND_IF_STATUS 0xe812 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3) -@@ -415,6 +416,49 @@ static int aqr107_read_rate(struct phy_d +@@ -360,6 +361,49 @@ static int aqr107_read_rate(struct phy_d return 0; } @@ -67,7 +67,7 @@ Signed-off-by: Birger Koblitz static int aqr107_read_status(struct phy_device *phydev) { int val, ret; -@@ -554,7 +598,7 @@ static void aqr107_chip_info(struct phy_ +@@ -499,7 +543,7 @@ static void aqr107_chip_info(struct phy_ build_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID, val); prov_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_PROV_ID, val); @@ -76,7 +76,7 @@ Signed-off-by: Birger Koblitz fw_major, fw_minor, build_id, prov_id); } -@@ -809,7 +853,7 @@ static struct phy_driver aqr_driver[] = +@@ -760,7 +804,7 @@ static struct phy_driver aqr_driver[] = .config_aneg = aqr_config_aneg, .config_intr = aqr_config_intr, .handle_interrupt = aqr_handle_interrupt, @@ -85,7 +85,7 @@ Signed-off-by: Birger Koblitz .get_tunable = aqr107_get_tunable, .set_tunable = aqr107_set_tunable, .suspend = aqr107_suspend, -@@ -819,6 +863,24 @@ static struct phy_driver aqr_driver[] = +@@ -770,6 +814,24 @@ static struct phy_driver aqr_driver[] = .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, }, @@ -110,7 +110,7 @@ Signed-off-by: Birger Koblitz }; module_phy_driver(aqr_driver); -@@ -832,6 +894,7 @@ static struct mdio_device_id __maybe_unu +@@ -783,6 +845,7 @@ static struct mdio_device_id __maybe_unu { PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) }, diff --git a/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch b/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch index 77b190464cf..3823050e341 100644 --- a/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch +++ b/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch @@ -10,11 +10,11 @@ different firmware on the PHY. Signed-off-by: Alex Marginean --- - drivers/net/phy/aquantia_main.c | 88 +++++++++++++++++++++++++++++++++++++++++ + drivers/net/phy/aquantia/aquantia_main.c | 88 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) ---- a/drivers/net/phy/aquantia_main.c -+++ b/drivers/net/phy/aquantia_main.c +--- a/drivers/net/phy/aquantia/aquantia_main.c ++++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -24,6 +24,8 @@ #define PHY_ID_AQR405 0x03a1b4b0 #define PHY_ID_AQR113C 0x31c31c12 @@ -24,7 +24,7 @@ Signed-off-by: Alex Marginean #define MDIO_PHYXS_VEND_IF_STATUS 0xe812 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3) -@@ -151,6 +153,29 @@ +@@ -96,6 +98,29 @@ #define AQR107_OP_IN_PROG_SLEEP 1000 #define AQR107_OP_IN_PROG_TIMEOUT 100000 @@ -54,7 +54,7 @@ Signed-off-by: Alex Marginean struct aqr107_hw_stat { const char *name; int reg; -@@ -282,6 +307,51 @@ static int aqr_config_aneg(struct phy_de +@@ -227,6 +252,51 @@ static int aqr_config_aneg(struct phy_de return genphy_c45_check_and_restart_aneg(phydev, changed); } @@ -106,7 +106,7 @@ Signed-off-by: Alex Marginean static int aqr_config_intr(struct phy_device *phydev) { bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED; -@@ -881,6 +951,30 @@ static struct phy_driver aqr_driver[] = +@@ -832,6 +902,30 @@ static struct phy_driver aqr_driver[] = .get_stats = aqr107_get_stats, .link_change_notify = aqr107_link_change_notify, }, @@ -137,7 +137,7 @@ Signed-off-by: Alex Marginean }; module_phy_driver(aqr_driver); -@@ -895,6 +989,8 @@ static struct mdio_device_id __maybe_unu +@@ -846,6 +940,8 @@ static struct mdio_device_id __maybe_unu { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR813) }, diff --git a/target/linux/generic/hack-6.1/723-net-phy-aquantia-fix-system-side-protocol-mi.patch b/target/linux/generic/hack-6.1/723-net-phy-aquantia-fix-system-side-protocol-mi.patch index 8e204cb146a..33b182eab92 100644 --- a/target/linux/generic/hack-6.1/723-net-phy-aquantia-fix-system-side-protocol-mi.patch +++ b/target/linux/generic/hack-6.1/723-net-phy-aquantia-fix-system-side-protocol-mi.patch @@ -9,12 +9,12 @@ these protocols leads to link issues on system side. Signed-off-by: Alex Marginean --- - drivers/net/phy/aquantia_main.c | 8 +++++++- + drivers/net/phy/aquantia/aquantia_main.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) ---- a/drivers/net/phy/aquantia_main.c -+++ b/drivers/net/phy/aquantia_main.c -@@ -340,10 +340,16 @@ static int aqr_config_aneg_set_prot(stru +--- a/drivers/net/phy/aquantia/aquantia_main.c ++++ b/drivers/net/phy/aquantia/aquantia_main.c +@@ -285,10 +285,16 @@ static int aqr_config_aneg_set_prot(stru phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE, aquantia_syscfg[if_type].start_rate); diff --git a/target/linux/generic/hack-6.1/724-net-phy-aquantia-Add-AQR113-driver-support.patch b/target/linux/generic/hack-6.1/724-net-phy-aquantia-Add-AQR113-driver-support.patch index 0a1e9706239..f59a88a1470 100644 --- a/target/linux/generic/hack-6.1/724-net-phy-aquantia-Add-AQR113-driver-support.patch +++ b/target/linux/generic/hack-6.1/724-net-phy-aquantia-Add-AQR113-driver-support.patch @@ -5,11 +5,11 @@ Subject: [PATCH] PONRTSYS-8842: aquantia: Add AQR113 driver support Add a new entry for AQR113 PHY_ID --- - drivers/net/phy/aquantia_main.c | 10 ++++++++++ + drivers/net/phy/aquantia/aquantia_main.c | 10 ++++++++++ 1 file changed, 10 insertions(+) ---- a/drivers/net/phy/aquantia_main.c -+++ b/drivers/net/phy/aquantia_main.c +--- a/drivers/net/phy/aquantia/aquantia_main.c ++++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -26,6 +26,7 @@ #define PHY_ID_AQR813 0x31c31cb2 #define PHY_ID_AQR112 0x03a1b662 @@ -18,7 +18,7 @@ Add a new entry for AQR113 PHY_ID #define MDIO_PHYXS_VEND_IF_STATUS 0xe812 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3) -@@ -981,6 +982,14 @@ static struct phy_driver aqr_driver[] = +@@ -932,6 +933,14 @@ static struct phy_driver aqr_driver[] = .get_strings = aqr107_get_strings, .get_stats = aqr107_get_stats, }, @@ -33,7 +33,7 @@ Add a new entry for AQR113 PHY_ID }; module_phy_driver(aqr_driver); -@@ -997,6 +1006,7 @@ static struct mdio_device_id __maybe_unu +@@ -948,6 +957,7 @@ static struct mdio_device_id __maybe_unu { PHY_ID_MATCH_MODEL(PHY_ID_AQR813) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR112) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR412) }, diff --git a/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch b/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch index 654fea56611..c29c36aa22a 100644 --- a/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch +++ b/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch @@ -7,11 +7,11 @@ As advised by Ian Chang this PHY is used in Puzzle devices. Signed-off-by: Daniel Golle --- - drivers/net/phy/aquantia_main.c | 10 ++++++++++ + drivers/net/phy/aquantia/aquantia_main.c | 10 ++++++++++ 1 file changed, 10 insertions(+) ---- a/drivers/net/phy/aquantia_main.c -+++ b/drivers/net/phy/aquantia_main.c +--- a/drivers/net/phy/aquantia/aquantia_main.c ++++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -27,6 +27,8 @@ #define PHY_ID_AQR112 0x03a1b662 #define PHY_ID_AQR412 0x03a1b712 @@ -21,7 +21,7 @@ Signed-off-by: Daniel Golle #define MDIO_PHYXS_VEND_IF_STATUS 0xe812 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3) -@@ -990,6 +992,30 @@ static struct phy_driver aqr_driver[] = +@@ -941,6 +943,30 @@ static struct phy_driver aqr_driver[] = .handle_interrupt = aqr_handle_interrupt, .read_status = aqr107_read_status, }, @@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle }; module_phy_driver(aqr_driver); -@@ -1007,6 +1033,8 @@ static struct mdio_device_id __maybe_unu +@@ -958,6 +984,8 @@ static struct mdio_device_id __maybe_unu { PHY_ID_MATCH_MODEL(PHY_ID_AQR112) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR412) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR113) }, diff --git a/target/linux/generic/hack-6.1/726-net-phy-aquantia-enable-AQR111-and-AQR111B0.patch b/target/linux/generic/hack-6.1/726-net-phy-aquantia-enable-AQR111-and-AQR111B0.patch index dc25905fee1..dbae8f52f47 100644 --- a/target/linux/generic/hack-6.1/726-net-phy-aquantia-enable-AQR111-and-AQR111B0.patch +++ b/target/linux/generic/hack-6.1/726-net-phy-aquantia-enable-AQR111-and-AQR111B0.patch @@ -10,8 +10,8 @@ This is a 5GbE chip but it reports support for 10G. Implement config_init() to set max speed to 5G. Signed-off-by: Thomas Kupper ---- a/drivers/net/phy/aquantia_main.c -+++ b/drivers/net/phy/aquantia_main.c +--- a/drivers/net/phy/aquantia/aquantia_main.c ++++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -24,6 +24,8 @@ #define PHY_ID_AQR405 0x03a1b4b0 #define PHY_ID_AQR113C 0x31c31c12 @@ -21,7 +21,7 @@ Signed-off-by: Thomas Kupper #define PHY_ID_AQR112 0x03a1b662 #define PHY_ID_AQR412 0x03a1b712 #define PHY_ID_AQR113 0x31c31c40 -@@ -729,6 +731,34 @@ static int aqcs109_config_init(struct ph +@@ -674,6 +676,34 @@ static int aqcs109_config_init(struct ph return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); } @@ -56,7 +56,7 @@ Signed-off-by: Thomas Kupper static void aqr107_link_change_notify(struct phy_device *phydev) { u8 fw_major, fw_minor; -@@ -961,6 +991,42 @@ static struct phy_driver aqr_driver[] = +@@ -912,6 +942,42 @@ static struct phy_driver aqr_driver[] = .link_change_notify = aqr107_link_change_notify, }, { @@ -99,7 +99,7 @@ Signed-off-by: Thomas Kupper PHY_ID_MATCH_MODEL(PHY_ID_AQR112), .name = "Aquantia AQR112", .probe = aqr107_probe, -@@ -1030,6 +1096,8 @@ static struct mdio_device_id __maybe_unu +@@ -981,6 +1047,8 @@ static struct mdio_device_id __maybe_unu { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) }, { PHY_ID_MATCH_MODEL(PHY_ID_AQR813) }, diff --git a/target/linux/generic/hack-6.1/904-debloat_dma_buf.patch b/target/linux/generic/hack-6.1/904-debloat_dma_buf.patch index 8b6bd6a7862..105eb3da4bb 100644 --- a/target/linux/generic/hack-6.1/904-debloat_dma_buf.patch +++ b/target/linux/generic/hack-6.1/904-debloat_dma_buf.patch @@ -73,7 +73,7 @@ Signed-off-by: Felix Fietkau +MODULE_LICENSE("GPL"); --- a/kernel/sched/core.c +++ b/kernel/sched/core.c -@@ -4363,6 +4363,7 @@ int wake_up_state(struct task_struct *p, +@@ -4367,6 +4367,7 @@ int wake_up_state(struct task_struct *p, { return try_to_wake_up(p, state, 0); } diff --git a/target/linux/generic/pending-5.15/682-of_net-add-mac-address-increment-support.patch b/target/linux/generic/pending-5.15/682-of_net-add-mac-address-increment-support.patch index f6ae9f31f1f..73eabf4f376 100644 --- a/target/linux/generic/pending-5.15/682-of_net-add-mac-address-increment-support.patch +++ b/target/linux/generic/pending-5.15/682-of_net-add-mac-address-increment-support.patch @@ -20,14 +20,12 @@ Signed-off-by: Ansuel Smith --- a/net/core/of_net.c +++ b/net/core/of_net.c -@@ -119,28 +119,63 @@ static int of_get_mac_addr_nvmem(struct +@@ -119,10 +119,19 @@ static int of_get_mac_addr_nvmem(struct * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists * but is all zeros. * + * DT can tell the system to increment the mac-address after is extracted by + * using: -+ * - mac-address-increment-byte to decide what byte to increase -+ * (if not defined is increased the last byte) + * - mac-address-increment to decide how much to increase. The value WILL + * overflow to other bytes if the increment is over 255 or the total + * increment will exceed 255 of the current byte. @@ -38,19 +36,11 @@ Signed-off-by: Ansuel Smith */ int of_get_mac_address(struct device_node *np, u8 *addr) { -+ u32 inc_idx, mac_inc, mac_val; ++ u32 mac_inc, mac_val; int ret; -+ /* Check first if the increment byte is present and valid. -+ * If not set assume to increment the last byte if found. -+ */ -+ if (of_property_read_u32(np, "mac-address-increment-byte", &inc_idx)) -+ inc_idx = 5; -+ if (inc_idx < 3 || inc_idx > 5) -+ return -EINVAL; -+ if (!np) - return -ENODEV; +@@ -130,17 +139,33 @@ int of_get_mac_address(struct device_nod ret = of_get_mac_addr(np, "mac-address", addr); if (!ret) @@ -75,7 +65,7 @@ Signed-off-by: Ansuel Smith + if (!of_property_read_u32(np, "mac-address-increment", &mac_inc)) { + /* Convert to a contiguous value */ + mac_val = (addr[3] << 16) + (addr[4] << 8) + addr[5]; -+ mac_val += mac_inc << 8 * (5-inc_idx); ++ mac_val += mac_inc; + + /* Apply the incremented value handling overflow case */ + addr[3] = (mac_val >> 16) & 0xff; diff --git a/target/linux/generic/pending-5.15/683-of_net-add-mac-address-to-of-tree.patch b/target/linux/generic/pending-5.15/683-of_net-add-mac-address-to-of-tree.patch index f7ef06a14ad..29144ce8b40 100644 --- a/target/linux/generic/pending-5.15/683-of_net-add-mac-address-to-of-tree.patch +++ b/target/linux/generic/pending-5.15/683-of_net-add-mac-address-to-of-tree.patch @@ -45,7 +45,7 @@ property. This way, the MAC address can be accessed using procfs. /** * of_get_mac_address() * @np: Caller's Device Node -@@ -175,6 +196,7 @@ found: +@@ -165,6 +186,7 @@ found: addr[5] = (mac_val >> 0) & 0xff; } diff --git a/target/linux/generic/pending-5.15/684-of_net-do-mac-address-increment-only-once.patch b/target/linux/generic/pending-5.15/684-of_net-do-mac-address-increment-only-once.patch index 44d88e31a2e..c37c4519899 100644 --- a/target/linux/generic/pending-5.15/684-of_net-do-mac-address-increment-only-once.patch +++ b/target/linux/generic/pending-5.15/684-of_net-do-mac-address-increment-only-once.patch @@ -16,16 +16,15 @@ Signed-off-by: Will Moss --- a/net/core/of_net.c +++ b/net/core/of_net.c -@@ -194,6 +194,12 @@ found: +@@ -184,6 +184,11 @@ found: addr[3] = (mac_val >> 16) & 0xff; addr[4] = (mac_val >> 8) & 0xff; addr[5] = (mac_val >> 0) & 0xff; + -+ /* Remove mac-address-increment and mac-address-increment-byte -+ * DT property to make sure MAC address would not get incremented -+ * more if this function is stared again. */ ++ /* Remove mac-address-increment DT property to make sure MAC ++ * address would not get incremented more if this function is ++ * stared again. */ + of_remove_property(np, of_find_property(np, "mac-address-increment", NULL)); -+ of_remove_property(np, of_find_property(np, "mac-address-increment-byte", NULL)); } of_add_mac_address(np, addr); diff --git a/target/linux/generic/pending-5.15/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch b/target/linux/generic/pending-5.15/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch index b618c896136..a15fc786a0e 100644 --- a/target/linux/generic/pending-5.15/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch +++ b/target/linux/generic/pending-5.15/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch @@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau --- a/net/netfilter/nf_tables_api.c +++ b/net/netfilter/nf_tables_api.c -@@ -7707,7 +7707,7 @@ static int nft_register_flowtable_net_ho +@@ -7703,7 +7703,7 @@ static int nft_register_flowtable_net_ho err = flowtable->data.type->setup(&flowtable->data, hook->ops.dev, FLOW_BLOCK_BIND); diff --git a/target/linux/generic/pending-6.1/682-of_net-add-mac-address-increment-support.patch b/target/linux/generic/pending-6.1/682-of_net-add-mac-address-increment-support.patch index f6ae9f31f1f..73eabf4f376 100644 --- a/target/linux/generic/pending-6.1/682-of_net-add-mac-address-increment-support.patch +++ b/target/linux/generic/pending-6.1/682-of_net-add-mac-address-increment-support.patch @@ -20,14 +20,12 @@ Signed-off-by: Ansuel Smith --- a/net/core/of_net.c +++ b/net/core/of_net.c -@@ -119,28 +119,63 @@ static int of_get_mac_addr_nvmem(struct +@@ -119,10 +119,19 @@ static int of_get_mac_addr_nvmem(struct * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists * but is all zeros. * + * DT can tell the system to increment the mac-address after is extracted by + * using: -+ * - mac-address-increment-byte to decide what byte to increase -+ * (if not defined is increased the last byte) + * - mac-address-increment to decide how much to increase. The value WILL + * overflow to other bytes if the increment is over 255 or the total + * increment will exceed 255 of the current byte. @@ -38,19 +36,11 @@ Signed-off-by: Ansuel Smith */ int of_get_mac_address(struct device_node *np, u8 *addr) { -+ u32 inc_idx, mac_inc, mac_val; ++ u32 mac_inc, mac_val; int ret; -+ /* Check first if the increment byte is present and valid. -+ * If not set assume to increment the last byte if found. -+ */ -+ if (of_property_read_u32(np, "mac-address-increment-byte", &inc_idx)) -+ inc_idx = 5; -+ if (inc_idx < 3 || inc_idx > 5) -+ return -EINVAL; -+ if (!np) - return -ENODEV; +@@ -130,17 +139,33 @@ int of_get_mac_address(struct device_nod ret = of_get_mac_addr(np, "mac-address", addr); if (!ret) @@ -75,7 +65,7 @@ Signed-off-by: Ansuel Smith + if (!of_property_read_u32(np, "mac-address-increment", &mac_inc)) { + /* Convert to a contiguous value */ + mac_val = (addr[3] << 16) + (addr[4] << 8) + addr[5]; -+ mac_val += mac_inc << 8 * (5-inc_idx); ++ mac_val += mac_inc; + + /* Apply the incremented value handling overflow case */ + addr[3] = (mac_val >> 16) & 0xff; diff --git a/target/linux/generic/pending-6.1/683-of_net-add-mac-address-to-of-tree.patch b/target/linux/generic/pending-6.1/683-of_net-add-mac-address-to-of-tree.patch index f7ef06a14ad..29144ce8b40 100644 --- a/target/linux/generic/pending-6.1/683-of_net-add-mac-address-to-of-tree.patch +++ b/target/linux/generic/pending-6.1/683-of_net-add-mac-address-to-of-tree.patch @@ -45,7 +45,7 @@ property. This way, the MAC address can be accessed using procfs. /** * of_get_mac_address() * @np: Caller's Device Node -@@ -175,6 +196,7 @@ found: +@@ -165,6 +186,7 @@ found: addr[5] = (mac_val >> 0) & 0xff; } diff --git a/target/linux/generic/pending-6.1/684-of_net-do-mac-address-increment-only-once.patch b/target/linux/generic/pending-6.1/684-of_net-do-mac-address-increment-only-once.patch index 44d88e31a2e..c37c4519899 100644 --- a/target/linux/generic/pending-6.1/684-of_net-do-mac-address-increment-only-once.patch +++ b/target/linux/generic/pending-6.1/684-of_net-do-mac-address-increment-only-once.patch @@ -16,16 +16,15 @@ Signed-off-by: Will Moss --- a/net/core/of_net.c +++ b/net/core/of_net.c -@@ -194,6 +194,12 @@ found: +@@ -184,6 +184,11 @@ found: addr[3] = (mac_val >> 16) & 0xff; addr[4] = (mac_val >> 8) & 0xff; addr[5] = (mac_val >> 0) & 0xff; + -+ /* Remove mac-address-increment and mac-address-increment-byte -+ * DT property to make sure MAC address would not get incremented -+ * more if this function is stared again. */ ++ /* Remove mac-address-increment DT property to make sure MAC ++ * address would not get incremented more if this function is ++ * stared again. */ + of_remove_property(np, of_find_property(np, "mac-address-increment", NULL)); -+ of_remove_property(np, of_find_property(np, "mac-address-increment-byte", NULL)); } of_add_mac_address(np, addr); diff --git a/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch b/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch index 6a651a04f7f..0d6adff4eaf 100644 --- a/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch +++ b/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch @@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau --- a/net/netfilter/nf_tables_api.c +++ b/net/netfilter/nf_tables_api.c -@@ -7882,7 +7882,7 @@ static int nft_register_flowtable_net_ho +@@ -7878,7 +7878,7 @@ static int nft_register_flowtable_net_ho err = flowtable->data.type->setup(&flowtable->data, hook->ops.dev, FLOW_BLOCK_BIND); diff --git a/target/linux/ipq40xx/patches-6.1/701-net-dsa-add-out-of-band-tagging-protocol.patch b/target/linux/ipq40xx/patches-6.1/701-net-dsa-add-out-of-band-tagging-protocol.patch index 8f296a6f7b7..ecf1a05896f 100644 --- a/target/linux/ipq40xx/patches-6.1/701-net-dsa-add-out-of-band-tagging-protocol.patch +++ b/target/linux/ipq40xx/patches-6.1/701-net-dsa-add-out-of-band-tagging-protocol.patch @@ -136,7 +136,7 @@ Signed-off-by: Maxime Chevallier #include #include #include -@@ -4515,6 +4519,9 @@ static const u8 skb_ext_type_len[] = { +@@ -4516,6 +4520,9 @@ static const u8 skb_ext_type_len[] = { #if IS_ENABLED(CONFIG_MCTP_FLOWS) [SKB_EXT_MCTP] = SKB_EXT_CHUNKSIZEOF(struct mctp_flow), #endif @@ -146,7 +146,7 @@ Signed-off-by: Maxime Chevallier }; static __always_inline unsigned int skb_ext_total_length(void) -@@ -4535,6 +4542,9 @@ static __always_inline unsigned int skb_ +@@ -4536,6 +4543,9 @@ static __always_inline unsigned int skb_ #if IS_ENABLED(CONFIG_MCTP_FLOWS) skb_ext_type_len[SKB_EXT_MCTP] + #endif diff --git a/target/linux/ipq40xx/patches-6.1/709-net-phy-Add-Qualcom-QCA807x-driver.patch b/target/linux/ipq40xx/patches-6.1/709-net-phy-Add-Qualcom-QCA807x-driver.patch index 9bae6e7b96b..dbf87d4ddeb 100644 --- a/target/linux/ipq40xx/patches-6.1/709-net-phy-Add-Qualcom-QCA807x-driver.patch +++ b/target/linux/ipq40xx/patches-6.1/709-net-phy-Add-Qualcom-QCA807x-driver.patch @@ -25,7 +25,7 @@ Signed-off-by: Robert Marko --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -369,6 +369,13 @@ config AT803X_PHY +@@ -366,6 +366,13 @@ config AT803X_PHY Currently supports the AR8030, AR8031, AR8033, AR8035 and internal QCA8337(Internal qca8k PHY) model @@ -41,7 +41,7 @@ Signed-off-by: Robert Marko help --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile -@@ -94,6 +94,7 @@ obj-$(CONFIG_MOTORCOMM_PHY) += motorcomm +@@ -90,6 +90,7 @@ obj-$(CONFIG_MOTORCOMM_PHY) += motorcomm obj-$(CONFIG_NATIONAL_PHY) += national.o obj-$(CONFIG_NXP_C45_TJA11XX_PHY) += nxp-c45-tja11xx.o obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts index 04f4b7cd023..0c669dcbfe6 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts @@ -319,22 +319,47 @@ label = "PRODUCTDATA"; reg = <0x02b0000 0x0030000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_factory_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + macaddr_PRODUCTDATA_c: macaddr@c { + reg = <0xc 0x6>; + }; + + macaddr_PRODUCTDATA_12: macaddr@12 { + reg = <0x12 0x6>; + }; + }; }; partition@2e0000 { label = "ART"; reg = <0x02e0000 0x0040000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - precal_ART_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - precal_ART_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; @@ -691,28 +716,6 @@ }; }; -&factory { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_factory_0: macaddr@0 { - reg = <0x0 0x6>; - }; - - macaddr_factory_6: macaddr@6 { - reg = <0x6 0x6>; - }; - - macaddr_PRODUCTDATA_c: macaddr@c { - reg = <0xc 0x6>; - }; - - macaddr_PRODUCTDATA_12: macaddr@12 { - reg = <0x12 0x6>; - }; -}; - &hs_phy_0 { status = "okay"; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi index c425c9cd2ed..f306201754e 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi @@ -162,16 +162,19 @@ label = "radio"; reg = <0x1b0000 0x40000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - precal_radio_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - precal_radio_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_radio_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_radio_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; @@ -189,6 +192,18 @@ label = "default-mac"; reg = <0x1ef0000 0x00200>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_defaultmac_8: macaddr@8 { + compatible = "mac-base"; + reg = <0x8 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@1ef0200 { @@ -304,9 +319,8 @@ compatible = "pci168c,0040"; reg = <0x00010000 0 0 0 0>; - nvmem-cells = <&macaddr_defaultmac_8>, <&precal_radio_1000>; + nvmem-cells = <&macaddr_defaultmac_8 (-1)>, <&precal_radio_1000>; nvmem-cell-names = "mac-address", "pre-calibration"; - mac-address-increment = <(-1)>; }; }; }; @@ -325,7 +339,7 @@ compatible = "pci168c,0040"; reg = <0x00010000 0 0 0 0>; - nvmem-cells = <&macaddr_defaultmac_8>, <&precal_radio_5000>; + nvmem-cells = <&macaddr_defaultmac_8 0>, <&precal_radio_5000>; nvmem-cell-names = "mac-address", "pre-calibration"; }; }; @@ -445,9 +459,8 @@ pinctrl-0 = <&rgmii2_pins>; pinctrl-names = "default"; - nvmem-cells = <&macaddr_defaultmac_8>; + nvmem-cells = <&macaddr_defaultmac_8 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; fixed-link { speed = <1000>; @@ -460,7 +473,7 @@ phy-mode = "sgmii"; qcom,id = <2>; - nvmem-cells = <&macaddr_defaultmac_8>; + nvmem-cells = <&macaddr_defaultmac_8 0>; nvmem-cell-names = "mac-address"; fixed-link { @@ -472,13 +485,3 @@ &adm_dma { status = "okay"; }; - -&defaultmac { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_defaultmac_8: macaddr@8 { - reg = <0x8 0x6>; - }; -}; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts index 7e4e0c829c2..18563c19f7b 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts @@ -209,9 +209,8 @@ compatible = "pci168c,0040"; reg = <0x00010000 0 0 0 0>; - nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>; + nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>; nvmem-cell-names = "mac-address", "pre-calibration"; - mac-address-increment = <(1)>; }; }; }; @@ -233,9 +232,8 @@ compatible = "pci168c,0040"; reg = <0x00010000 0 0 0 0>; - nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>; + nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>; nvmem-cell-names = "mac-address", "pre-calibration"; - mac-address-increment = <(2)>; }; }; }; @@ -288,24 +286,29 @@ label = "art"; reg = <0x1200000 0x0140000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - macaddr_art_0: macaddr@0 { - reg = <0x0 0x6>; - }; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_art_6: macaddr@6 { - reg = <0x6 0x6>; - }; + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; - precal_art_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + macaddr_art_6: macaddr@6 { + compatible = "mac-base"; + reg = <0x6 0x6>; + #nvmem-cell-cells = <1>; + }; - precal_art_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; @@ -448,7 +451,7 @@ pinctrl-0 = <&rgmii2_pins>; pinctrl-names = "default"; - nvmem-cells = <&macaddr_art_6>; + nvmem-cells = <&macaddr_art_6 0>; nvmem-cell-names = "mac-address"; fixed-link { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi index ba53a7391de..5b8de27ad69 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi @@ -454,6 +454,7 @@ #size-cells = <2>; #address-cells = <3>; device_type = "pci"; + interrupt-controller; ath10k@0,0 { reg = <0 0 0 0 0>; @@ -473,6 +474,7 @@ #size-cells = <2>; #address-cells = <3>; device_type = "pci"; + interrupt-controller; ath10k@0,0 { reg = <0 0 0 0 0>; @@ -492,6 +494,7 @@ #size-cells = <2>; #address-cells = <3>; device_type = "pci"; + interrupt-controller; ath10k@0,0 { reg = <0 0 0 0 0>; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts index c58c289d35d..41360b4a55b 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts @@ -221,6 +221,20 @@ label = "art"; reg = <0x1200000 0x0140000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_art_6: macaddr@6 { + reg = <0x6 0x6>; + }; + }; }; kernel@1340000 { @@ -393,17 +407,3 @@ &adm_dma { status = "okay"; }; - -&art { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_art_0: macaddr@0 { - reg = <0x0 0x6>; - }; - - macaddr_art_6: macaddr@6 { - reg = <0x6 0x6>; - }; -}; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts index 719a423cad3..47f653ac763 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts @@ -213,9 +213,8 @@ compatible = "pci168c,0040"; reg = <0x00010000 0 0 0 0>; - nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>; + nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>; nvmem-cell-names = "mac-address", "pre-calibration"; - mac-address-increment = <(1)>; }; }; }; @@ -237,9 +236,8 @@ compatible = "pci168c,0040"; reg = <0x00010000 0 0 0 0>; - nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>; + nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>; nvmem-cell-names = "mac-address", "pre-calibration"; - mac-address-increment = <(2)>; }; }; }; @@ -285,24 +283,29 @@ label = "art"; reg = <0x1200000 0x0140000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - macaddr_art_0: macaddr@0 { - reg = <0x0 0x6>; - }; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_art_6: macaddr@6 { - reg = <0x6 0x6>; - }; + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; - precal_art_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + macaddr_art_6: macaddr@6 { + compatible = "mac-base"; + reg = <0x6 0x6>; + #nvmem-cell-cells = <1>; + }; - precal_art_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; @@ -445,7 +448,7 @@ pinctrl-0 = <&rgmii2_pins>; pinctrl-names = "default"; - nvmem-cells = <&macaddr_art_6>; + nvmem-cells = <&macaddr_art_6 0>; nvmem-cell-names = "mac-address"; fixed-link { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts index 90927ddb856..fac41897d4f 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts @@ -179,6 +179,20 @@ label = "EEPROM"; reg = <0x1c0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_eeprom_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_eeprom_6: macaddr@6 { + reg = <0x6 0x6>; + }; + }; }; partition@1d0000 { @@ -299,17 +313,3 @@ &usb3_1 { status = "okay"; }; - -&eeprom { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_eeprom_0: macaddr@0 { - reg = <0x0 0x6>; - }; - - macaddr_eeprom_6: macaddr@6 { - reg = <0x6 0x6>; - }; -}; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts index 8104ce18298..ac62470df48 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts @@ -268,12 +268,16 @@ reg = <0xfaf100 0x00200>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_defaultmac_0: macaddr@0 { - reg = <0x0 0x6>; + macaddr_defaultmac_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; }; }; @@ -282,16 +286,18 @@ reg = <0xfc0000 0x40000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - precal_ART_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; - precal_ART_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; }; @@ -336,9 +342,8 @@ compatible = "pci168c,0040"; reg = <0x00010000 0 0 0 0>; - nvmem-cells = <&macaddr_defaultmac_0>, <&precal_ART_1000>; + nvmem-cells = <&macaddr_defaultmac_0 (-1)>, <&precal_ART_1000>; nvmem-cell-names = "mac-address", "pre-calibration"; - mac-address-increment = <(-1)>; }; }; }; @@ -357,7 +362,7 @@ compatible = "pci168c,0040"; reg = <0x00010000 0 0 0 0>; - nvmem-cells = <&macaddr_defaultmac_0>, <&precal_ART_5000>; + nvmem-cells = <&macaddr_defaultmac_0 0>, <&precal_ART_5000>; nvmem-cell-names = "mac-address", "pre-calibration"; }; }; @@ -477,9 +482,8 @@ pinctrl-0 = <&rgmii2_pins>; pinctrl-names = "default"; - nvmem-cells = <&macaddr_defaultmac_0>; + nvmem-cells = <&macaddr_defaultmac_0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; fixed-link { speed = <1000>; @@ -492,7 +496,7 @@ phy-mode = "sgmii"; qcom,id = <2>; - nvmem-cells = <&macaddr_defaultmac_0>; + nvmem-cells = <&macaddr_defaultmac_0 0>; nvmem-cell-names = "mac-address"; fixed-link { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts index 87b05b57ba9..a376eb0e2fe 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts @@ -360,22 +360,47 @@ switch@10 { label = "PRODUCTDATA"; reg = <0x2b0000 0x30000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_PRODUCTDATA_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_PRODUCTDATA_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + macaddr_PRODUCTDATA_c: macaddr@c { + reg = <0xc 0x6>; + }; + + macaddr_PRODUCTDATA_12: macaddr@12 { + reg = <0x12 0x6>; + }; + }; }; ART@2e0000 { label = "ART"; reg = <0x2e0000 0x40000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - precal_ART_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - precal_ART_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; @@ -522,25 +547,3 @@ switch@10 { }; }; }; - -&PRODUCTDATA { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_PRODUCTDATA_0: macaddr@0 { - reg = <0x0 0x6>; - }; - - macaddr_PRODUCTDATA_6: macaddr@6 { - reg = <0x6 0x6>; - }; - - macaddr_PRODUCTDATA_c: macaddr@c { - reg = <0xc 0x6>; - }; - - macaddr_PRODUCTDATA_12: macaddr@12 { - reg = <0x12 0x6>; - }; -}; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts index 2d761ee3557..d484ba9c603 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts @@ -420,32 +420,34 @@ reg = <0x180000 0x40000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_ART_0: macaddr@0 { - reg = <0x0 0x6>; - }; + macaddr_ART_0: macaddr@0 { + reg = <0x0 0x6>; + }; - macaddr_ART_6: macaddr@6 { - reg = <0x6 0x6>; - }; + macaddr_ART_6: macaddr@6 { + reg = <0x6 0x6>; + }; - macaddr_ART_18: macaddr@18 { - reg = <0x18 0x6>; - }; + macaddr_ART_18: macaddr@18 { + reg = <0x18 0x6>; + }; - macaddr_ART_1e: macaddr@1e { - reg = <0x1e 0x6>; - }; + macaddr_ART_1e: macaddr@1e { + reg = <0x1e 0x6>; + }; - precal_ART_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; - precal_ART_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi index 51ad5ac8eef..4662e2843cb 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi @@ -261,24 +261,33 @@ label = "art"; reg = <0x1200000 0x0140000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - macaddr_art_0: macaddr@0 { - reg = <0x0 0x6>; - }; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_art_6: macaddr@6 { - reg = <0x6 0x6>; - }; + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; - precal_art_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + macaddr_art_6: macaddr@6 { + compatible = "mac-base"; + reg = <0x6 0x6>; + #nvmem-cell-cells = <1>; + }; - precal_art_5000: precal@5000 { - reg = <0x5000 0x2f20>; + macaddr_art_c: macaddr@c { + reg = <0xc 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts index bf7c963944b..3440c52699e 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts @@ -36,13 +36,11 @@ }; &wifi0 { - nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>; + nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>; nvmem-cell-names = "mac-address", "pre-calibration"; - mac-address-increment = <(1)>; }; &wifi1 { - nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>; + nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>; nvmem-cell-names = "mac-address", "pre-calibration"; - mac-address-increment = <(2)>; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts index 5453f9fcb3c..3f5e8075919 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts @@ -209,24 +209,27 @@ label = "0:ART"; reg = <0x1200000 0x0140000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - macaddr_ART_0: macaddr@0 { - reg = <0x0 0x6>; - }; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_ART_6: macaddr@6 { - reg = <0x6 0x6>; - }; + macaddr_ART_0: macaddr@0 { + reg = <0x0 0x6>; + }; - precal_ART_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + macaddr_ART_6: macaddr@6 { + reg = <0x6 0x6>; + }; - precal_ART_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts index 600bcc8421d..7679f28eef1 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts @@ -188,15 +188,17 @@ reg = <0x1200000 0x0140000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - precal_ART_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; - precal_ART_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; stock_partition@1340000 { @@ -273,24 +275,26 @@ label = "fw_env"; reg = <0x6400000 0x0100000>; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_fw_env_0: macaddr@0 { - reg = <0x00 0x6>; - }; - macaddr_fw_env_6: macaddr@6 { - reg = <0x06 0x6>; - }; - macaddr_fw_env_c: macaddr@c { - reg = <0x0c 0x6>; - }; - macaddr_fw_env_12: macaddr@12 { - reg = <0x12 0x6>; - }; - macaddr_fw_env_18: macaddr@18 { - reg = <0x18 0x6>; + macaddr_fw_env_0: macaddr@0 { + reg = <0x00 0x6>; + }; + macaddr_fw_env_6: macaddr@6 { + reg = <0x06 0x6>; + }; + macaddr_fw_env_c: macaddr@c { + reg = <0x0c 0x6>; + }; + macaddr_fw_env_12: macaddr@12 { + reg = <0x12 0x6>; + }; + macaddr_fw_env_18: macaddr@18 { + reg = <0x18 0x6>; + }; }; }; partition@6500000 { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr450.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr450.dts index 4353aec7ac0..1d4e9d36fe4 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr450.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr450.dts @@ -42,9 +42,3 @@ nvmem-cells = <&macaddr_art_0>, <&precal_art_5000>; nvmem-cell-names = "mac-address", "pre-calibration"; }; - -&art { - macaddr_art_c: macaddr@c { - reg = <0xc 0x6>; - }; -}; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr500.dts index f584735e155..9eef59eaf3d 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr500.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr500.dts @@ -42,9 +42,3 @@ nvmem-cells = <&macaddr_art_0>, <&precal_art_5000>; nvmem-cell-names = "mac-address", "pre-calibration"; }; - -&art { - macaddr_art_c: macaddr@c { - reg = <0xc 0x6>; - }; -}; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr42.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr42.dts index cfbfafb1793..d9d284fcfaf 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr42.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr42.dts @@ -58,7 +58,7 @@ phy-mode = "sgmii"; phy-handle = <&phy2>; - nvmem-cells = <&mac_address>; + nvmem-cells = <&mac_address 0>; nvmem-cell-names = "mac-address"; }; @@ -84,11 +84,17 @@ pagesize = <32>; reg = <0x56>; read-only; - #address-cells = <1>; - #size-cells = <1>; - mac_address: mac-address@66 { - reg = <0x66 0x6>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + mac_address: mac-address@66 { + compatible = "mac-base"; + reg = <0x66 0x6>; + #nvmem-cell-cells = <1>; + }; }; }; }; @@ -186,21 +192,18 @@ }; &wifi0 { - nvmem-cells = <&mac_address>; + nvmem-cells = <&mac_address 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; }; &wifi1 { - nvmem-cells = <&mac_address>; + nvmem-cells = <&mac_address 2>; nvmem-cell-names = "mac-address"; - mac-address-increment = <2>; }; &wifi2 { - nvmem-cells = <&mac_address>; + nvmem-cells = <&mac_address 3>; nvmem-cell-names = "mac-address"; - mac-address-increment = <3>; }; &hs_phy_0 { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr52.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr52.dts index f81e3ef690d..522fa12fd97 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr52.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr52.dts @@ -80,7 +80,7 @@ phy-mode = "sgmii"; phy-handle = <&phy0>; - nvmem-cells = <&mac_address>; + nvmem-cells = <&mac_address 0>; nvmem-cell-names = "mac-address"; }; @@ -93,9 +93,8 @@ phy-mode = "sgmii"; phy-handle = <&phy4>; - nvmem-cells = <&mac_address>; + nvmem-cells = <&mac_address 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; }; &gsbi7 { @@ -142,11 +141,17 @@ pagesize = <32>; reg = <0x52>; read-only; - #address-cells = <1>; - #size-cells = <1>; - mac_address: mac-address@66 { - reg = <0x66 0x6>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + mac_address: mac-address@66 { + compatible = "mac-base"; + reg = <0x66 0x6>; + #nvmem-cell-cells = <1>; + }; }; }; }; @@ -212,21 +217,18 @@ }; &wifi0 { - nvmem-cells = <&mac_address>; + nvmem-cells = <&mac_address 4>; nvmem-cell-names = "mac-address"; - mac-address-increment = <4>; }; &wifi1 { - nvmem-cells = <&mac_address>; + nvmem-cells = <&mac_address 3>; nvmem-cell-names = "mac-address"; - mac-address-increment = <3>; }; &wifi2 { - nvmem-cells = <&mac_address>; + nvmem-cells = <&mac_address 2>; nvmem-cell-names = "mac-address"; - mac-address-increment = <2>; }; &hs_phy_0 { diff --git a/target/linux/ixp4xx/patches-6.1/0007-watchdog-ixp4xx-Make-sure-restart-always-works.patch b/target/linux/ixp4xx/patches-6.1/0007-watchdog-ixp4xx-Make-sure-restart-always-works.patch deleted file mode 100644 index 8eae06deb61..00000000000 --- a/target/linux/ixp4xx/patches-6.1/0007-watchdog-ixp4xx-Make-sure-restart-always-works.patch +++ /dev/null @@ -1,79 +0,0 @@ -From b09e5ea32e099821b1cddc1e26e625ad994ba11e Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Sun, 24 Sep 2023 21:20:24 +0200 -Subject: [PATCH] watchdog: ixp4xx: Make sure restart always works - -The IXP4xx watchdog in early "A0" silicon is unreliable and -cannot be registered, however for some systems such as the -USRobotics USR8200 the watchdog is the only restart option, -so implement a "dummy" watchdog that can only support restart -in this case. - -Fixes: 1aea522809e6 ("watchdog: ixp4xx: Implement restart") -Signed-off-by: Linus Walleij ---- -Other solutions like implementing a pure restart notifier -callback catch in the driver is possible, but this method -will minimize the amount of code and reuse infrastructure -in the core. ---- - drivers/watchdog/ixp4xx_wdt.c | 28 +++++++++++++++++++++++++--- - 1 file changed, 25 insertions(+), 3 deletions(-) - ---- a/drivers/watchdog/ixp4xx_wdt.c -+++ b/drivers/watchdog/ixp4xx_wdt.c -@@ -105,6 +105,25 @@ static const struct watchdog_ops ixp4xx_ - .owner = THIS_MODULE, - }; - -+/* -+ * The A0 version of the IXP422 had a bug in the watchdog making -+ * is useless, but we still need to use it to restart the system -+ * as it is the only way, so in this special case we register a -+ * "dummy" watchdog that doesn't really work, but will support -+ * the restart operation. -+ */ -+static int ixp4xx_wdt_dummy(struct watchdog_device *wdd) -+{ -+ return 0; -+} -+ -+static const struct watchdog_ops ixp4xx_wdt_restart_only_ops = { -+ .start = ixp4xx_wdt_dummy, -+ .stop = ixp4xx_wdt_dummy, -+ .restart = ixp4xx_wdt_restart, -+ .owner = THIS_MODULE, -+}; -+ - static const struct watchdog_info ixp4xx_wdt_info = { - .options = WDIOF_KEEPALIVEPING - | WDIOF_MAGICCLOSE -@@ -120,14 +139,17 @@ static void ixp4xx_clock_action(void *d) - - static int ixp4xx_wdt_probe(struct platform_device *pdev) - { -+ static const struct watchdog_ops *iwdt_ops; - struct device *dev = &pdev->dev; - struct ixp4xx_wdt *iwdt; - struct clk *clk; - int ret; - - if (!(read_cpuid_id() & 0xf) && !cpu_is_ixp46x()) { -- dev_err(dev, "Rev. A0 IXP42x CPU detected - watchdog disabled\n"); -- return -ENODEV; -+ dev_err(dev, "Rev. A0 IXP42x CPU detected - only restart supported\n"); -+ iwdt_ops = &ixp4xx_wdt_restart_only_ops; -+ } else { -+ iwdt_ops = &ixp4xx_wdt_ops; - } - - iwdt = devm_kzalloc(dev, sizeof(*iwdt), GFP_KERNEL); -@@ -153,7 +175,7 @@ static int ixp4xx_wdt_probe(struct platf - iwdt->rate = IXP4XX_TIMER_FREQ; - - iwdt->wdd.info = &ixp4xx_wdt_info; -- iwdt->wdd.ops = &ixp4xx_wdt_ops; -+ iwdt->wdd.ops = iwdt_ops; - iwdt->wdd.min_timeout = 1; - iwdt->wdd.max_timeout = U32_MAX / iwdt->rate; - iwdt->wdd.parent = dev; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7312.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7312.dts index c8e67537a94..ba2b82dd670 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7312.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7312.dts @@ -97,9 +97,8 @@ &gsw { phy-mode = "rmii"; phy-handle = <&phy0>; - nvmem-cells = <&macaddr_ath9k_cal_a91>; + nvmem-cells = <&macaddr_ath9k_cal_a91 (-2)>; nvmem-cell-names = "mac-address"; - mac-address-increment = <(-2)>; mdio-bus { #address-cells = <1>; @@ -128,6 +127,18 @@ label = "urlader"; reg = <0x00000 0x20000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_ath9k_cal_a91: macaddr@a91 { + compatible = "mac-base"; + reg = <0xa91 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -171,13 +182,3 @@ qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */ }; }; - -&ath9k_cal { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_ath9k_cal_a91: macaddr@a91 { - reg = <0xa91 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7320.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7320.dts index cd7b29ca6d1..b04efd8a846 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7320.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7320.dts @@ -99,9 +99,8 @@ &gsw { phy-mode = "mii"; phy-handle = <&phy0>; - nvmem-cells = <&macaddr_ath9k_cal_a91>; + nvmem-cells = <&macaddr_ath9k_cal_a91 (-2)>; nvmem-cell-names = "mac-address"; - mac-address-increment = <(-2)>; mdio-bus { #address-cells = <1>; @@ -155,6 +154,18 @@ label = "urlader"; reg = <0x00000 0x20000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_ath9k_cal_a91: macaddr@a91 { + compatible = "mac-base"; + reg = <0xa91 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -215,13 +226,3 @@ status = "okay"; vbus-supply = <&usb1_vbus>; }; - -&ath9k_cal { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_ath9k_cal_a91: macaddr@a91 { - reg = <0xa91 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_buffalo_wbmr-hp-g300h.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_buffalo_wbmr-hp-g300h.dts index 8eaf566b261..7e0f157bf32 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_buffalo_wbmr-hp-g300h.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_buffalo_wbmr-hp-g300h.dts @@ -175,6 +175,16 @@ label = "board"; reg = <0x1fc0000 0x20000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_10024: macaddr@10024 { + reg = <0x10024 0x6>; + }; + }; }; partition@1fe0000 { @@ -194,13 +204,3 @@ status = "okay"; vbus-supply = <&usb_vbus>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_10024: macaddr@10024 { - reg = <0x10024 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4518pwr01.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4518pwr01.dtsi index b5e4537838b..3d56e76c46e 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4518pwr01.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4518pwr01.dtsi @@ -160,6 +160,16 @@ label = "boardconfig"; reg = <0x3f0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -199,13 +209,3 @@ status = "okay"; gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4519pw.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4519pw.dts index 35caf647a71..72f8c3bc661 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4519pw.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4519pw.dts @@ -167,6 +167,16 @@ label = "boardconfig"; reg = <0x3f0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -202,13 +212,3 @@ status = "okay"; gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4520pw.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4520pw.dts index 9a1c8b1bcb2..775aab4ba96 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4520pw.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4520pw.dts @@ -180,6 +180,16 @@ label = "boardconfig"; reg = <0x3f0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -219,13 +229,3 @@ gpios = <&gpio 31 GPIO_ACTIVE_HIGH &gpiomm 7 GPIO_ACTIVE_HIGH>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4525pw.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4525pw.dts index 650c8872c95..182b0c0bb18 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4525pw.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4525pw.dts @@ -129,6 +129,16 @@ label = "boardconfig"; reg = <0x3f0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -148,13 +158,3 @@ status = "okay"; gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv452cqw.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv452cqw.dts index dddf904af4c..4825eb2952e 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv452cqw.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv452cqw.dts @@ -198,6 +198,16 @@ label = "boardconfig"; reg = <0x3f0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -237,13 +247,3 @@ gpios = <&gpio 31 GPIO_ACTIVE_HIGH &gpiomm 7 GPIO_ACTIVE_HIGH>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7506pw11.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7506pw11.dts index cfa5dba7c6c..3f957c63a60 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7506pw11.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7506pw11.dts @@ -100,7 +100,7 @@ /* GPIO 19: switch reset */ &gsw { phy-mode = "rmii"; - nvmem-cells = <&macaddr_boardconfig_16>; + nvmem-cells = <&macaddr_boardconfig_16 0>; nvmem-cell-names = "mac-address"; }; @@ -136,6 +136,18 @@ label = "board_config"; reg = <0x7f0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + compatible = "mac-base"; + reg = <0x16 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; }; }; @@ -155,18 +167,7 @@ reg = <0x7000 0 0 0 0>; ralink,mtd-eeprom = <&boardconfig 0x410>; ralink,eeprom-swap; - nvmem-cells = <&macaddr_boardconfig_16>; + nvmem-cells = <&macaddr_boardconfig_16 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; - }; -}; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; }; }; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7510pw22.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7510pw22.dts index 9299f11fe32..52ba5e1a3bf 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7510pw22.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7510pw22.dts @@ -153,6 +153,16 @@ label = "board_config"; reg = <0xfe0000 0x20000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -195,13 +205,3 @@ status = "okay"; gpios = <&gpio 9 GPIO_ACTIVE_HIGH>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7518pw.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7518pw.dts index a327635c331..fb3363b2e2a 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7518pw.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7518pw.dts @@ -149,7 +149,7 @@ */ &gsw { phy-mode = "mii"; - nvmem-cells = <&macaddr_boardconfig_16>; + nvmem-cells = <&macaddr_boardconfig_16 0>; nvmem-cell-names = "mac-address"; }; @@ -184,6 +184,18 @@ label = "boardconfig"; reg = <0x7f0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + compatible = "mac-base"; + reg = <0x16 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; }; }; @@ -213,9 +225,8 @@ compatible = "pci168c,0029"; reg = <0x7000 0 0 0 0>; qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */ - nvmem-cells = <&macaddr_boardconfig_16>; + nvmem-cells = <&macaddr_boardconfig_16 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; }; }; @@ -231,13 +242,3 @@ &vmmc { status = "okay"; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7519pw.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7519pw.dts index 4f8f941c8b7..1f8db69f309 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7519pw.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7519pw.dts @@ -179,6 +179,16 @@ label = "board_config"; reg = <0xfe0000 0x20000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -214,13 +224,3 @@ &vmmc { status = "okay"; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7525pw.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7525pw.dts index 12de92ec530..d67efb4fca5 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7525pw.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7525pw.dts @@ -122,6 +122,16 @@ label = "board_config"; reg = <0x3f0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -146,13 +156,3 @@ status = "okay"; gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw.dts index f0900b56cc5..41a0e1b74a9 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw.dts @@ -192,6 +192,16 @@ label = "board_config"; reg = <0x7f0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -241,13 +251,3 @@ status = "okay"; gpios = <&gpiomm 1 GPIO_ACTIVE_HIGH>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw22.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw22.dts index 8897c9703cd..4fb135763d5 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw22.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw22.dts @@ -207,6 +207,16 @@ label = "board_config"; reg = <0x7f0000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -285,13 +295,3 @@ status = "okay"; gpios = <&gpiomm 1 GPIO_ACTIVE_HIGH>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv8539pw22.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv8539pw22.dts index 83a303b9e82..d6a917057d7 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv8539pw22.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv8539pw22.dts @@ -107,7 +107,7 @@ &gsw { phy-mode = "mii"; - nvmem-cells = <&macaddr_art_16>; + nvmem-cells = <&macaddr_art_16 0>; nvmem-cell-names = "mac-address"; }; @@ -143,6 +143,18 @@ label = "art"; reg = <0x7f0000 0x10000>; /* 64 KiB*/ read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_16: macaddr@16 { + compatible = "mac-base"; + reg = <0x16 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; }; }; @@ -160,9 +172,8 @@ compatible = "pci168c,0029"; reg = <0x7000 0 0 0 0>; qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */ - nvmem-cells = <&macaddr_art_16>; + nvmem-cells = <&macaddr_art_16 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; }; }; @@ -179,13 +190,3 @@ status = "okay"; gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; }; - -&art { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_art_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts index 343f3533d8b..935aa08cb90 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts @@ -207,6 +207,16 @@ label = "boardconfig"; reg = <0x1f80000 0x80000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + reg = <0x16 0x6>; + }; + }; }; }; }; @@ -234,13 +244,3 @@ status = "okay"; vbus-supply = <&usb_vbus>; }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi index 1f8ad430c00..69685d801b8 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi @@ -108,7 +108,7 @@ }; ð0 { - nvmem-cells = <&macaddr_boardconfig_16>; + nvmem-cells = <&macaddr_boardconfig_16 0>; nvmem-cell-names = "mac-address"; }; @@ -207,6 +207,18 @@ label = "board_config"; reg = <0xfe0000 0x20000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + compatible = "mac-base"; + reg = <0x16 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; }; }; @@ -221,9 +233,8 @@ reg = <0x7000 0 0 0 0>; ralink,mtd-eeprom = <&boardconfig 0x410>; ralink,eeprom-swap; - nvmem-cells = <&macaddr_boardconfig_16>; + nvmem-cells = <&macaddr_boardconfig_16 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; }; }; @@ -246,13 +257,3 @@ &gpio 31 GPIO_ACTIVE_HIGH //still unknown &gpio 3 GPIO_ACTIVE_HIGH>; //reset_slic? }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi index 5e6a6f0c64f..71046cfd58c 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi @@ -127,9 +127,8 @@ }; ð0 { - nvmem-cells = <&macaddr_boardconfig_16>; + nvmem-cells = <&macaddr_boardconfig_16 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; }; &gphy0 { @@ -225,6 +224,18 @@ label = "board_config"; reg = <0x40000 0x10000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boardconfig_16: macaddr@16 { + compatible = "mac-base"; + reg = <0x16 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; }; }; @@ -239,9 +250,8 @@ reg = <0x7000 0 0 0 0>; ralink,mtd-eeprom = <&boardconfig 0x410>; ralink,eeprom-swap; - nvmem-cells = <&macaddr_boardconfig_16>; + nvmem-cells = <&macaddr_boardconfig_16 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; }; }; @@ -280,13 +290,3 @@ &gpio 31 GPIO_ACTIVE_HIGH //still unknown &gpio 3 GPIO_ACTIVE_HIGH>; //reset_slic? }; - -&boardconfig { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_boardconfig_16: macaddr@16 { - reg = <0x16 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360-v2.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360-v2.dts index a30746cde2b..cc15324b56e 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360-v2.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360-v2.dts @@ -43,16 +43,20 @@ reg = <0x00000 0x20000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - cal_urlader_985: cal@985 { - reg = <0x985 0x440>; - }; + cal_urlader_985: cal@985 { + reg = <0x985 0x440>; + }; - macaddr_urlader_a91: macaddr@a91 { - reg = <0xa91 0x6>; + macaddr_urlader_a91: macaddr@a91 { + compatible = "mac-base"; + reg = <0xa91 0x6>; + #nvmem-cell-cells = <1>; + }; }; }; @@ -77,9 +81,8 @@ }; ð0 { - nvmem-cells = <&macaddr_urlader_a91>; + nvmem-cells = <&macaddr_urlader_a91 (-2)>; nvmem-cell-names = "mac-address"; - mac-address-increment = <(-2)>; }; &phy0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360sl.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360sl.dts index 31523eaae00..cbe6c14c991 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360sl.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360sl.dts @@ -43,6 +43,18 @@ label = "urlader"; reg = <0x00000 0x20000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_urlader_a91: macaddr@a91 { + compatible = "mac-base"; + reg = <0xa91 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@20000 { @@ -66,9 +78,8 @@ }; ð0 { - nvmem-cells = <&macaddr_urlader_a91>; + nvmem-cells = <&macaddr_urlader_a91 (-2)>; nvmem-cell-names = "mac-address"; - mac-address-increment = <(-2)>; }; &phy0 { @@ -78,13 +89,3 @@ &phy1 { reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; }; - -&urlader { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_urlader_a91: macaddr@a91 { - reg = <0xa91 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts index 7995b34971a..7929bde6cfe 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts @@ -47,6 +47,18 @@ reg = <0x0 0x40000>; label = "urlader"; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_urlader_a91: macaddr@a91 { + compatible = "mac-base"; + reg = <0xa91 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@40000 { @@ -104,9 +116,8 @@ }; ð0 { - nvmem-cells = <&macaddr_urlader_a91>; + nvmem-cells = <&macaddr_urlader_a91 (-2)>; nvmem-cell-names = "mac-address"; - mac-address-increment = <(-2)>; }; &phy0 { @@ -116,13 +127,3 @@ &phy1 { reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; }; - -&urlader { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_urlader_a91: macaddr@a91 { - reg = <0xa91 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi index 5b7c10bb9dd..39d7b4908cd 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi @@ -110,7 +110,7 @@ }; ð0 { - nvmem-cells = <&macaddr_ath9k_cal_f100>; + nvmem-cells = <&macaddr_ath9k_cal_f100 0>; nvmem-cell-names = "mac-address"; }; @@ -204,9 +204,8 @@ gpio-controller; qca,no-eeprom; ieee80211-freq-limit = <2402000 2482000>; - nvmem-cells = <&macaddr_ath9k_cal_f100>; + nvmem-cells = <&macaddr_ath9k_cal_f100 2>; nvmem-cell-names = "mac-address"; - mac-address-increment = <2>; }; }; }; @@ -246,6 +245,18 @@ reg = <0x7d0000 0x30000>; label = "boardconfig"; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_ath9k_cal_f100: macaddr@f100 { + compatible = "mac-base"; + reg = <0xf100 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; }; }; @@ -268,13 +279,3 @@ status = "okay"; vbus-supply = <&usb_vbus>; }; - -&ath9k_cal { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_ath9k_cal_f100: macaddr@f100 { - reg = <0xf100 0x6>; - }; -}; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi index e37f1ab37c8..acb54ee80b3 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi @@ -100,7 +100,7 @@ }; ð0 { - nvmem-cells = <&macaddr_romfile_f100>; + nvmem-cells = <&macaddr_romfile_f100 0>; nvmem-cell-names = "mac-address"; }; @@ -192,9 +192,8 @@ mediatek,mtd-eeprom = <&radio 0x0000>; big-endian; ieee80211-freq-limit = <5000000 6000000>; - nvmem-cells = <&macaddr_romfile_f100>; + nvmem-cells = <&macaddr_romfile_f100 2>; nvmem-cell-names = "mac-address"; - mac-address-increment = <2>; }; }; }; @@ -245,6 +244,18 @@ reg = <0xfd0000 0x10000>; label = "romfile"; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_romfile_f100: macaddr@f100 { + compatible = "mac-base"; + reg = <0xf100 0x6>; + #nvmem-cell-cells = <1>; + }; + }; }; partition@fe0000 { @@ -279,13 +290,3 @@ status = "okay"; vbus-supply = <&usb_vbus>; }; - -&romfile { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_romfile_f100: macaddr@f100 { - reg = <0xf100 0x6>; - }; -}; diff --git a/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts b/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts index d39083ffb0d..ae4404466e8 100644 --- a/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts +++ b/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts @@ -77,7 +77,7 @@ }; &mdio_bus { - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts index e9c850e85b0..3f330f40fae 100644 --- a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts +++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts @@ -90,7 +90,7 @@ }; &mdio_bus { - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000-v1.dts index 7975d247b15..56e90b17228 100644 --- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000-v1.dts +++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000-v1.dts @@ -112,7 +112,7 @@ }; &mdio_bus { - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/dts/mt7981b-h3c-magic-nx30-pro.dts b/target/linux/mediatek/dts/mt7981b-h3c-magic-nx30-pro.dts index 671e1f1839a..de702d4a534 100644 --- a/target/linux/mediatek/dts/mt7981b-h3c-magic-nx30-pro.dts +++ b/target/linux/mediatek/dts/mt7981b-h3c-magic-nx30-pro.dts @@ -81,7 +81,7 @@ }; &mdio_bus { - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/dts/mt7981b-jcg-q30-pro.dts b/target/linux/mediatek/dts/mt7981b-jcg-q30-pro.dts new file mode 100644 index 00000000000..d85c6e46510 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-jcg-q30-pro.dts @@ -0,0 +1,225 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include +#include + +#include "mt7981.dtsi" + +/ { + model = "JCG Q30 PRO"; + compatible = "jcg,q30-pro", "mediatek,mt7981"; + + aliases { + serial0 = &uart0; + label-mac-device = &gmac0; + led-boot = &led_status_red; + led-failsafe = &led_status_red; + led-running = &led_status_blue; + led-upgrade = &led_status_blue; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0 0x40000000 0 0x10000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: red { + label = "red:status"; + gpios = <&pio 8 GPIO_ACTIVE_HIGH>; + }; + + led_status_blue: blue { + label = "blue:status"; + gpios = <&pio 13 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + nvmem-cells = <&macaddr_lan>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; +}; + +&mdio_bus { + switch: switch@1f { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + + spi_nand@0 { + compatible = "spi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + + spi-max-frequency = <52000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bl2"; + reg = <0x0000000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x0100000 0x0080000>; + }; + + factory: partition@180000 { + label = "Factory"; + reg = <0x0180000 0x0200000>; + read-only; + }; + + partition@380000 { + label = "fip"; + reg = <0x0380000 0x0200000>; + read-only; + }; + + partition@580000 { + label = "ubi"; + reg = <0x0580000 0x7000000>; + }; + }; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "wan"; + nvmem-cells = <&macaddr_wan>; + nvmem-cell-names = "mac-address"; + }; + + port@1 { + reg = <1>; + label = "lan1"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + }; + + port@3 { + reg = <3>; + label = "lan3"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&pio { + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = <8>; + mediatek,pull-up-adv = <0>; /* bias-disable */ + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = <8>; + mediatek,pull-up-adv = <0>; /* bias-disable */ + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + status = "okay"; + + mediatek,mtd-eeprom = <&factory 0x0>; +}; + +&factory { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_wan: macaddr@a0024 { + reg = <0xa0024 0x6>; + }; + + macaddr_lan: macaddr@a002a { + reg = <0xa002a 0x6>; + }; +}; diff --git a/target/linux/mediatek/dts/mt7981b-qihoo-360t7.dts b/target/linux/mediatek/dts/mt7981b-qihoo-360t7.dts index d897697ef23..cd6f6b30c3e 100644 --- a/target/linux/mediatek/dts/mt7981b-qihoo-360t7.dts +++ b/target/linux/mediatek/dts/mt7981b-qihoo-360t7.dts @@ -74,7 +74,7 @@ }; &mdio_bus { - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u.dtsi b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u.dtsi index 7ab94f36230..d09ae2a3e78 100644 --- a/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u.dtsi +++ b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u.dtsi @@ -86,7 +86,7 @@ }; &mdio_bus { - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts b/target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts new file mode 100644 index 00000000000..112fd777f05 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts @@ -0,0 +1,331 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "mt7981.dtsi" + +/ { + model = "Zbtlink ZBT-Z8102AX"; + compatible = "zbtlink,zbt-z8102ax", "mediatek,mt7981"; + + aliases { + serial0 = &uart0; + led-boot = &led_status_green; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_green; + label-mac-device = &gmac0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 loglevel=8"; + }; + + memory { + reg = <0 0x40000000 0 0x40000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + + button-mesh { + label = "mesh"; + linux,code = ; + gpios = <&pio 0 GPIO_ACTIVE_HIGH>; + }; + + button-hub { + label = "hub"; + linux,code = ; + gpios = <&pio 12 GPIO_ACTIVE_HIGH>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: red { + label = "red:status"; + gpios = <&pio 9 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_STATUS; + }; + + led_status_green: green { + label = "green:status"; + gpios = <&pio 10 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_STATUS; + }; + + blue { + label = "blue:status"; + gpios = <&pio 11 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_STATUS; + }; + + 4g { + label = "blue:4g"; + gpios = <&pio 8 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_USB; + function-enumerator = <0>; + }; + + 4g2 { + label = "blue:4g2"; + gpios = <&pio 14 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_USB; + function-enumerator = <1>; + }; + }; + + watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&pio 2 GPIO_ACTIVE_HIGH>; + hw_algo = "toggle"; + hw_margin_ms = <1000>; + }; + + gpio-export { + compatible = "gpio-export"; + #size-cells = <0>; + + pcie { + gpio-export,name = "pcie_power"; + gpio-export,output = <1>; + gpios = <&pio 3 GPIO_ACTIVE_HIGH>; + }; + + 5g1 { + gpio-export,name = "5g1"; + gpio-export,output = <1>; + gpios = <&pio 4 GPIO_ACTIVE_HIGH>; + }; + + 5g2 { + gpio-export,name = "5g2"; + gpio-export,output = <1>; + gpios = <&pio 5 GPIO_ACTIVE_HIGH>; + }; + + sim1 { + gpio-export,name = "sim1"; + gpio-export,output = <1>; + gpios = <&pio 6 GPIO_ACTIVE_HIGH>; + }; + + sim2 { + gpio-export,name = "sim2"; + gpio-export,output = <1>; + gpios = <&pio 7 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + /* LAN */ + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_factory_4 2>; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + /* WAN */ + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "gmii"; + phy-handle = <&int_gbe_phy>; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_factory_4 3>; + }; +}; + +&mdio_bus { + switch: switch@1f { + compatible = "mediatek,mt7531"; + reg = <0x1f>; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + + spi_nand@0 { + compatible = "spi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + + spi-max-frequency = <52000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bl2"; + reg = <0x0000000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x100000 0x80000>; + }; + + partition@180000 { + label = "Factory"; + reg = <0x180000 0x200000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory: eeprom@0 { + reg = <0x0 0x1000>; + }; + + macaddr_factory_4: macaddr@4 { + compatible = "mac-base"; + reg = <0x4 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@380000 { + label = "FIP"; + reg = <0x380000 0x200000>; + read-only; + }; + + partition@580000 { + label = "ubi"; + reg = <0x580000 0x4000000>; + }; + }; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "lan4"; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&pio { + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = <8>; + bias-pull-up = <103>; + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = <8>; + bias-pull-down = <103>; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&xhci { + status = "okay"; +}; + +&wifi { + status = "okay"; + + nvmem-cells = <&eeprom_factory>; + nvmem-cell-names = "eeprom"; +}; diff --git a/target/linux/mediatek/dts/mt7986a-acer-predator-w6.dts b/target/linux/mediatek/dts/mt7986a-acer-predator-w6.dts index 35a2c30bb45..6bff786558b 100644 --- a/target/linux/mediatek/dts/mt7986a-acer-predator-w6.dts +++ b/target/linux/mediatek/dts/mt7986a-acer-predator-w6.dts @@ -229,7 +229,7 @@ mxl,led-config = <0x0 0x0 0x370 0x80>; }; - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; diff --git a/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts b/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts index ac854f10d13..2af18958bc5 100644 --- a/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts +++ b/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts @@ -136,7 +136,7 @@ mxl,led-config = <0x03f0 0x0 0x0 0x0>; }; - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; @@ -361,4 +361,4 @@ &usb_phy { status = "okay"; -}; \ No newline at end of file +}; diff --git a/target/linux/mediatek/dts/mt7986a-asus-tuf-ax6000.dts b/target/linux/mediatek/dts/mt7986a-asus-tuf-ax6000.dts index 2e9114f99c0..41e6d2471d0 100644 --- a/target/linux/mediatek/dts/mt7986a-asus-tuf-ax6000.dts +++ b/target/linux/mediatek/dts/mt7986a-asus-tuf-ax6000.dts @@ -142,7 +142,7 @@ mxl,led-config = <0x03f0 0x0 0x0 0x0>; }; - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; @@ -379,4 +379,4 @@ &usb_phy { status = "okay"; -}; \ No newline at end of file +}; diff --git a/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts b/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts index 2be1907f632..fded507039b 100644 --- a/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts +++ b/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts @@ -122,7 +122,7 @@ realtek,aldps-enable; }; - switch: switch@31 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 18 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi b/target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi index a1910e36d24..ddf332a0dcc 100644 --- a/target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi +++ b/target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi @@ -141,7 +141,7 @@ realtek,aldps-enable; }; - switch: switch@31 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/dts/mt7986a-xiaomi-redmi-router-ax6000.dtsi b/target/linux/mediatek/dts/mt7986a-xiaomi-redmi-router-ax6000.dtsi index a9b44f8df99..b2711eb7d7d 100644 --- a/target/linux/mediatek/dts/mt7986a-xiaomi-redmi-router-ax6000.dtsi +++ b/target/linux/mediatek/dts/mt7986a-xiaomi-redmi-router-ax6000.dtsi @@ -72,7 +72,7 @@ }; &mdio { - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/dts/mt7986a-zyxel-ex5601-t0-stock.dts b/target/linux/mediatek/dts/mt7986a-zyxel-ex5601-t0-stock.dts index 2469d3d77d1..331150d85db 100644 --- a/target/linux/mediatek/dts/mt7986a-zyxel-ex5601-t0-stock.dts +++ b/target/linux/mediatek/dts/mt7986a-zyxel-ex5601-t0-stock.dts @@ -199,7 +199,7 @@ reg = <6>; }; - switch@0 { + switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/dts/mt7986b-mercusys-mr90x-v1.dts b/target/linux/mediatek/dts/mt7986b-mercusys-mr90x-v1.dts index 89ec613a8d9..42250be19ac 100644 --- a/target/linux/mediatek/dts/mt7986b-mercusys-mr90x-v1.dts +++ b/target/linux/mediatek/dts/mt7986b-mercusys-mr90x-v1.dts @@ -120,7 +120,7 @@ reg = <6>; }; - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts index 1d3c575b7d4..d326c416a9d 100644 --- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts +++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts @@ -200,7 +200,7 @@ }; &mdio { - switch: switch@31 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; interrupt-controller; diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi index 1ab56e37f74..26d560bd4bc 100644 --- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi +++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi @@ -99,7 +99,7 @@ reg = <6>; }; - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 5 0>; diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts index 83d51916717..8cd094f7c3e 100644 --- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -108,7 +108,7 @@ phy-mode = "2500base-x"; }; - switch@0 { + switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 5 0>; diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi index 1ab56e37f74..26d560bd4bc 100644 --- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi +++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi @@ -99,7 +99,7 @@ reg = <6>; }; - switch: switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 5 0>; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index aad1d67ff6f..522e288ef54 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -12,7 +12,8 @@ mediatek_setup_interfaces() ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1 ;; asus,tuf-ax4200|\ - mediatek,mt7981-rfb) + mediatek,mt7981-rfb|\ + zbtlink,zbt-z8102ax) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1 ;; asus,tuf-ax6000) @@ -49,6 +50,7 @@ mediatek_setup_interfaces() ucidef_set_interfaces_lan_wan "lan0 lan1 lan2" eth1 ;; cetron,ct3003|\ + jcg,q30-pro|\ qihoo,360t7) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan ;; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches b/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches new file mode 100644 index 00000000000..ff32a3650cd --- /dev/null +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches @@ -0,0 +1,19 @@ +. /lib/functions/uci-defaults.sh + +board_config_update + +board=$(board_name) + +case "$board" in +zbtlink,zbt-z8103ax) + ucidef_add_gpio_switch "5g1" "Power 1st modem" "5g1" "1" + ucidef_add_gpio_switch "5g2" "Power 2nd modem" "5g2" "1" + ucidef_add_gpio_switch "pcie" "Power PCIe port" "pcie" "1" + ucidef_add_gpio_switch "sim1" "SIM 1" "sim1" "1" + ucidef_add_gpio_switch "sim2" "SIM 2" "sim2" "1" + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac index 395cc0f2dc5..b33d43c8c0d 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -65,6 +65,11 @@ case "$board" in [ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress ;; + jcg,q30-pro) + # Originally, phy1 is phy0 mac with LA bit set. However, this would conflict + # addresses on multiple VIFs with the other radio. Use label mac to set LA bit. + [ "$PHYNBR" = "1" ] && macaddr_setbit_la $(get_mac_label) > /sys${DEVPATH}/macaddress + ;; mercusys,mr90x-v1) addr=$(get_mac_binary "/tmp/tp_data/default-mac" 0) [ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress @@ -90,6 +95,7 @@ case "$board" in tplink,tl-xdr6088) [ "$PHYNBR" = "0" ] && get_mac_label > /sys${DEVPATH}/macaddress ;; + zbtlink,zbt-z8102ax|\ zyxel,ex5601-t0) addr=$(mtd_get_mac_binary "Factory" 0x4) [ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index b7b9d659932..cef1131ddb1 100755 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -112,6 +112,7 @@ platform_do_upgrade() { emmc_do_upgrade "$1" ;; h3c,magic-nx30-pro|\ + jcg,q30-pro|\ mediatek,mt7981-rfb|\ qihoo,360t7|\ tplink,tl-xdr4288|\ diff --git a/target/linux/mediatek/filogic/config-5.15 b/target/linux/mediatek/filogic/config-5.15 index 2ffc466b7c3..8c46b9ad2c5 100644 --- a/target/linux/mediatek/filogic/config-5.15 +++ b/target/linux/mediatek/filogic/config-5.15 @@ -169,6 +169,8 @@ CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GLOB=y CONFIG_GPIO_CDEV=y +CONFIG_GPIO_WATCHDOG=y +CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y CONFIG_GRO_CELLS=y CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDIRQS_SW_RESEND=y diff --git a/target/linux/mediatek/filogic/config-6.1 b/target/linux/mediatek/filogic/config-6.1 index 36cb9c1e4e6..0bd5e9cb708 100644 --- a/target/linux/mediatek/filogic/config-6.1 +++ b/target/linux/mediatek/filogic/config-6.1 @@ -187,6 +187,8 @@ CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GLOB=y CONFIG_GPIO_CDEV=y +CONFIG_GPIO_WATCHDOG=y +CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y CONFIG_GRO_CELLS=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 0ef3e945756..cd119b75a8d 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -330,6 +330,30 @@ define Device/h3c_magic-nx30-pro endef TARGET_DEVICES += h3c_magic-nx30-pro +define Device/jcg_q30-pro + DEVICE_VENDOR := JCG + DEVICE_MODEL := Q30 PRO + DEVICE_DTS := mt7981b-jcg-q30-pro + DEVICE_DTS_DIR := ../dts + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + KERNEL_IN_UBI := 1 + UBOOTENV_IN_UBI := 1 + IMAGES := sysupgrade.itb + KERNEL_INITRAMFS_SUFFIX := -recovery.itb + KERNEL := kernel-bin | gzip + KERNEL_INITRAMFS := kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k + IMAGE/sysupgrade.itb := append-kernel | \ + fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata + DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware + ARTIFACTS := preloader.bin bl31-uboot.fip + ARTIFACT/preloader.bin := mt7981-bl2 spim-nand-ddr3 + ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot jcg_q30-pro +endef +TARGET_DEVICES += jcg_q30-pro + define Device/netgear_wax220 DEVICE_VENDOR := NETGEAR DEVICE_MODEL := WAX220 @@ -704,6 +728,23 @@ endif endef TARGET_DEVICES += xiaomi_redmi-router-ax6000-ubootmod +define Device/zbtlink_zbt-z8102ax + DEVICE_VENDOR := Zbtlink + DEVICE_MODEL := ZBT-Z8102AX + DEVICE_DTS := mt7981b-zbtlink-zbt-z8102ax + DEVICE_DTS_DIR := ../dts + DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware kmod-usb-net-qmi-wwan kmod-usb-serial-option + KERNEL_IN_UBI := 1 + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + IMAGE_SIZE := 65536k + IMAGES += factory.bin + IMAGE/factory.bin := append-ubi | check-size $$(IMAGE_SIZE) + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata +endef +TARGET_DEVICES += zbtlink_zbt-z8102ax + define Device/zyxel_ex5601-t0-stock DEVICE_VENDOR := Zyxel DEVICE_MODEL := EX5601-T0 (stock layout) diff --git a/target/linux/mediatek/patches-6.1/010-v6.3-arm64-dts-mt7986-add-Bananapi-R3.patch b/target/linux/mediatek/patches-6.1/010-v6.3-arm64-dts-mt7986-add-Bananapi-R3.patch index b459e9dfe73..38f159c74ee 100644 --- a/target/linux/mediatek/patches-6.1/010-v6.3-arm64-dts-mt7986-add-Bananapi-R3.patch +++ b/target/linux/mediatek/patches-6.1/010-v6.3-arm64-dts-mt7986-add-Bananapi-R3.patch @@ -405,7 +405,7 @@ Signed-off-by: Matthias Brugger +}; + +&mdio { -+ switch: switch@31 { ++ switch: switch@1f { + compatible = "mediatek,mt7531"; + reg = <31>; + interrupt-controller; diff --git a/target/linux/mediatek/patches-6.1/220-v6.3-clk-mediatek-clk-gate-Propagate-struct-device-with-m.patch b/target/linux/mediatek/patches-6.1/220-v6.3-clk-mediatek-clk-gate-Propagate-struct-device-with-m.patch index e3292a067ce..af5715e1f5d 100644 --- a/target/linux/mediatek/patches-6.1/220-v6.3-clk-mediatek-clk-gate-Propagate-struct-device-with-m.patch +++ b/target/linux/mediatek/patches-6.1/220-v6.3-clk-mediatek-clk-gate-Propagate-struct-device-with-m.patch @@ -209,7 +209,7 @@ Signed-off-by: Stephen Boyd if (r) --- a/drivers/clk/mediatek/clk-mt2701.c +++ b/drivers/clk/mediatek/clk-mt2701.c -@@ -683,8 +683,8 @@ static int mtk_topckgen_init(struct plat +@@ -685,8 +685,8 @@ static int mtk_topckgen_init(struct plat mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, &mt2701_clk_lock, clk_data); @@ -220,7 +220,7 @@ Signed-off-by: Stephen Boyd return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); } -@@ -783,8 +783,8 @@ static int mtk_infrasys_init(struct plat +@@ -789,8 +789,8 @@ static int mtk_infrasys_init(struct plat } } @@ -231,9 +231,9 @@ Signed-off-by: Stephen Boyd mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs), infra_clk_data); -@@ -894,8 +894,8 @@ static int mtk_pericfg_init(struct platf - - clk_data = mtk_alloc_clk_data(CLK_PERI_NR); +@@ -902,8 +902,8 @@ static int mtk_pericfg_init(struct platf + if (!clk_data) + return -ENOMEM; - mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), - clk_data); @@ -397,9 +397,9 @@ Signed-off-by: Stephen Boyd &mt7622_clk_lock, clk_data); --- a/drivers/clk/mediatek/clk-mt7629-eth.c +++ b/drivers/clk/mediatek/clk-mt7629-eth.c -@@ -80,7 +80,8 @@ static int clk_mt7629_ethsys_init(struct - - clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK); +@@ -82,7 +82,8 @@ static int clk_mt7629_ethsys_init(struct + if (!clk_data) + return -ENOMEM; - mtk_clk_register_gates(node, eth_clks, CLK_ETH_NR_CLK, clk_data); + mtk_clk_register_gates(&pdev->dev, node, eth_clks, @@ -407,9 +407,9 @@ Signed-off-by: Stephen Boyd r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); if (r) -@@ -102,8 +103,8 @@ static int clk_mt7629_sgmiisys_init(stru - - clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK); +@@ -106,8 +107,8 @@ static int clk_mt7629_sgmiisys_init(stru + if (!clk_data) + return -ENOMEM; - mtk_clk_register_gates(node, sgmii_clks[id++], CLK_SGMII_NR_CLK, - clk_data); @@ -444,9 +444,9 @@ Signed-off-by: Stephen Boyd if (r) --- a/drivers/clk/mediatek/clk-mt7629.c +++ b/drivers/clk/mediatek/clk-mt7629.c -@@ -581,8 +581,8 @@ static int mtk_infrasys_init(struct plat - - clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); +@@ -585,8 +585,8 @@ static int mtk_infrasys_init(struct plat + if (!clk_data) + return -ENOMEM; - mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), - clk_data); @@ -455,9 +455,9 @@ Signed-off-by: Stephen Boyd mtk_clk_register_cpumuxes(node, infra_muxes, ARRAY_SIZE(infra_muxes), clk_data); -@@ -604,8 +604,8 @@ static int mtk_pericfg_init(struct platf - - clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); +@@ -610,8 +610,8 @@ static int mtk_pericfg_init(struct platf + if (!clk_data) + return -ENOMEM; - mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), - clk_data); @@ -466,7 +466,7 @@ Signed-off-by: Stephen Boyd mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base, &mt7629_clk_lock, clk_data); -@@ -631,7 +631,7 @@ static int mtk_apmixedsys_init(struct pl +@@ -637,7 +637,7 @@ static int mtk_apmixedsys_init(struct pl mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data); diff --git a/target/linux/mediatek/patches-6.1/221-v6.3-clk-mediatek-cpumux-Propagate-struct-device-where-po.patch b/target/linux/mediatek/patches-6.1/221-v6.3-clk-mediatek-cpumux-Propagate-struct-device-where-po.patch index 2333e722e19..223155c59b8 100644 --- a/target/linux/mediatek/patches-6.1/221-v6.3-clk-mediatek-cpumux-Propagate-struct-device-where-po.patch +++ b/target/linux/mediatek/patches-6.1/221-v6.3-clk-mediatek-cpumux-Propagate-struct-device-where-po.patch @@ -78,7 +78,7 @@ Signed-off-by: Stephen Boyd --- a/drivers/clk/mediatek/clk-mt2701.c +++ b/drivers/clk/mediatek/clk-mt2701.c -@@ -757,7 +757,7 @@ static void __init mtk_infrasys_init_ear +@@ -761,7 +761,7 @@ static void __init mtk_infrasys_init_ear mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs), infra_clk_data); @@ -114,7 +114,7 @@ Signed-off-by: Stephen Boyd clk_data); --- a/drivers/clk/mediatek/clk-mt7629.c +++ b/drivers/clk/mediatek/clk-mt7629.c -@@ -584,8 +584,8 @@ static int mtk_infrasys_init(struct plat +@@ -588,8 +588,8 @@ static int mtk_infrasys_init(struct plat mtk_clk_register_gates(&pdev->dev, node, infra_clks, ARRAY_SIZE(infra_clks), clk_data); diff --git a/target/linux/mediatek/patches-6.1/222-v6.3-clk-mediatek-clk-mtk-Propagate-struct-device-for-com.patch b/target/linux/mediatek/patches-6.1/222-v6.3-clk-mediatek-clk-mtk-Propagate-struct-device-for-com.patch index 01eed6cc01b..eca1b614cdf 100644 --- a/target/linux/mediatek/patches-6.1/222-v6.3-clk-mediatek-clk-mtk-Propagate-struct-device-for-com.patch +++ b/target/linux/mediatek/patches-6.1/222-v6.3-clk-mediatek-clk-mtk-Propagate-struct-device-for-com.patch @@ -26,7 +26,7 @@ Signed-off-by: Stephen Boyd --- a/drivers/clk/mediatek/clk-mt2701.c +++ b/drivers/clk/mediatek/clk-mt2701.c -@@ -677,8 +677,9 @@ static int mtk_topckgen_init(struct plat +@@ -679,8 +679,9 @@ static int mtk_topckgen_init(struct plat mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs), clk_data); @@ -38,7 +38,7 @@ Signed-off-by: Stephen Boyd mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, &mt2701_clk_lock, clk_data); -@@ -897,8 +898,9 @@ static int mtk_pericfg_init(struct platf +@@ -905,8 +906,9 @@ static int mtk_pericfg_init(struct platf mtk_clk_register_gates(&pdev->dev, node, peri_clks, ARRAY_SIZE(peri_clks), clk_data); @@ -104,7 +104,7 @@ Signed-off-by: Stephen Boyd r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); --- a/drivers/clk/mediatek/clk-mt7629.c +++ b/drivers/clk/mediatek/clk-mt7629.c -@@ -564,8 +564,9 @@ static int mtk_topckgen_init(struct plat +@@ -566,8 +566,9 @@ static int mtk_topckgen_init(struct plat mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); @@ -116,7 +116,7 @@ Signed-off-by: Stephen Boyd clk_prepare_enable(clk_data->hws[CLK_TOP_AXI_SEL]->clk); clk_prepare_enable(clk_data->hws[CLK_TOP_MEM_SEL]->clk); -@@ -607,7 +608,8 @@ static int mtk_pericfg_init(struct platf +@@ -613,7 +614,8 @@ static int mtk_pericfg_init(struct platf mtk_clk_register_gates(&pdev->dev, node, peri_clks, ARRAY_SIZE(peri_clks), clk_data); diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/br200-wp.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/br200-wp.dts index a4bc10ff388..f7d7b4cf08c 100644 --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/br200-wp.dts +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/br200-wp.dts @@ -87,12 +87,16 @@ label = "hw-info"; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_hwinfo_0: macaddr@0 { - reg = <0x0 0x6>; + macaddr_hwinfo_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; }; }; @@ -167,43 +171,39 @@ reg = <1>; label = "lan1"; phy-handle = <&phy_port1>; - nvmem-cells = <&macaddr_hwinfo_0>; + nvmem-cells = <&macaddr_hwinfo_0 2>; nvmem-cell-names = "mac-address"; - mac-address-increment = <2>; }; port@2 { reg = <2>; label = "lan2"; phy-handle = <&phy_port2>; - nvmem-cells = <&macaddr_hwinfo_0>; + nvmem-cells = <&macaddr_hwinfo_0 3>; nvmem-cell-names = "mac-address"; - mac-address-increment = <3>; }; port@3 { reg = <3>; label = "lan3"; phy-handle = <&phy_port3>; - nvmem-cells = <&macaddr_hwinfo_0>; + nvmem-cells = <&macaddr_hwinfo_0 4>; nvmem-cell-names = "mac-address"; - mac-address-increment = <4>; }; port@4 { reg = <4>; label = "lan4"; phy-handle = <&phy_port4>; - nvmem-cells = <&macaddr_hwinfo_0>; + nvmem-cells = <&macaddr_hwinfo_0 5>; nvmem-cell-names = "mac-address"; - mac-address-increment = <5>; }; port@5 { reg = <5>; label = "wan"; phy-handle = <&phy_port5>; - nvmem-cells = <&macaddr_hwinfo_0>; + nvmem-cells = <&macaddr_hwinfo_0 0>; nvmem-cell-names = "mac-address"; }; @@ -232,7 +232,7 @@ enet0: ethernet@b0000 { status = "okay"; phy-connection-type = "rgmii-id"; - nvmem-cells = <&macaddr_hwinfo_0>; + nvmem-cells = <&macaddr_hwinfo_0 0>; nvmem-cell-names = "mac-address"; fixed-link { @@ -286,9 +286,8 @@ reg = <0x0000 0 0 0 0>; #gpio-cells = <2>; gpio-controller; - nvmem-cells = <&macaddr_hwinfo_0>; + nvmem-cells = <&macaddr_hwinfo_0 16>; nvmem-cell-names = "mac-address"; - mac-address-increment = <16>; }; }; }; @@ -326,7 +325,7 @@ / { chosen { - linux,stdout-path = "/soc@ffe00000/serial@4500"; + stdout-path = "/soc@ffe00000/serial@4500"; }; cpus { diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts index a807403a07a..f74aca58c0d 100644 --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts @@ -76,12 +76,16 @@ label = "hw-info"; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_hwinfo_0: macaddr@0 { - reg = <0x0 0x6>; + macaddr_hwinfo_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; }; }; @@ -229,7 +233,7 @@ status = "okay"; phy-handle = <&phy0>; phy-connection-type = "rgmii-id"; - nvmem-cells = <&macaddr_hwinfo_0>; + nvmem-cells = <&macaddr_hwinfo_0 0>; nvmem-cell-names = "mac-address"; }; @@ -241,9 +245,8 @@ status = "okay"; phy-handle = <&phy1>; phy-connection-type = "rgmii-id"; - nvmem-cells = <&macaddr_hwinfo_0>; + nvmem-cells = <&macaddr_hwinfo_0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; }; gpio0: gpio-controller@fc00 { diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts index c54cb53f945..ef46d8f14af 100644 --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts @@ -57,12 +57,14 @@ label = "u-boot"; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_uboot_4fc00: macaddr@4fc00 { - reg = <0x4fc00 0x6>; + macaddr_uboot_4fc00: macaddr@4fc00 { + reg = <0x4fc00 0x6>; + }; }; }; diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts index a347900e5df..ef40a4d2a3d 100644 --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts @@ -20,7 +20,7 @@ chosen { bootargs-override = "console=ttyS0,115200"; - linux,stdout-path = &serial0; + stdout-path = &serial0; }; memory { diff --git a/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network b/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network index 5c176d4963d..b9ac2bb1ae0 100644 --- a/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network +++ b/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network @@ -12,7 +12,8 @@ mvebu_setup_interfaces() local board="$1" case "$board" in - ctera,c200-v2) + ctera,c200-v2|\ + synology,ds213j) ucidef_set_interface_lan "eth0" "dhcp" ;; cznic,turris-omnia) diff --git a/target/linux/mvebu/cortexa9/config-5.15 b/target/linux/mvebu/cortexa9/config-5.15 index e666dd486fb..266596d6384 100644 --- a/target/linux/mvebu/cortexa9/config-5.15 +++ b/target/linux/mvebu/cortexa9/config-5.15 @@ -1,4 +1,7 @@ CONFIG_LED_TRIGGER_PHY=y CONFIG_MTD_SPLIT_SEIL_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_VIRT_CONCAT=y CONFIG_PHY_MVEBU_A38X_COMPHY=y +CONFIG_POWER_RESET_QNAP=y CONFIG_RTC_DRV_MV=y diff --git a/target/linux/mvebu/cortexa9/config-6.1 b/target/linux/mvebu/cortexa9/config-6.1 index b2625c3b32e..7f825a806b1 100644 --- a/target/linux/mvebu/cortexa9/config-6.1 +++ b/target/linux/mvebu/cortexa9/config-6.1 @@ -4,6 +4,9 @@ CONFIG_CURRENT_POINTER_IN_TPIDRURO=y CONFIG_IRQSTACKS=y CONFIG_LED_TRIGGER_PHY=y CONFIG_MTD_SPLIT_SEIL_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_VIRT_CONCAT=y CONFIG_PHY_MVEBU_A38X_COMPHY=y +CONFIG_POWER_RESET_QNAP=y CONFIG_RTC_DRV_MV=y CONFIG_THREAD_INFO_IN_TASK=y diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-380-iij-sa-w2.dts b/target/linux/mvebu/files/arch/arm/boot/dts/armada-380-iij-sa-w2.dts index d2483611ae6..09604e20176 100644 --- a/target/linux/mvebu/files/arch/arm/boot/dts/armada-380-iij-sa-w2.dts +++ b/target/linux/mvebu/files/arch/arm/boot/dts/armada-380-iij-sa-w2.dts @@ -352,7 +352,6 @@ }; partition@110000 { - compatible = "nvmem-cells"; reg = <0x110000 0xf0000>; label = "board_info"; read-only; diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-30e.dts b/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-30e.dts index da6db4755a9..8788f022f23 100644 --- a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-30e.dts +++ b/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-30e.dts @@ -52,41 +52,36 @@ port@0 { reg = <0>; label = "wan"; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; }; port@1 { reg = <1>; label = "lan4"; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 5>; nvmem-cell-names = "mac-address"; - mac-address-increment = <5>; }; port@2 { reg = <2>; label = "lan3"; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 4>; nvmem-cell-names = "mac-address"; - mac-address-increment = <4>; }; port@3 { reg = <3>; label = "lan2"; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 3>; nvmem-cell-names = "mac-address"; - mac-address-increment = <3>; }; port@4 { reg = <4>; label = "lan1"; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 2>; nvmem-cell-names = "mac-address"; - mac-address-increment = <2>; }; port@6 { diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-50e.dts b/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-50e.dts index 6030f4dabec..4deca093c2d 100644 --- a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-50e.dts +++ b/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-50e.dts @@ -56,9 +56,8 @@ phy-connection-type = "sgmii"; buffer-manager = <&bm>; bm,pool-long = <2>; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <1>; }; ð2 { @@ -68,9 +67,8 @@ phy-connection-type = "sgmii"; buffer-manager = <&bm>; bm,pool-long = <3>; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 2>; nvmem-cell-names = "mac-address"; - mac-address-increment = <2>; }; &mdio { @@ -126,41 +124,36 @@ port@0 { reg = <0>; label = "lan5"; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 7>; nvmem-cell-names = "mac-address"; - mac-address-increment = <7>; }; port@1 { reg = <1>; label = "lan4"; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 6>; nvmem-cell-names = "mac-address"; - mac-address-increment = <6>; }; port@2 { reg = <2>; label = "lan3"; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 5>; nvmem-cell-names = "mac-address"; - mac-address-increment = <5>; }; port@3 { reg = <3>; label = "lan2"; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 4>; nvmem-cell-names = "mac-address"; - mac-address-increment = <4>; }; port@4 { reg = <4>; label = "lan1"; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 3>; nvmem-cell-names = "mac-address"; - mac-address-increment = <3>; }; port@6 { diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-x0e.dtsi b/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-x0e.dtsi index 9b3b1f08fce..91458299a20 100644 --- a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-x0e.dtsi +++ b/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-fortinet-fg-x0e.dtsi @@ -211,7 +211,7 @@ buffer-manager = <&bm>; bm,pool-long = <0>; bm,pool-short = <1>; - nvmem-cells = <&macaddr_bdinfo_d880>; + nvmem-cells = <&macaddr_bdinfo_d880 0>; nvmem-cell-names = "mac-address"; fixed-link { @@ -285,12 +285,16 @@ label = "board-info"; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_bdinfo_d880: macaddr@d880 { - reg = <0xd880 0x6>; + macaddr_bdinfo_d880: macaddr@d880 { + compatible = "mac-base"; + reg = <0xd880 0x6>; + #nvmem-cell-cells = <1>; + }; }; }; diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-nas1dual.dts b/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-nas1dual.dts index d14ea8b94e3..494487a8b41 100644 --- a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-nas1dual.dts +++ b/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-nas1dual.dts @@ -252,12 +252,14 @@ label = "u-boot"; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_uboot_fffa8: macaddr@fffa8 { - reg = <0xfffa8 0x6>; + macaddr_uboot_fffa8: macaddr@fffa8 { + reg = <0xfffa8 0x6>; + }; }; }; diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts index 8d163059a00..22dcbfac35f 100644 --- a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts +++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts @@ -104,6 +104,20 @@ label = "factory"; reg = <0xf8000 0x8000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_factory_6: macaddr@6 { + reg = <0x6 0x6>; + }; + }; }; partition@100000 { @@ -231,17 +245,3 @@ full-duplex; }; }; - -&factory { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_factory_0: macaddr@0 { - reg = <0x0 0x6>; - }; - - macaddr_factory_6: macaddr@6 { - reg = <0x6 0x6>; - }; -}; diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk index 3234d62cd99..a49401d904c 100644 --- a/target/linux/mvebu/image/cortexa9.mk +++ b/target/linux/mvebu/image/cortexa9.mk @@ -388,3 +388,22 @@ define Device/solidrun_clearfog-pro-a1 SUPPORTED_DEVICES += armada-388-clearfog armada-388-clearfog-pro endef TARGET_DEVICES += solidrun_clearfog-pro-a1 + +define Device/synology_ds213j + DEVICE_VENDOR := Synology + DEVICE_MODEL := DS213j + KERNEL_SIZE := 6912k + IMAGE_SIZE := 7168k + FILESYSTEMS := squashfs ubifs + KERNEL := kernel-bin | append-dtb | uImage none + KERNEL_INITRAMFS := kernel-bin | append-dtb | uImage none + DEVICE_DTS := armada-370-synology-ds213j + IMAGES := sysupgrade.bin + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | \ + check-size | append-metadata + DEVICE_PACKAGES := \ + kmod-rtc-s35390a kmod-hwmon-gpiofan kmod-hwmon-drivetemp \ + kmod-md-raid0 kmod-md-raid1 kmod-md-mod e2fsprogs mdadm \ + -ppp -kmod-nft-offload -firewall4 -dnsmasq -odhcpd-ipv6only +endef +TARGET_DEVICES += synology_ds213j diff --git a/target/linux/mvebu/patches-5.15/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch b/target/linux/mvebu/patches-5.15/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch new file mode 100644 index 00000000000..280fc5957e4 --- /dev/null +++ b/target/linux/mvebu/patches-5.15/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch @@ -0,0 +1,134 @@ +--- a/arch/arm/boot/dts/armada-370-synology-ds213j.dts ++++ b/arch/arm/boot/dts/armada-370-synology-ds213j.dts +@@ -31,6 +31,7 @@ + + chosen { + stdout-path = "serial0:115200n8"; ++ append-rootblock = "nullparameter="; /* override the bootloader args */ + }; + + memory@0 { +@@ -94,6 +95,8 @@ + status = "okay"; + phy = <&phy1>; + phy-mode = "sgmii"; ++ nvmem-cells = <&macaddr_vendor_0>; ++ nvmem-cell-names = "mac-address"; + }; + + sata@a0000 { +@@ -175,6 +178,24 @@ + gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>; + }; + }; ++ ++ virtual_flash { ++ compatible = "mtd-concat"; ++ ++ devices = <&mtd_kernel &mtd_gap &mtd_gap2>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ compatible = "openwrt,uimage", "denx,uimage"; ++ label = "firmware"; ++ reg = <0x0 0x0>; ++ }; ++ }; ++ }; + }; + + &mdio { +@@ -265,48 +286,52 @@ + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <20000000>; + +- /* +- * Warning! +- * +- * Synology u-boot uses its compiled-in environment +- * and it seems Synology did not care to change u-boot +- * default configuration in order to allow saving a +- * modified environment at a sensible location. So, +- * if you do a 'saveenv' under u-boot, your modified +- * environment will be saved at 1MB after the start +- * of the flash, i.e. in the middle of the uImage. +- * For that reason, it is strongly advised not to +- * change the default environment, unless you know +- * what you are doing. +- */ +- partition@0 { /* u-boot */ +- label = "RedBoot"; +- reg = <0x00000000 0x000c0000>; /* 768KB */ +- }; ++ partitions { ++ compatible = "fixed-partitions"; + +- partition@c0000 { /* uImage */ +- label = "zImage"; +- reg = <0x000c0000 0x002d0000>; /* 2880KB */ +- }; ++ partition@0 { /* u-boot */ ++ label = "u-boot"; ++ reg = <0x00000000 0x000c0000>; /* 768KB */ ++ read-only; ++ }; + +- partition@390000 { /* uInitramfs */ +- label = "rd.gz"; +- reg = <0x00390000 0x00440000>; /* 4250KB */ +- }; ++ mtd_gap: partition@c0000 { /* gap */ ++ label = "gap"; ++ reg = <0x000c0000 0x00040000>; /* 256KB */ ++ }; + +- partition@7d0000 { /* MAC address and serial number */ +- label = "vendor"; +- reg = <0x007d0000 0x00010000>; /* 64KB */ +- }; ++ partition@100000 { /* u-boot-env */ ++ label = "u-boot-env"; ++ reg = <0x00100000 0x00010000>; /* 64KB */ ++ }; + +- partition@7e0000 { +- label = "RedBoot config"; +- reg = <0x007e0000 0x00010000>; /* 64KB */ +- }; ++ mtd_kernel: partition@110000 { ++ label = "kernel"; ++ reg = <0x00110000 0x006c0000>; /* 6912KB */ ++ }; + +- partition@7f0000 { +- label = "FIS directory"; +- reg = <0x007f0000 0x00010000>; /* 64KB */ ++ partition@7d0000 { /* MAC address and serial number */ ++ reg = <0x007d0000 0x00010000>; /* 64KB */ ++ label = "vendor"; ++ read-only; ++ ++ compatible = "nvmem-cells"; ++ ++ nvmem-layout { ++ compatible = "fixed-layout"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ macaddr_vendor_0: macaddr@0 { ++ reg = <0x0 0x6>; ++ }; ++ }; ++ }; ++ ++ mtd_gap2: partition@7e0000 { ++ label = "gap2"; ++ reg = <0x007e0000 0x00020000>; /* 128KB */ ++ }; + }; + }; + }; diff --git a/target/linux/mvebu/patches-6.1/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch b/target/linux/mvebu/patches-6.1/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch new file mode 100644 index 00000000000..280fc5957e4 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch @@ -0,0 +1,134 @@ +--- a/arch/arm/boot/dts/armada-370-synology-ds213j.dts ++++ b/arch/arm/boot/dts/armada-370-synology-ds213j.dts +@@ -31,6 +31,7 @@ + + chosen { + stdout-path = "serial0:115200n8"; ++ append-rootblock = "nullparameter="; /* override the bootloader args */ + }; + + memory@0 { +@@ -94,6 +95,8 @@ + status = "okay"; + phy = <&phy1>; + phy-mode = "sgmii"; ++ nvmem-cells = <&macaddr_vendor_0>; ++ nvmem-cell-names = "mac-address"; + }; + + sata@a0000 { +@@ -175,6 +178,24 @@ + gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>; + }; + }; ++ ++ virtual_flash { ++ compatible = "mtd-concat"; ++ ++ devices = <&mtd_kernel &mtd_gap &mtd_gap2>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ compatible = "openwrt,uimage", "denx,uimage"; ++ label = "firmware"; ++ reg = <0x0 0x0>; ++ }; ++ }; ++ }; + }; + + &mdio { +@@ -265,48 +286,52 @@ + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <20000000>; + +- /* +- * Warning! +- * +- * Synology u-boot uses its compiled-in environment +- * and it seems Synology did not care to change u-boot +- * default configuration in order to allow saving a +- * modified environment at a sensible location. So, +- * if you do a 'saveenv' under u-boot, your modified +- * environment will be saved at 1MB after the start +- * of the flash, i.e. in the middle of the uImage. +- * For that reason, it is strongly advised not to +- * change the default environment, unless you know +- * what you are doing. +- */ +- partition@0 { /* u-boot */ +- label = "RedBoot"; +- reg = <0x00000000 0x000c0000>; /* 768KB */ +- }; ++ partitions { ++ compatible = "fixed-partitions"; + +- partition@c0000 { /* uImage */ +- label = "zImage"; +- reg = <0x000c0000 0x002d0000>; /* 2880KB */ +- }; ++ partition@0 { /* u-boot */ ++ label = "u-boot"; ++ reg = <0x00000000 0x000c0000>; /* 768KB */ ++ read-only; ++ }; + +- partition@390000 { /* uInitramfs */ +- label = "rd.gz"; +- reg = <0x00390000 0x00440000>; /* 4250KB */ +- }; ++ mtd_gap: partition@c0000 { /* gap */ ++ label = "gap"; ++ reg = <0x000c0000 0x00040000>; /* 256KB */ ++ }; + +- partition@7d0000 { /* MAC address and serial number */ +- label = "vendor"; +- reg = <0x007d0000 0x00010000>; /* 64KB */ +- }; ++ partition@100000 { /* u-boot-env */ ++ label = "u-boot-env"; ++ reg = <0x00100000 0x00010000>; /* 64KB */ ++ }; + +- partition@7e0000 { +- label = "RedBoot config"; +- reg = <0x007e0000 0x00010000>; /* 64KB */ +- }; ++ mtd_kernel: partition@110000 { ++ label = "kernel"; ++ reg = <0x00110000 0x006c0000>; /* 6912KB */ ++ }; + +- partition@7f0000 { +- label = "FIS directory"; +- reg = <0x007f0000 0x00010000>; /* 64KB */ ++ partition@7d0000 { /* MAC address and serial number */ ++ reg = <0x007d0000 0x00010000>; /* 64KB */ ++ label = "vendor"; ++ read-only; ++ ++ compatible = "nvmem-cells"; ++ ++ nvmem-layout { ++ compatible = "fixed-layout"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ macaddr_vendor_0: macaddr@0 { ++ reg = <0x0 0x6>; ++ }; ++ }; ++ }; ++ ++ mtd_gap2: partition@7e0000 { ++ label = "gap2"; ++ reg = <0x007e0000 0x00020000>; /* 128KB */ ++ }; + }; + }; + }; diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts index f8d511b5990..401aafe1674 100644 --- a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts +++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts @@ -14,7 +14,7 @@ status = "okay"; phy-mode = "sgmii"; phy-handle = <&phy4>; - nvmem-cells = <&macaddr_eeprom_0>; + nvmem-cells = <&macaddr_eeprom_0 0>; nvmem-cell-names = "mac-address"; }; }; diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-6p.dts b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-6p.dts index f354d08199a..270e2a32648 100644 --- a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-6p.dts +++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-6p.dts @@ -32,7 +32,7 @@ status = "okay"; phy-mode = "sgmii"; phy-handle = <&phy4>; - nvmem-cells = <&macaddr_eeprom_0>; + nvmem-cells = <&macaddr_eeprom_0 0>; nvmem-cell-names = "mac-address"; }; }; @@ -45,9 +45,8 @@ status = "okay"; phy-mode = "sgmii"; phy-handle = <&phy8>; - nvmem-cells = <&macaddr_eeprom_0>; + nvmem-cells = <&macaddr_eeprom_0 4>; nvmem-cell-names = "mac-address"; - mac-address-increment = <(4)>; }; ethernet@1 { @@ -55,9 +54,8 @@ status = "okay"; phy-mode = "sgmii"; phy-handle = <&phy9>; - nvmem-cells = <&macaddr_eeprom_0>; + nvmem-cells = <&macaddr_eeprom_0 5>; nvmem-cell-names = "mac-address"; - mac-address-increment = <(5)>; }; }; }; diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi index 9be52f91759..ad73a08a1e2 100644 --- a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi +++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi @@ -117,16 +117,20 @@ }; partition@400000 { - compatible = "nvmem-cells"; - reg = <0x400000 0x10000>; label = "eeprom"; read-only; + reg = <0x400000 0x10000>; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - macaddr_eeprom_0: macaddr@0 { - reg = <0x0 0x6>; + macaddr_eeprom_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; }; }; }; @@ -194,9 +198,8 @@ status = "okay"; phy-mode = "sgmii"; phy-handle = <&phy5>; - nvmem-cells = <&macaddr_eeprom_0>; + nvmem-cells = <&macaddr_eeprom_0 1>; nvmem-cell-names = "mac-address"; - mac-address-increment = <(1)>; }; ethernet@2 { @@ -204,9 +207,8 @@ status = "okay"; phy-mode = "sgmii"; phy-handle = <&phy6>; - nvmem-cells = <&macaddr_eeprom_0>; + nvmem-cells = <&macaddr_eeprom_0 2>; nvmem-cell-names = "mac-address"; - mac-address-increment = <(2)>; }; ethernet@3 { @@ -214,10 +216,8 @@ status = "okay"; phy-mode = "sgmii"; phy-handle = <&phy7>; - nvmem-cells = <&macaddr_eeprom_0>; + nvmem-cells = <&macaddr_eeprom_0 3>; nvmem-cell-names = "mac-address"; - mac-address-increment = <(3)>; }; }; }; - diff --git a/target/linux/qualcommax/patches-6.1/0100-clk-qcom-clk-rcg2-introduce-support-for-multiple-con.patch b/target/linux/qualcommax/patches-6.1/0100-clk-qcom-clk-rcg2-introduce-support-for-multiple-con.patch index 5713775948d..9aa0a7952c9 100644 --- a/target/linux/qualcommax/patches-6.1/0100-clk-qcom-clk-rcg2-introduce-support-for-multiple-con.patch +++ b/target/linux/qualcommax/patches-6.1/0100-clk-qcom-clk-rcg2-introduce-support-for-multiple-con.patch @@ -64,7 +64,7 @@ Signed-off-by: Christian Marangi /** --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c -@@ -209,11 +209,60 @@ clk_rcg2_recalc_rate(struct clk_hw *hw, +@@ -203,11 +203,60 @@ clk_rcg2_recalc_rate(struct clk_hw *hw, return __clk_rcg2_recalc_rate(hw, parent_rate, cfg); } @@ -125,7 +125,7 @@ Signed-off-by: Christian Marangi struct clk_hw *p; struct clk_rcg2 *rcg = to_clk_rcg2(hw); int index; -@@ -232,7 +281,15 @@ static int _freq_tbl_determine_rate(stru +@@ -226,7 +275,15 @@ static int _freq_tbl_determine_rate(stru if (!f) return -EINVAL; @@ -142,7 +142,7 @@ Signed-off-by: Christian Marangi if (index < 0) return index; -@@ -242,18 +299,18 @@ static int _freq_tbl_determine_rate(stru +@@ -236,18 +293,18 @@ static int _freq_tbl_determine_rate(stru return -EINVAL; if (clk_flags & CLK_SET_RATE_PARENT) { @@ -167,7 +167,7 @@ Signed-off-by: Christian Marangi rate = tmp; } } else { -@@ -261,7 +318,7 @@ static int _freq_tbl_determine_rate(stru +@@ -255,7 +312,7 @@ static int _freq_tbl_determine_rate(stru } req->best_parent_hw = p; req->best_parent_rate = rate; @@ -176,7 +176,7 @@ Signed-off-by: Christian Marangi return 0; } -@@ -357,6 +414,7 @@ static int __clk_rcg2_set_rate(struct cl +@@ -351,6 +408,7 @@ static int __clk_rcg2_set_rate(struct cl { struct clk_rcg2 *rcg = to_clk_rcg2(hw); const struct freq_tbl *f; @@ -184,7 +184,7 @@ Signed-off-by: Christian Marangi switch (policy) { case FLOOR: -@@ -372,7 +430,15 @@ static int __clk_rcg2_set_rate(struct cl +@@ -366,7 +424,15 @@ static int __clk_rcg2_set_rate(struct cl if (!f) return -EINVAL; diff --git a/target/linux/ramips/dts/mt7620a_rostelecom_rt-fl-1.dts b/target/linux/ramips/dts/mt7620a_rostelecom_rt-fl-1.dts new file mode 100644 index 00000000000..14081ba72ef --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_rostelecom_rt-fl-1.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7620a_sercomm_cpj.dtsi" + +/ { + compatible = "rostelecom,rt-fl-1", "ralink,mt7620a-soc"; + model = "Rostelecom RT-FL-1"; +}; diff --git a/target/linux/ramips/dts/mt7620a_rostelecom_s1010.dts b/target/linux/ramips/dts/mt7620a_rostelecom_s1010.dts new file mode 100644 index 00000000000..37ce9eda41f --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_rostelecom_s1010.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7620a_sercomm_cpj.dtsi" + +/ { + compatible = "rostelecom,s1010", "ralink,mt7620a-soc"; + model = "Rostelecom S1010"; +}; diff --git a/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi b/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi new file mode 100644 index 00000000000..e903f9f7298 --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi @@ -0,0 +1,309 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7620a.dtsi" + +#include +#include +#include + +/ { + aliases { + label-mac-device = ðernet; + + led-boot = &status_green; + led-failsafe = &status_amber; + led-running = &status_green; + led-upgrade = &status_amber; + }; + + keys { + compatible = "gpio-keys"; + + button-0 { + label = "reset"; + linux,code = ; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + button-1 { + label = "wps"; + linux,code = ; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + + status_green: led-0 { + label = "green:status"; + gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_STATUS; + }; + + status_amber: led-1 { + label = "amber:status"; + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_STATUS; + }; + + led-2 { + color = ; + function = LED_FUNCTION_WAN; + gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + }; + + led-3 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + }; + + led-4 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + }; + + led-5 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; + }; + + led-6 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <4>; + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; + }; + + led-7 { + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <24>; + gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + }; + + virtual_flash { + compatible = "mtd-concat"; + + devices = <&fwconcat0 &fwconcat1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + compatible = "openwrt,uimage"; + /* sercomm krnl hdr with fw chksums */ + openwrt,offset = <0x100>; + label = "firmware"; + reg = <0x0 0x0>; + }; + }; + }; +}; + +ðernet { + nvmem-cells = <&macaddr_label 0>; + nvmem-cell-names = "mac-address"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&pcie { + status = "okay"; +}; + +/* mt7612 */ +&pcie0 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + ieee80211-freq-limit = <5000000 6000000>; + + nvmem-cells = <&eeprom_factory_8000>, <&macaddr_label 6>; + nvmem-cell-names = "eeprom", "mac-address"; + + /* 5 GHz WLAN phy green led */ + led { + led-sources = <2>; + led-active-low; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <70000000>; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* whole flash */ + partition@0_all { + label = "ALL"; + reg = <0x0 0x1000000>; + read-only; + }; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "ftd_and_bootflag"; + reg = <0x30000 0x20000>; + }; + + partition@50000 { + label = "Factory"; + reg = <0x50000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x200>; + }; + + eeprom_factory_8000: eeprom@8000 { + reg = <0x8000 0x200>; + }; + }; + }; + + partition@60000 { + label = "SC Nvram(permanent data)"; + reg = <0x60000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_label: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + fwconcat0: partition@70000 { + label = "Firmware"; + reg = <0x70000 0x790000>; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Kernel"; + reg = <0x0 0x200000>; + }; + + partition@200000 { + label = "RootFS"; + reg = <0x200000 0x590000>; + }; + }; + + fwconcat1: partition@800000 { + label = "Firmware2"; + reg = <0x800000 0x790000>; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Kernel2"; + reg = <0x0 0x200000>; + }; + + partition@200000 { + label = "RootFS2"; + reg = <0x200000 0x590000>; + }; + }; + + partition@f90000 { + label = "MAC IP"; + reg = <0xf90000 0x10000>; + read-only; + }; + + partition@fa0000 { + label = "Critical Log"; + reg = <0xfa0000 0x10000>; + read-only; + }; + + partition@fb000 { + label = "Critical Log Bak"; + reg = <0xfb0000 0x10000>; + read-only; + }; + + partition@fc0000 { + label = "Xml Config"; + reg = <0xfc0000 0x20000>; + read-only; + }; + + partition@fe0000 { + label = "Xml Config Bak"; + reg = <0xfe0000 0x20000>; + read-only; + }; + }; + }; +}; + +&state_default { + gpio { + groups = "ephy", "rgmii1", "uartf", "wled"; + function = "gpio"; + }; +}; + +/* mt7620 */ +&wmac { + nvmem-cells = <&eeprom_factory_0>, <&macaddr_label 2>; + nvmem-cell-names = "eeprom", "mac-address"; +}; diff --git a/target/linux/ramips/dts/mt7621_dlink_covr-x1860-a1.dts b/target/linux/ramips/dts/mt7621_dlink_covr-x1860-a1.dts new file mode 100644 index 00000000000..c06c5e36baa --- /dev/null +++ b/target/linux/ramips/dts/mt7621_dlink_covr-x1860-a1.dts @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include +#include + +/ { + compatible = "dlink,covr-x1860-a1", "mediatek,mt7621-soc"; + model = "D-Link COVR-X1860 A1"; + + aliases { + led-boot = &status_orange; + led-failsafe = &status_red; + led-running = &status_white; + led-upgrade = &status_red; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + status_white: power { + label = "white:status"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + status_orange: status_orange { + label = "orange:status"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + status_red: status_red { + label = "red:status"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + }; + + virtual_flash { + compatible = "mtd-concat"; + + devices = <&fwconcat0 &fwconcat1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x0 0x0>; + }; + }; + }; +}; + +&nand { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "config"; + reg = <0x80000 0x80000>; + read-only; + }; + + factory: partition@100000 { + label = "factory"; + reg = <0x100000 0x80000>; + read-only; + }; + + partition@180000 { + label = "config2"; + reg = <0x180000 0x40000>; + read-only; + }; + + partition@1c0000 { + label = "kernel"; + reg = <0x1c0000 0x800000>; + }; + + fwconcat0: partition@9c0000 { + label = "fwconcat0"; + reg = <0x9c0000 0x2000000>; + }; + + partition@29c0000 { + label = "kernel2"; + reg = <0x29c0000 0x800000>; + read-only; + }; + + fwconcat1: partition@31c0000 { + label = "fwconcat1"; + reg = <0x31c0000 0x2a00000>; + }; + + partition@5bc0000 { + label = "private"; + reg = <0x5bc0000 0x1400000>; + read-only; + }; + + partition@6fc0000 { + label = "mydlink"; + reg = <0x6fc0000 0x600000>; + read-only; + }; + + partition@75c0000 { + label = "myconfig"; + reg = <0x75c0000 0xa00000>; + read-only; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie1 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x0>; + mediatek,disable-radar-background; + }; +}; + +&gmac1 { + status = "okay"; + phy-handle = <ðphy4>; +}; + +&mdio { + ethphy4: ethernet-phy@4 { + reg = <4>; + }; +}; + +&switch0 { + ports { + port@0 { + status = "okay"; + label = "internet"; + }; + + port@2 { + status = "okay"; + label = "ethernet"; + }; + }; +}; diff --git a/target/linux/ramips/dts/mt7628an_tplink_archer-c50-v6.dts b/target/linux/ramips/dts/mt7628an_tplink_archer-c50-v6.dts new file mode 100644 index 00000000000..86cefbc2309 --- /dev/null +++ b/target/linux/ramips/dts/mt7628an_tplink_archer-c50-v6.dts @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7628an_tplink_8m-split-uboot.dtsi" + +/ { + compatible = "tplink,archer-c50-v6", "mediatek,mt7628an-soc"; + model = "TP-Link Archer C50 v6 (CA/EU/RU)"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio 38 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + rfkill { + label = "rfkill"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + label = "green:power"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + }; + + wlan2 { + label = "green:wlan2g"; + gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; + + wlan5 { + label = "green:wlan5g"; + gpios = <&gpio 42 GPIO_ACTIVE_LOW>; + }; + + lan { + label = "green:lan"; + gpios = <&gpio 41 GPIO_ACTIVE_LOW>; + }; + + wan { + label = "green:wan"; + gpios = <&gpio 39 GPIO_ACTIVE_LOW>; + }; + + wan_orange { + label = "orange:wan"; + gpios = <&gpio 40 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&ehci { + status = "disabled"; +}; + +&ohci { + status = "disabled"; +}; + +&state_default { + gpio { + groups = "i2c", "p0led_an", "p1led_an", "p2led_an", + "p3led_an", "p4led_an", "wdt", "wled_an"; + function = "gpio"; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + reg = <0x0000 0 0 0 0>; + ieee80211-freq-limit = <5000000 6000000>; + nvmem-cells = <&eeprom_radio_8000>, <&macaddr_rom_f100>; + nvmem-cell-names = "eeprom", "mac-address"; + mac-address-increment = <(-1)>; + }; +}; + +&eeprom_radio_8000 { + /* V2 has different eeprom size '0x4da8' for MT7613 */ + reg = <0x8000 0x4da8>; +}; diff --git a/target/linux/ramips/image/common-sercomm.mk b/target/linux/ramips/image/common-sercomm.mk index 4060da09235..09870109112 100644 --- a/target/linux/ramips/image/common-sercomm.mk +++ b/target/linux/ramips/image/common-sercomm.mk @@ -23,6 +23,35 @@ define Build/sercomm-crypto rm -f $@.enc $@.key endef +define Build/sercomm-factory-cpj + dd bs=$$((0x1fff00)) count=1 if=$@ of=$@.kernel conv=notrunc \ + 2>/dev/null + dd bs=$$((0x1fff00)) skip=1 if=$@ of=$@.rootfs1 conv=notrunc \ + 2>/dev/null + cp $@.rootfs1 $@.rootfs2 + $(TOPDIR)/scripts/sercomm-kernel-header.py \ + --kernel-image $@.kernel \ + --kernel-offset $(SERCOMM_KERNEL_OFFSET) \ + --rootfs-image $@.rootfs1 \ + --rootfs-offset $(SERCOMM_ROOTFS_OFFSET) \ + --output-header $@.header1 + $(TOPDIR)/scripts/sercomm-kernel-header.py \ + --kernel-image $@.kernel \ + --kernel-offset $(SERCOMM_KERNEL2_OFFSET) \ + --rootfs-image $@.rootfs2 \ + --rootfs-offset $(SERCOMM_ROOTFS2_OFFSET) \ + --output-header $@.header2 + cat $@.header1 $@.kernel > $@.kernel1 + cat $@.header2 $@.kernel > $@.kernel2 + rm $@.header1 $@.header2 $@.kernel + $(call Build/sercomm-part-tag-common,kernel $@.kernel1) + $(call Build/sercomm-part-tag-common,kernel2 $@.kernel2) + $(call Build/sercomm-part-tag-common,rootfs $@.rootfs1) + $(call Build/sercomm-part-tag-common,rootfs2 $@.rootfs2) + cat $@.kernel2 $@.rootfs2 $@.kernel1 $@.rootfs1 > $@ + rm $@.kernel1 $@.rootfs1 $@.kernel2 $@.rootfs2 +endef + define Build/sercomm-factory-cqr $(TOPDIR)/scripts/sercomm-pid.py \ --hw-version $(SERCOMM_HWVER) \ @@ -38,10 +67,6 @@ define Build/sercomm-factory-cqr mv $@.fhdr $@ endef -define Build/sercomm-fix-buc-pid - printf 1 | dd seek=$$((0x13)) of=$@ bs=1 conv=notrunc 2>/dev/null -endef - define Build/sercomm-kernel $(TOPDIR)/scripts/sercomm-kernel-header.py \ --kernel-image $@ \ @@ -104,6 +129,10 @@ define Build/sercomm-payload rm $@.pid endef +define Build/sercomm-pid-setbit + printf 1 | dd seek=$$(($(1))) of=$@ bs=1 conv=notrunc 2>/dev/null +endef + define Build/sercomm-prepend-tagged-kernel $(CP) $(IMAGE_KERNEL) $(IMAGE_KERNEL).tagged $(call Build/sercomm-part-tag-common,$(word 1,$(1)) \ @@ -117,12 +146,46 @@ define Build/sercomm-reset-slot1-chksum dd of=$@ seek=$$((0x118)) bs=1 conv=notrunc 2>/dev/null endef +define Build/sercomm-sysupgrade-cpj + dd bs=$$((0x1fff00)) count=1 if=$@ of=$@.kernel conv=notrunc \ + 2>/dev/null + dd bs=$$((0x1fff00)) skip=1 if=$@ of=$@.rootfs conv=notrunc \ + 2>/dev/null + $(TOPDIR)/scripts/sercomm-kernel-header.py \ + --kernel-image $@.kernel \ + --kernel-offset $(SERCOMM_KERNEL_OFFSET) \ + --rootfs-image $@.rootfs \ + --rootfs-offset $(SERCOMM_ROOTFS_OFFSET) \ + --output-header $@.header + cat $@.header $@.kernel $@.rootfs > $@ + rm $@.header $@.kernel $@.rootfs +endef + define Device/sercomm $(Device/nand) LOADER_TYPE := bin IMAGES += factory.img endef +define Device/sercomm_cpj + SOC := mt7620a + DEVICE_VENDOR := Rostelecom + DEVICE_ALT0_VENDOR := Sercomm + IMAGE_SIZE := 7743k + SERCOMM_HWID := CPJ + SERCOMM_HWVER := 10000 + SERCOMM_SWVER := 1001 + SERCOMM_KERNEL_OFFSET := 0x70100 + SERCOMM_ROOTFS_OFFSET := 0x270000 + SERCOMM_KERNEL2_OFFSET := 0x800100 + SERCOMM_ROOTFS2_OFFSET := 0xa00000 + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \ + sercomm-sysupgrade-cpj | pad-rootfs | check-size | \ + append-metadata + ARTIFACTS := initramfs-factory.img + DEVICE_PACKAGES := kmod-mt76x2 +endef + define Device/sercomm_cxx_dxx $(Device/sercomm) KERNEL_SIZE := 6144k diff --git a/target/linux/ramips/image/mt7620.mk b/target/linux/ramips/image/mt7620.mk index f85f3c8521e..883aacabe06 100644 --- a/target/linux/ramips/image/mt7620.mk +++ b/target/linux/ramips/image/mt7620.mk @@ -2,6 +2,7 @@ # MT7620A Profiles # +include ./common-sercomm.mk include ./common-tp-link.mk DEVICE_VARS += DLINK_ROM_ID DLINK_FAMILY_MEMBER DLINK_FIRMWARE_SIZE DLINK_IMAGE_OFFSET @@ -1102,6 +1103,27 @@ define Device/ravpower_rp-wd03 endef TARGET_DEVICES += ravpower_rp-wd03 +define Device/rostelecom_rt-fl-1 + $(Device/sercomm_cpj) + DEVICE_MODEL := RT-FL-1 + DEVICE_ALT0_MODEL := RT-FL-1 + ARTIFACT/initramfs-factory.img := \ + append-image-stage initramfs-kernel.bin | check-size | \ + sercomm-factory-cpj | gzip | sercomm-payload | \ + sercomm-pid-setbit 0x11 | sercomm-crypto +endef +TARGET_DEVICES += rostelecom_rt-fl-1 + +define Device/rostelecom_s1010 + $(Device/sercomm_cpj) + DEVICE_MODEL := S1010 + DEVICE_ALT0_MODEL := S1010.RT + ARTIFACT/initramfs-factory.img := \ + append-image-stage initramfs-kernel.bin | check-size | \ + sercomm-factory-cpj | gzip | sercomm-payload | sercomm-crypto +endef +TARGET_DEVICES += rostelecom_s1010 + define Device/sanlinking_d240 SOC := mt7620a IMAGE_SIZE := 16064k diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index 3dd6574bf1f..a306331159d 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -9,6 +9,14 @@ DEFAULT_SOC := mt7621 DEVICE_VARS += ELECOM_HWNAME LINKSYS_HWNAME DLINK_HWID +define Build/append-dlink-covr-metadata + echo -ne '{"supported_devices": "$(1)", "firmware": "' > $@metadata.tmp + $(MKHASH) md5 "$@" | head -c32 >> $@metadata.tmp + echo '"}' >> $@metadata.tmp + fwtool -I $@metadata.tmp $@ + rm $@metadata.tmp +endef + define Build/arcadyan-trx echo -ne "hsqs" > $@.hsqs $(eval trx_magic=$(word 1,$(1))) @@ -641,16 +649,39 @@ define Device/cudy_x6-v2 endef TARGET_DEVICES += cudy_x6-v2 +define Device/dlink_covr-x1860-a1 + $(Device/dsa-migration) + BLOCKSIZE := 128k + PAGESIZE := 2048 + KERNEL_SIZE := 8192k + IMAGE_SIZE := 40960k + DEVICE_VENDOR := D-Link + DEVICE_MODEL := COVR-X1860 + DEVICE_VARIANT := A1 + DEVICE_PACKAGES := kmod-mt7915-firmware + UBINIZE_OPTS := -E 5 + KERNEL_LOADADDR := 0x82000000 + KERNEL := kernel-bin | relocate-kernel 0x80001000 | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb | \ + append-squashfs4-fakeroot + IMAGES += factory.bin recovery.bin + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + IMAGE/recovery.bin := append-kernel | pad-to $$(KERNEL_SIZE) | \ + append-ubi | check-size + IMAGE/factory.bin := $$(IMAGE/recovery.bin) | \ + append-dlink-covr-metadata $$(DEVICE_MODEL) | \ + dlink-sge-image $$(DEVICE_MODEL) +endef +TARGET_DEVICES += dlink_covr-x1860-a1 + define Device/dlink_dxx-1xx0-x1 DEVICE_VENDOR := D-Link - DEVICE_PACKAGES := kmod-mt7615-firmware rssileds + DEVICE_PACKAGES := kmod-mt7615-firmware rssileds -uboot-envtools IMAGE_SIZE := 16064k IMAGES += factory.bin - IMAGE/factory.bin := $$(sysupgrade_bin) | \ - check-size 11009992 | pad-to 11009992 | \ - append-md5sum-ascii-salted ffff | \ - append-string $$(DLINK_HWID) | \ - check-size + IMAGE/factory.bin := append-kernel | append-rootfs | \ + pad-rootfs -x 60 | append-md5sum-ascii-salted ffff | \ + append-string $$$$(DLINK_HWID) | check-size endef define Device/dlink_dap-1620-b1 @@ -2624,7 +2655,7 @@ define Device/wifire_s1500-nbn IMAGE_SIZE := 51200k IMAGE/factory.img := append-kernel | sercomm-kernel-factory | \ sercomm-reset-slot1-chksum | append-ubi | check-size | \ - sercomm-factory-cqr | sercomm-fix-buc-pid | sercomm-mkhash | \ + sercomm-factory-cqr | sercomm-pid-setbit 0x13 | sercomm-mkhash | \ sercomm-crypto SERCOMM_HWID := BUC SERCOMM_HWVER := 10000 diff --git a/target/linux/ramips/image/mt76x8.mk b/target/linux/ramips/image/mt76x8.mk index 816009ac182..fd90c7bac96 100644 --- a/target/linux/ramips/image/mt76x8.mk +++ b/target/linux/ramips/image/mt76x8.mk @@ -593,6 +593,19 @@ define Device/tplink_archer-c50-v4 endef TARGET_DEVICES += tplink_archer-c50-v4 +define Device/tplink_archer-c50-v6 + $(Device/tplink-v2) + IMAGE_SIZE := 7616k + DEVICE_MODEL := Archer C50 + DEVICE_VARIANT := v6 (CA/EU/RU) + TPLINK_FLASHLAYOUT := 8MSUmtk + TPLINK_HWID := 0x0C500006 + TPLINK_HWREVADD := 0x6 + DEVICE_PACKAGES := kmod-mt7615e kmod-mt7663-firmware-ap + IMAGES := sysupgrade.bin +endef +TARGET_DEVICES += tplink_archer-c50-v6 + define Device/tplink_re200-v2 $(Device/tplink-safeloader) IMAGE_SIZE := 7808k diff --git a/target/linux/ramips/mt7620/base-files/etc/board.d/01_leds b/target/linux/ramips/mt7620/base-files/etc/board.d/01_leds index 22e79ca7553..c4f7fcbb876 100644 --- a/target/linux/ramips/mt7620/base-files/etc/board.d/01_leds +++ b/target/linux/ramips/mt7620/base-files/etc/board.d/01_leds @@ -208,6 +208,14 @@ zbtlink,zbt-we826-e) ravpower,rp-wd03) ucidef_set_led_netdev "internet" "internet" "green:wifi" "eth0" ;; +rostelecom,rt-fl-1|\ +rostelecom,s1010) + ucidef_set_led_switch "lan-1" "lan-1" "green:lan-1" "switch0" "0x02" + ucidef_set_led_switch "lan-2" "lan-2" "green:lan-2" "switch0" "0x04" + ucidef_set_led_switch "lan-3" "lan-3" "green:lan-3" "switch0" "0x08" + ucidef_set_led_switch "lan-4" "lan-4" "green:lan-4" "switch0" "0x10" + ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01" + ;; tplink,archer-c2-v1) ucidef_set_led_switch "lan" "lan" "green:lan" "switch1" "0x1e" ucidef_set_led_switch "wan" "wan" "green:wan" "switch1" "0x01" diff --git a/target/linux/ramips/mt7620/base-files/etc/board.d/02_network b/target/linux/ramips/mt7620/base-files/etc/board.d/02_network index a0174d2d1cc..cbfb8a1d863 100644 --- a/target/linux/ramips/mt7620/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7620/base-files/etc/board.d/02_network @@ -119,6 +119,8 @@ ramips_setup_interfaces() netgear,jwnr2010-v5|\ phicomm,k2-v22.4|\ phicomm,k2-v22.5|\ + rostelecom,rt-fl-1|\ + rostelecom,s1010|\ trendnet,tew-810dr|\ zbtlink,zbt-we2026) ucidef_add_switch "switch0" \ @@ -392,6 +394,11 @@ ramips_setup_macs() linksys,e1700) wan_mac=$(mtd_get_mac_ascii config WAN_MAC_ADDR) ;; + rostelecom,rt-fl-1|\ + rostelecom,s1010) + label_mac=$(mtd_get_mac_binary "SC Nvram(permanent data)" 0x0) + wan_mac=$(macaddr_add "$label_mac" 10) + ;; snr,cpe-w4n-mt) lan_mac=$(mtd_get_mac_binary Factory 0x28) wan_mac=$(mtd_get_mac_binary Factory 0x2e) @@ -412,7 +419,7 @@ ramips_setup_macs() label_mac=$(mtd_get_mac_binary factory 0x4) ;; zyxel,keenetic-lite-iii-a) - lan_mac=$(mtd_get_mac_binary RF-EEPROM 0x4) + lan_mac=$(mtd_get_mac_binary RF-EEPROM 0x4) wan_mac=$(mtd_get_mac_binary RF-EEPROM 0x28) label_mac=$wan_mac ;; diff --git a/target/linux/ramips/mt7620/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7620/base-files/lib/upgrade/platform.sh index 9f71dc918e5..6dd7fc7cef1 100755 --- a/target/linux/ramips/mt7620/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/mt7620/base-files/lib/upgrade/platform.sh @@ -30,6 +30,14 @@ platform_do_upgrade() { } default_do_upgrade "$1" ;; + rostelecom,rt-fl-1|\ + rostelecom,s1010) + idx="$(find_mtd_index ftd_and_bootflag)" + [ -n "$idx" ] && \ + printf 0 | dd bs=1 seek=$((0x18007)) count=1 \ + of=/dev/mtdblock$idx + default_do_upgrade "$1" + ;; *) default_do_upgrade "$1" ;; diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network index e7f72106dd1..ae29da4adc3 100644 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network @@ -98,6 +98,9 @@ ramips_setup_interfaces() zyxel,nr7101) ucidef_set_interfaces_lan_wan "lan" "wan" ;; + dlink,covr-x1860-a1) + ucidef_set_interfaces_lan_wan "ethernet" "internet" + ;; gnubee,gb-pc1) ucidef_set_interface_lan "ethblack ethblue" ;; @@ -219,6 +222,11 @@ ramips_setup_macs() label_mac=$lan_mac wan_mac=$(macaddr_add "$lan_mac" 1) ;; + dlink,covr-x1860-a1) + label_mac=$(mtd_get_mac_ascii config2 factory_mac) + wan_mac=$(macaddr_add "$label_mac" 3) + lan_mac=$label_mac + ;; dlink,dir-860l-b1) lan_mac=$(mtd_get_mac_ascii factory lanmac) wan_mac=$(mtd_get_mac_ascii factory wanmac) diff --git a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac index 96b49ff00ae..b6cf9052df1 100644 --- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac +++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac @@ -46,6 +46,13 @@ case "$board" in [ "$PHYNBR" = "1" ] && \ macaddr_add $lan_mac_addr 2 > /sys${DEVPATH}/macaddress ;; + dlink,covr-x1860-a1) + label_mac=$(mtd_get_mac_ascii config2 factory_mac) + [ "$PHYNBR" = "0" ] && \ + macaddr_add $label_mac 1 > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && \ + macaddr_add $label_mac 2 > /sys${DEVPATH}/macaddress + ;; dlink,dap-x1860-a1) hw_mac_addr="$(mtd_get_mac_binary factory 0x4)" [ "$PHYNBR" = "0" ] && \ diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh index 777c87bed8e..2b789342abe 100755 --- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh @@ -63,6 +63,7 @@ platform_do_upgrade() { beeline,smartbox-turbo|\ beeline,smartbox-turbo-plus|\ belkin,rt1800|\ + dlink,covr-x1860-a1|\ dlink,dap-x1860-a1|\ dlink,dir-1960-a1|\ dlink,dir-2640-a1|\ diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds index 792bd13ebc1..0b109feb6c5 100644 --- a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds +++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds @@ -76,7 +76,8 @@ tplink,tl-wr850n-v2) ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01" ;; tplink,archer-c50-v3|\ -tplink,archer-c50-v4) +tplink,archer-c50-v4|\ +tplink,archer-c50-v6) ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x1e" ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01" ucidef_set_led_wlan "wlan2g" "wlan2g" "green:wlan2g" "phy0tpt" diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network index 6bcdea971b2..2ec41fe2549 100644 --- a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network @@ -46,6 +46,7 @@ ramips_setup_interfaces() tplink,archer-c20-v5|\ tplink,archer-c50-v3|\ tplink,archer-c50-v4|\ + tplink,archer-c50-v6|\ tplink,tl-mr3420-v5|\ tplink,tl-wr840n-v4|\ tplink,tl-wr840n-v5|\ @@ -294,7 +295,8 @@ ramips_setup_macs() wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0xf100)" 1) ;; tplink,archer-c20-v5|\ - tplink,archer-c50-v4) + tplink,archer-c50-v4|\ + tplink,archer-c50-v6) wan_mac=$(macaddr_add "$(mtd_get_mac_binary rom 0xf100)" 1) ;; wavlink,wl-wn570ha1|\ diff --git a/target/linux/ramips/mt76x8/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt76x8/base-files/lib/upgrade/platform.sh index 20adfafc3dd..427de8406ff 100755 --- a/target/linux/ramips/mt76x8/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/mt76x8/base-files/lib/upgrade/platform.sh @@ -29,7 +29,8 @@ platform_do_upgrade() { default_do_upgrade "$1" ;; tplink,archer-c20-v5|\ - tplink,archer-c50-v4) + tplink,archer-c50-v4|\ + tplink,archer-c50-v6) MTD_ARGS="-t romfile" default_do_upgrade "$1" ;; diff --git a/target/linux/realtek/dts-5.15/rtl8380_tplink_sg2xxx.dtsi b/target/linux/realtek/dts-5.15/rtl8380_tplink_sg2xxx.dtsi index e727a9405ad..0706c55524b 100644 --- a/target/linux/realtek/dts-5.15/rtl8380_tplink_sg2xxx.dtsi +++ b/target/linux/realtek/dts-5.15/rtl8380_tplink_sg2xxx.dtsi @@ -114,15 +114,18 @@ reg = <0x1b00000 0x400000>; }; partition@1f00000 { - compatible = "nvmem-cells"; label = "para"; reg = <0x1f00000 0x100000>; - #address-cells = <1>; - #size-cells = <1>; read-only; - factory_macaddr: macaddr@fdff4 { - reg = <0xfdff4 0x6>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + factory_macaddr: macaddr@fdff4 { + reg = <0xfdff4 0x6>; + }; }; }; }; diff --git a/target/linux/realtek/dts-5.15/rtl8382_tplink_t1600g-28ts-v3.dts b/target/linux/realtek/dts-5.15/rtl8382_tplink_t1600g-28ts-v3.dts index 3b3b7ad2f84..6e9f7baed06 100644 --- a/target/linux/realtek/dts-5.15/rtl8382_tplink_t1600g-28ts-v3.dts +++ b/target/linux/realtek/dts-5.15/rtl8382_tplink_t1600g-28ts-v3.dts @@ -72,15 +72,18 @@ reg = <0x1b00000 0x400000>; }; partition@1f00000 { - compatible = "nvmem-cells"; label = "para"; reg = <0x1f00000 0x100000>; - #address-cells = <1>; - #size-cells = <1>; read-only; - factory_macaddr: macaddr@fdff4 { - reg = <0xfdff4 0x6>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + factory_macaddr: macaddr@fdff4 { + reg = <0xfdff4 0x6>; + }; }; }; }; diff --git a/target/linux/realtek/dts-5.15/rtl8393_tplink_sg2452p-v4.dts b/target/linux/realtek/dts-5.15/rtl8393_tplink_sg2452p-v4.dts index d2221c1d2f0..5ca342f970d 100644 --- a/target/linux/realtek/dts-5.15/rtl8393_tplink_sg2452p-v4.dts +++ b/target/linux/realtek/dts-5.15/rtl8393_tplink_sg2452p-v4.dts @@ -262,15 +262,18 @@ reg = <0x1b00000 0x400000>; }; partition@1f00000 { - compatible = "nvmem-cells"; label = "para"; reg = <0x1f00000 0x100000>; - #address-cells = <1>; - #size-cells = <1>; read-only; - factory_macaddr: macaddr@fdff4 { - reg = <0xfdff4 0x6>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + factory_macaddr: macaddr@fdff4 { + reg = <0xfdff4 0x6>; + }; }; }; }; diff --git a/target/linux/sifiveu/config-6.1 b/target/linux/sifiveu/config-6.1 index 2bcbcffeda5..98283f4e0d8 100644 --- a/target/linux/sifiveu/config-6.1 +++ b/target/linux/sifiveu/config-6.1 @@ -68,7 +68,6 @@ CONFIG_DEBUG_INFO=y CONFIG_DECOMPRESS_GZIP=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y -# CONFIG_DEVTMPFS_SAFE is not set CONFIG_DMA_DIRECT_REMAP=y CONFIG_DNOTIFY=y CONFIG_DTC=y diff --git a/target/linux/x86/base-files.mk b/target/linux/x86/base-files.mk new file mode 100644 index 00000000000..88ba97d38a3 --- /dev/null +++ b/target/linux/x86/base-files.mk @@ -0,0 +1,8 @@ +GRUB_SERIAL:=$(call qstrip,$(CONFIG_GRUB_SERIAL)) +ifeq ($(GRUB_SERIAL),) +$(error This platform requires CONFIG_GRUB_SERIAL be set!) +endif + +define Package/base-files/install-target + $(SED) "s#@GRUB_SERIAL@#$(GRUB_SERIAL)#" $(1)/etc/inittab +endef diff --git a/target/linux/x86/base-files/etc/inittab b/target/linux/x86/base-files/etc/inittab index f4747f200d0..9daf2ce2f0f 100644 --- a/target/linux/x86/base-files/etc/inittab +++ b/target/linux/x86/base-files/etc/inittab @@ -1,5 +1,5 @@ ::sysinit:/etc/init.d/rcS S boot ::shutdown:/etc/init.d/rcS K shutdown -ttyS0::askfirst:/usr/libexec/login.sh +@GRUB_SERIAL@::askfirst:/usr/libexec/login.sh hvc0::askfirst:/usr/libexec/login.sh tty1::askfirst:/usr/libexec/login.sh diff --git a/target/linux/x86/config-6.1 b/target/linux/x86/config-6.1 index 6776d05be38..af3676f3714 100644 --- a/target/linux/x86/config-6.1 +++ b/target/linux/x86/config-6.1 @@ -92,7 +92,6 @@ CONFIG_DEBUG_MISC=y # CONFIG_DEBUG_TLBFLUSH is not set CONFIG_DECOMPRESS_BZIP2=y CONFIG_DECOMPRESS_GZIP=y -# CONFIG_DEVTMPFS_SAFE is not set CONFIG_DMADEVICES=y CONFIG_DMI=y CONFIG_DMIID=y diff --git a/target/linux/x86/image/Makefile b/target/linux/x86/image/Makefile index 322131c2a48..d95fd15f008 100644 --- a/target/linux/x86/image/Makefile +++ b/target/linux/x86/image/Makefile @@ -18,15 +18,11 @@ endif GRUB_SERIAL:=$(call qstrip,$(CONFIG_GRUB_SERIAL)) -ifneq ($(GRUB_SERIAL),) - GRUB_CONSOLE_CMDLINE += console=$(GRUB_SERIAL),$(CONFIG_GRUB_BAUDRATE)n8$(if $(CONFIG_GRUB_FLOWCONTROL),r,) - GRUB_SERIAL_CONFIG := serial --unit=0 --speed=$(CONFIG_GRUB_BAUDRATE) --word=8 --parity=no --stop=1 --rtscts=$(if $(CONFIG_GRUB_FLOWCONTROL),on,off) - GRUB_TERMINALS += serial -endif +GRUB_CONSOLE_CMDLINE += console=$(GRUB_SERIAL),$(CONFIG_GRUB_BAUDRATE)n8$(if $(CONFIG_GRUB_FLOWCONTROL),r,) +GRUB_SERIAL_CONFIG := serial --unit=0 --speed=$(CONFIG_GRUB_BAUDRATE) --word=8 --parity=no --stop=1 --rtscts=$(if $(CONFIG_GRUB_FLOWCONTROL),on,off) +GRUB_TERMINALS += serial -ifneq ($(GRUB_TERMINALS),) - GRUB_TERMINAL_CONFIG := terminal_input $(GRUB_TERMINALS); terminal_output $(GRUB_TERMINALS) -endif +GRUB_TERMINAL_CONFIG := terminal_input $(GRUB_TERMINALS); terminal_output $(GRUB_TERMINALS) ROOTPART:=$(call qstrip,$(CONFIG_TARGET_ROOTFS_PARTNAME)) ROOTPART:=$(if $(ROOTPART),$(ROOTPART),PARTUUID=$(IMG_PART_SIGNATURE)-02) diff --git a/target/linux/x86/patches-5.15/120-hwrng-geode-fix-accessing-registers.patch b/target/linux/x86/patches-5.15/120-hwrng-geode-fix-accessing-registers.patch deleted file mode 100644 index 4c8015013bc..00000000000 --- a/target/linux/x86/patches-5.15/120-hwrng-geode-fix-accessing-registers.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 859bd2e0c0052967536f3f902716f204d5a978b1 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Fri, 8 Sep 2023 22:48:33 +0200 -Subject: [PATCH] hwrng: geode: fix accessing registers - -When the membase and pci_dev pointer were moved to a new struct in priv, -the actual membase users were left untouched, and they started reading -out arbitrary memory behind the struct instead of registers. This -unfortunately turned the RNG into a constant number generator, depending -on the content of what was at that offset. - -To fix this, update geode_rng_data_{read,present}() to also get the -membase via amd_geode_priv, and properly read from the right addresses -again. - -Fixes: 9f6ec8dc574e ("hwrng: geode - Fix PCI device refcount leak") -Reported-by: Timur I. Davletshin -Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217882 -Tested-by: Timur I. Davletshin -Suggested-by: Jo-Philipp Wich -Signed-off-by: Jonas Gorski ---- - drivers/char/hw_random/geode-rng.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - ---- a/drivers/char/hw_random/geode-rng.c -+++ b/drivers/char/hw_random/geode-rng.c -@@ -58,7 +58,8 @@ struct amd_geode_priv { - - static int geode_rng_data_read(struct hwrng *rng, u32 *data) - { -- void __iomem *mem = (void __iomem *)rng->priv; -+ struct amd_geode_priv *priv = (struct amd_geode_priv *)rng->priv; -+ void __iomem *mem = priv->membase; - - *data = readl(mem + GEODE_RNG_DATA_REG); - -@@ -67,7 +68,8 @@ static int geode_rng_data_read(struct hw - - static int geode_rng_data_present(struct hwrng *rng, int wait) - { -- void __iomem *mem = (void __iomem *)rng->priv; -+ struct amd_geode_priv *priv = (struct amd_geode_priv *)rng->priv; -+ void __iomem *mem = priv->membase; - int data, i; - - for (i = 0; i < 20; i++) { diff --git a/tools/firmware-utils/Makefile b/tools/firmware-utils/Makefile index 66eca147668..6dc77621ea3 100644 --- a/tools/firmware-utils/Makefile +++ b/tools/firmware-utils/Makefile @@ -11,9 +11,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git -PKG_SOURCE_DATE:=2023-11-03 -PKG_SOURCE_VERSION:=ba5bc4e1ae9d3e7b41d3bed39ce505670dc95078 -PKG_MIRROR_HASH:=f14e0153443493c2908a2145c206798e01c66d985a81e259187007c464574b72 +PKG_SOURCE_DATE:=2023-11-21 +PKG_SOURCE_VERSION:=12bf1a99bd6eebae90caa144bb4d8b0cd763ff8f +PKG_MIRROR_HASH:=f711bf80123a6f14737da27ab8dfff87a4d429c74057de355b1693e89f223abc include $(INCLUDE_DIR)/host-build.mk include $(INCLUDE_DIR)/cmake.mk