ipq40xx: dts: disable qpic_bam for EMMC and SPI Flash devices

The qpic DMA controller is used by the parallel NAND Flash
interface. We don't need to enable it when nand-controller node
is marked as disabled.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/16654
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Shiji Yang 2024-10-10 18:29:06 +08:00 committed by Hauke Mehrtens
parent 78322915bd
commit 94d775d01a
15 changed files with 8 additions and 52 deletions

View file

@ -159,10 +159,6 @@
label = "lan4"; label = "lan4";
}; };
&qpic_bam {
status = "okay";
};
&usb2_hs_phy { &usb2_hs_phy {
status = "okay"; status = "okay";
}; };

View file

@ -149,10 +149,6 @@
status = "okay"; status = "okay";
}; };
&qpic_bam {
status = "okay";
};
&tlmm { &tlmm {
mdio_pins: mdio_pinmux { mdio_pins: mdio_pinmux {
mux_1 { mux_1 {

View file

@ -114,6 +114,10 @@
}; };
}; };
&qpic_bam {
status = "okay";
};
&tlmm { &tlmm {
nand_pins: nand-pins { nand_pins: nand-pins {

View file

@ -116,10 +116,6 @@
status = "okay"; status = "okay";
}; };
&qpic_bam {
status = "okay";
};
&tlmm { &tlmm {
i2c_0_pins: i2c-0-pinmux { i2c_0_pins: i2c-0-pinmux {
mux { mux {

View file

@ -227,10 +227,6 @@
}; };
}; };
&qpic_bam {
status = "okay";
};
&blsp1_uart1 { &blsp1_uart1 {
status = "okay"; status = "okay";
pinctrl-0 = <&serial_pins>; pinctrl-0 = <&serial_pins>;

View file

@ -339,10 +339,6 @@
label = "lan"; label = "lan";
}; };
&qpic_bam {
status = "okay";
};
&tlmm { &tlmm {
i2c_0_pins: i2c_0_pinmux { i2c_0_pins: i2c_0_pinmux {
mux { mux {

View file

@ -132,10 +132,6 @@
vqmmc-supply = <&vqmmc>; vqmmc-supply = <&vqmmc>;
}; };
&qpic_bam {
status = "okay";
};
&tlmm { &tlmm {
mdio_pins: mdio_pinmux { mdio_pins: mdio_pinmux {
mux_1 { mux_1 {

View file

@ -90,10 +90,6 @@
status = "okay"; status = "okay";
}; };
&qpic_bam {
status = "okay";
};
&tlmm { &tlmm {
mdio_pins: mdio_pinmux { mdio_pins: mdio_pinmux {
mux_1 { mux_1 {

View file

@ -249,10 +249,6 @@
}; };
}; };
&qpic_bam {
status = "okay";
};
&gmac { &gmac {
status = "okay"; status = "okay";
}; };

View file

@ -202,6 +202,10 @@
}; };
}; };
&qpic_bam {
status = "okay";
};
&swport4 { &swport4 {
nvmem-cell-names = "mac-address"; nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_gmac1>; nvmem-cells = <&macaddr_gmac1>;

View file

@ -312,10 +312,6 @@
status = "okay"; status = "okay";
}; };
&qpic_bam {
status = "okay";
};
&switch { &switch {
status = "okay"; status = "okay";
}; };

View file

@ -91,10 +91,6 @@
status = "okay"; status = "okay";
}; };
&qpic_bam {
status = "okay";
};
&tlmm { &tlmm {
mdio_pins: mdio_pinmux { mdio_pins: mdio_pinmux {
mux_1 { mux_1 {

View file

@ -132,10 +132,6 @@
status = "okay"; status = "okay";
}; };
&qpic_bam {
status = "okay";
};
&tlmm { &tlmm {
/* /*
* In addition to the Pins listed below, * In addition to the Pins listed below,

View file

@ -114,10 +114,6 @@
status = "okay"; status = "okay";
}; };
&qpic_bam {
status = "okay";
};
&mdio { &mdio {
status = "okay"; status = "okay";
pinctrl-0 = <&mdio_pins>; pinctrl-0 = <&mdio_pins>;

View file

@ -171,10 +171,6 @@
status = "okay"; status = "okay";
}; };
&qpic_bam {
status = "okay";
};
&gmac { &gmac {
status = "okay"; status = "okay";
}; };