qualcommbe: v6.12: add various DTS updates for IPQ9574 and RDP433
These devicetree updates can work with the existing upstreamcode. They do not require code changes. Add them before any code change. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Link: https://github.com/openwrt/openwrt/pull/18796 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Alexandru Gagniuc
Robert Marko
parent
01f3624960
commit
8f4100ac3b
4 changed files with 304 additions and 0 deletions
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@ -0,0 +1,49 @@
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From 657833a74f532262d415fa2ca354b69f4a97353c Mon Sep 17 00:00:00 2001
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From: Luo Jie <quic_luoj@quicinc.com>
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Date: Thu, 23 Nov 2023 15:41:20 +0800
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Subject: [PATCH] arm64: dts: qcom: Add IPQ9574 MDIO device node
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The MDIO bus master block is used to accessing the MDIO slave
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device (such as PHY device), the dedicated MDIO PINs needs to
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be configured.
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Change-Id: Ia64083529e693256dbd8f8af4071c02afdded8f9
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Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
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---
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arch/arm64/boot/dts/qcom/ipq9574.dtsi | 18 ++++++++++++++++++
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1 file changed, 18 insertions(+)
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--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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@@ -295,6 +295,8 @@
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mdio: mdio@90000 {
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compatible = "qcom,ipq9574-mdio", "qcom,ipq4019-mdio";
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reg = <0x00090000 0x64>;
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+ pinctrl-0 = <&mdio_pins>;
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+ pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&gcc GCC_MDIO_AHB_CLK>;
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@@ -412,6 +414,22 @@
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interrupt-controller;
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#interrupt-cells = <2>;
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+ mdio_pins: mdio-pins {
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+ mdc-state {
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+ pins = "gpio38";
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+ function = "mdc";
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+ drive-strength = <8>;
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+ bias-disable;
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+ };
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+
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+ mdio-state {
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+ pins = "gpio39";
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+ function = "mdio";
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+ drive-strength = <8>;
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+ bias-pull-up;
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+ };
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+ };
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+
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uart2_pins: uart2-state {
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pins = "gpio34", "gpio35";
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function = "blsp2_uart";
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@ -0,0 +1,34 @@
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From 91467ca0db1654644b2168f882f223d47dcfb9c1 Mon Sep 17 00:00:00 2001
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From: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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Date: Sat, 30 Mar 2024 20:03:30 -0500
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Subject: [PATCH] arm64: dts: qcom: ipq9574: Use 'usb-phy' for node names
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The devicetree spec allows node names of "usb-phy". So be more
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specific for the USB PHYs, and name the nodes "usb-phy" instead of
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just "phy".
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Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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---
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arch/arm64/boot/dts/qcom/ipq9574.dtsi | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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@@ -718,7 +718,7 @@
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status = "disabled";
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};
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- usb_0_qusbphy: phy@7b000 {
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+ usb_0_qusbphy: usb-phy@7b000 {
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compatible = "qcom,ipq9574-qusb2-phy";
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reg = <0x0007b000 0x180>;
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#phy-cells = <0>;
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@@ -732,7 +732,7 @@
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status = "disabled";
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};
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- usb_0_qmpphy: phy@7d000 {
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+ usb_0_qmpphy: usb-phy@7d000 {
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compatible = "qcom,ipq9574-qmp-usb3-phy";
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reg = <0x0007d000 0xa00>;
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#phy-cells = <0>;
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@ -0,0 +1,50 @@
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From be44d0251a2540f3b8d7205e0bc6659704366711 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Thu, 30 Jan 2025 00:39:30 +0100
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Subject: [PATCH] arm64: dts: qcom: ipq9574: add QPIC SPI NAND default
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partition nodes
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Add QPIC SPI NAND default partition nodes for RDP reference board.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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.../boot/dts/qcom/ipq9574-rdp-common.dtsi | 28 +++++++++++++++++++
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1 file changed, 28 insertions(+)
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--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
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@@ -189,6 +189,34 @@
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nand-ecc-engine = <&qpic_nand>;
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "0:training";
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+ reg = <0x0 0x80000>;
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+ read-only;
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+ };
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+
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+ partition@80000 {
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+ label = "0:license";
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+ reg = <0x80000 0x40000>;
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+ read-only;
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+ };
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+
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+ partition@c0000 {
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+ label = "rootfs";
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+ reg = <0xc0000 0x3c00000>;
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+ };
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+
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+ partition@3cc0000 {
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+ label = "rootfs_1";
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+ reg = <0x3cc0000 0x3c00000>;
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+ };
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+ };
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};
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};
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@ -0,0 +1,171 @@
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From 47c7ae9715d76054d98e8407dbb8ca1cf42fd587 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Mon, 9 Dec 2024 17:50:31 +0100
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Subject: [PATCH] arm64: dts: qcom: add partition table for ipq9574 rdp common
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Add partition table for ipq9574 SoC common to every RDB board.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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.../boot/dts/qcom/ipq9574-rdp-common.dtsi | 146 +++++++++++++++++-
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1 file changed, 145 insertions(+), 1 deletion(-)
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--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
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@@ -74,11 +74,155 @@
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status = "okay";
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flash@0 {
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- compatible = "micron,n25q128a11", "jedec,spi-nor";
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+ compatible = "jedec,spi-nor";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "0:sbl1";
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+ reg = <0x0 0xc0000>;
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+ read-only;
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+ };
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+
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+ partition@c0000 {
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+ label = "0:mibib";
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+ reg = <0xc0000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@d0000 {
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+ label = "0:bootconfig";
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+ reg = <0xd0000 0x20000>;
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+ read-only;
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+ };
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+
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+ partition@f0000 {
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+ label = "0:bootconfig1";
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+ reg = <0xf0000 0x20000>;
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+ read-only;
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+ };
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+
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+ partition@110000 {
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+ label = "0:qsee";
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+ reg = <0x110000 0x180000>;
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+ read-only;
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+ };
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+
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+ partition@290000 {
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+ label = "0:qsee_1";
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+ reg = <0x290000 0x180000>;
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+ read-only;
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+ };
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+
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+ partition@410000 {
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+ label = "0:devcfg";
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+ reg = <0x410000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@420000 {
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+ label = "0:devcfg_1";
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+ reg = <0x420000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@430000 {
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+ label = "0:apdp";
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+ reg = <0x430000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@440000 {
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+ label = "0:apdp_1";
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+ reg = <0x440000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@450000 {
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+ label = "0:tme";
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+ reg = <0x450000 0x40000>;
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+ read-only;
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+ };
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+
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+ partition@490000 {
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+ label = "0:tme_1";
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+ reg = <0x490000 0x40000>;
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+ read-only;
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+ };
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+
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+ partition@4d0000 {
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+ label = "0:rpm";
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+ reg = <0x4d0000 0x20000>;
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+ read-only;
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+ };
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+
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+ partition@4f0000 {
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+ label = "0:rpm_1";
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+ reg = <0x4f0000 0x20000>;
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+ read-only;
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+ };
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+
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+ partition@510000 {
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+ label = "0:cdt";
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+ reg = <0x510000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@520000 {
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+ label = "0:cdt_1";
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+ reg = <0x520000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@530000 {
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+ compatible = "u-boot,env";
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+ label = "0:appsblenv";
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+ reg = <0x530000 0x10000>;
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+
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+ macaddr_lan: ethaddr {
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+ #nvmem-cell-cells = <1>;
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+ };
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+ };
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+
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+ partition@540000 {
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+ label = "0:appsbl";
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+ reg = <0x540000 0xa0000>;
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+ read-only;
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+ };
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+
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+ partition@5e0000 {
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+ label = "0:appsbl_1";
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+ reg = <0x5e0000 0xa0000>;
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+ read-only;
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+ };
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+
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+ partition@680000 {
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+ label = "0:art";
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+ reg = <0x680000 0x100000>;
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+ read-only;
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+ };
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+
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+ partition@780000 {
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+ label = "0:ethphyfw";
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+ reg = <0x780000 0x80000>;
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+ read-only;
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+
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+ nvmem-layout {
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+ compatible = "fixed-layout";
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+
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+ aqr_fw: aqr-fw@0 {
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+ reg = <0x0 0x5fc02>;
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+ };
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+ };
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+ };
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+ };
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};
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};
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