From 337e36e0ef988d850105cfa5f7588e36d90aef2b Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Fri, 6 Aug 2021 12:40:54 +0200 Subject: [PATCH 01/20] ipq806x: convert each device to DSA implementation Convert each ipq806x device to DSA implementation using the qca8k driver. Rework 02_network to follow the new naming scheme. Update 01_leds to use netdev trigger with correct DSA port and drop now unused switch trigger. Currently secondary CPU is disabled and will be reneabled later. Signed-off-by: Christian Marangi --- target/linux/ipq806x/Makefile | 2 +- .../ipq806x/base-files/etc/board.d/01_leds | 22 +-- .../ipq806x/base-files/etc/board.d/02_network | 112 ++++++--------- .../base-files/etc/board.d/05_compat-version | 45 ++++++ target/linux/ipq806x/config-6.1 | 1 - .../arm/boot/dts/qcom-ipq8062-wg2600hp3.dts | 112 +++++++++++++-- .../boot/dts/qcom-ipq8064-ad7200-c2600.dtsi | 113 +++++++++++++-- .../arch/arm/boot/dts/qcom-ipq8064-ad7200.dts | 26 ++++ .../arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 113 +++++++++++++-- .../arch/arm/boot/dts/qcom-ipq8064-ap161.dts | 116 ++++++++++++--- .../arch/arm/boot/dts/qcom-ipq8064-d7800.dts | 113 +++++++++++++-- .../arch/arm/boot/dts/qcom-ipq8064-db149.dts | 114 +++++++++++++-- .../arm/boot/dts/qcom-ipq8064-ea7500-v1.dts | 26 ++++ .../arch/arm/boot/dts/qcom-ipq8064-ea8500.dts | 6 - .../arm/boot/dts/qcom-ipq8064-eax500.dtsi | 112 +++++++++++++-- .../arch/arm/boot/dts/qcom-ipq8064-g10.dts | 111 ++++++++++++-- .../arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi | 80 +++++++++-- .../arch/arm/boot/dts/qcom-ipq8064-r7500.dts | 111 ++++++++++++-- .../arm/boot/dts/qcom-ipq8064-r7500v2.dts | 113 +++++++++++++-- .../arm/boot/dts/qcom-ipq8064-vr2600v.dts | 113 +++++++++++++-- .../arm/boot/dts/qcom-ipq8064-wg2600hp.dts | 111 ++++++++++++-- .../arch/arm/boot/dts/qcom-ipq8064-wpq864.dts | 113 +++++++++++++-- .../arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts | 117 ++++++++++++--- .../arm/boot/dts/qcom-ipq8065-nbg6817.dts | 130 ++++++++++++----- .../arm/boot/dts/qcom-ipq8065-nighthawk.dtsi | 135 +++++++++++++----- .../boot/dts/qcom-ipq8065-rt4230w-rev6.dts | 113 +++++++++++++-- .../arm/boot/dts/qcom-ipq8065-tr4400-v2.dts | 100 +++++++++++-- target/linux/ipq806x/image/chromium.mk | 7 + target/linux/ipq806x/image/generic.mk | 34 +++++ 29 files changed, 2025 insertions(+), 396 deletions(-) create mode 100644 target/linux/ipq806x/base-files/etc/board.d/05_compat-version diff --git a/target/linux/ipq806x/Makefile b/target/linux/ipq806x/Makefile index 108abce6b30..74a0007a4e0 100644 --- a/target/linux/ipq806x/Makefile +++ b/target/linux/ipq806x/Makefile @@ -16,7 +16,7 @@ KERNELNAME:=zImage Image dtbs include $(INCLUDE_DIR)/target.mk DEFAULT_PACKAGES += \ - kmod-leds-gpio kmod-gpio-button-hotplug swconfig \ + kmod-leds-gpio kmod-gpio-button-hotplug \ kmod-ata-ahci kmod-ata-ahci-platform \ kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport \ kmod-phy-qcom-ipq806x-usb kmod-usb3 kmod-usb-dwc3-qcom \ diff --git a/target/linux/ipq806x/base-files/etc/board.d/01_leds b/target/linux/ipq806x/base-files/etc/board.d/01_leds index d4d40bd6463..950b7ad9688 100644 --- a/target/linux/ipq806x/base-files/etc/board.d/01_leds +++ b/target/linux/ipq806x/base-files/etc/board.d/01_leds @@ -11,7 +11,7 @@ board=$(board_name) case "$board" in buffalo,wxr-2533dhp) ucidef_set_led_wlan "wlan" "WLAN" "white:wireless" "phy0tpt" - ucidef_set_led_switch "wan" "WAN" "white:internet" "switch0" "0x20" + ucidef_set_led_netdev "wan" "WAN" "white:internet" "wan" ;; compex,wpq864) ucidef_set_led_usbport "usb" "USB" "green:usb" "usb1-port1" "usb2-port1" @@ -28,10 +28,10 @@ meraki,mr52) nec,wg2600hp) ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy1tpt" ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy0tpt" - ucidef_set_led_switch "wan" "WAN" "green:active" "switch0" "0x2" + ucidef_set_led_netdev "wan" "WAN" "green:active" "wan" ;; nec,wg2600hp3) - ucidef_set_led_switch "wan" "WAN" "green:active" "switch0" "0x2" + ucidef_set_led_netdev "wan" "WAN" "green:active" "wan" ;; netgear,d7800 |\ netgear,r7500 |\ @@ -41,7 +41,7 @@ netgear,xr450 |\ netgear,xr500) ucidef_set_led_usbport "usb1" "USB 1" "white:usb1" "usb1-port1" "usb2-port1" ucidef_set_led_usbport "usb2" "USB 2" "white:usb2" "usb3-port1" "usb4-port1" - ucidef_set_led_switch "wan" "WAN" "white:wan" "switch0" "0x20" + ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan" ucidef_set_led_ide "esata" "eSATA" "white:esata" ;; nokia,ac400i) @@ -55,8 +55,8 @@ nokia,ac400i) tplink,ad7200) ucidef_set_led_usbport "usb1" "USB 1" "blue:usb1" "usb1-port1" "usb2-port1" ucidef_set_led_usbport "usb2" "USB 2" "blue:usb3" "usb3-port1" "usb4-port1" - ucidef_set_led_switch "wan" "wan" "blue:wan" "switch0" "0x02" - ucidef_set_led_switch "lan" "lan" "blue:lan" "switch0" "0x3c" + ucidef_set_led_netdev "wan" "wan" "blue:wan" "wan" + ucidef_set_led_netdev "lan" "lan" "blue:lan" "br-lan" ucidef_set_led_wlan "wlan2g" "wlan2g" "blue:wlan2g" "phy2tpt" ucidef_set_led_wlan "wlan5g" "wlan5g" "blue:wlan5g" "phy1tpt" ucidef_set_led_netdev "wlan60g" "wlan60g" "blue:wlan60g" "wlan0" @@ -64,18 +64,18 @@ tplink,ad7200) tplink,c2600) ucidef_set_led_usbport "usb1" "USB 1" "white:usb_2" "usb1-port1" "usb2-port1" ucidef_set_led_usbport "usb2" "USB 2" "white:usb_4" "usb3-port1" "usb4-port1" - ucidef_set_led_switch "wan" "wan" "white:wan" "switch0" "0x20" - ucidef_set_led_switch "lan" "lan" "white:lan" "switch0" "0x1e" + ucidef_set_led_netdev "wan" "wan" "white:wan" "wan" + ucidef_set_led_netdev "lan" "lan" "white:lan" "br-lan" ;; tplink,vr2600v) ucidef_set_led_usbport "usb" "USB" "white:usb" "usb1-port1" "usb2-port1" "usb3-port1" "usb4-port1" - ucidef_set_led_switch "lan" "lan" "white:lan" "switch0" "0x1e" + ucidef_set_led_netdev "lan" "lan" "white:lan" "br-lan" ucidef_set_led_wlan "wlan2g" "WLAN2G" "white:wlan2g" "phy0tpt" ucidef_set_led_wlan "wlan5g" "WLAN5G" "white:wlan5g" "phy1tpt" - ucidef_set_led_switch "wan" "wan" "white:wan" "switch0" "0x20" + ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan" ;; zyxel,nbg6817) - ucidef_set_led_netdev "wan" "WAN" "white:internet" "eth1" + ucidef_set_led_netdev "wan" "WAN" "white:internet" "wan" ;; esac diff --git a/target/linux/ipq806x/base-files/etc/board.d/02_network b/target/linux/ipq806x/base-files/etc/board.d/02_network index bc45298da65..d64805b8f5e 100644 --- a/target/linux/ipq806x/base-files/etc/board.d/02_network +++ b/target/linux/ipq806x/base-files/etc/board.d/02_network @@ -12,35 +12,44 @@ ipq806x_setup_interfaces() case "$board" in arris,tr4400-v2) - ucidef_set_interfaces_lan_wan "eth1" "eth2" - ucidef_add_switch "switch0" \ - "1:lan" "2:lan" "3:lan" "4:lan" "6u@eth1" "0u@eth0" + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "eth2" ;; askey,rt4230w-rev6 |\ asrock,g10 |\ - nec,wg2600hp) - ucidef_add_switch "switch0" \ - "2:lan" "3:lan" "4:lan" "5:lan" "6@eth1" "1:wan" "0@eth0" - ;; + nec,wg2600hp |\ buffalo,wxr-2533dhp |\ compex,wpq864 |\ netgear,d7800 |\ netgear,r7500 |\ netgear,r7500v2 |\ - qcom,ipq8064-ap148) - ucidef_add_switch "switch0" \ - "1:lan" "2:lan" "3:lan" "4:lan" "6@eth1" "5:wan" "0@eth0" + qcom,ipq8064-ap148 |\ + linksys,ea7500-v1 |\ + linksys,ea8500 |\ + nec,wg2600hp3 |\ + netgear,r7800 |\ + netgear,xr500 |\ + netgear,xr450 |\ + tplink,c2600 |\ + tplink,vr2600v |\ + tplink,ad7200 |\ + zyxel,nbg6817) + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan" + ;; + asus,onhub |\ + tplink,onhub) + ucidef_set_interfaces_lan_wan "lan1" "wan" ;; edgecore,ecw5410) ucidef_set_interfaces_lan_wan "eth1" "eth0" ;; - linksys,ea7500-v1) - ucidef_add_switch "switch0" \ - "2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "6@eth1" "1:wan" "0@eth0" - ;; - linksys,ea8500) - ucidef_add_switch "switch0" \ - "1:lan" "2:lan" "3:lan" "4:lan" "6@eth1" "5:wan" "0@eth0" + qcom,ipq8064-ap161) + ucidef_set_interface_lan "eth1 eth2 lan1 lan2 lan3 lan4" "wan" + ;; + qcom,ipq8064-db149) + ucidef_set_interface_lan "eth1 eth2 eth3 lan1 lan2 lan3 lan4" "wan" + ;; + ubnt,unifi-ac-hd) + ucidef_set_interface_lan "eth0 eth1" ;; meraki,mr42) ucidef_set_interface_lan "eth0" @@ -48,80 +57,39 @@ ipq806x_setup_interfaces() meraki,mr52) ucidef_set_interfaces_lan_wan "eth0" "eth1" ;; - nec,wg2600hp3) - ucidef_add_switch "switch0" \ - "2:lan" "3:lan" "4:lan" "5:lan" "0@eth1" "1:wan" "6@eth0" - ;; - netgear,r7800 |\ - netgear,xr450 |\ - netgear,xr500 |\ - tplink,c2600 |\ - tplink,vr2600v) - ucidef_add_switch "switch0" \ - "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "6@eth1" "5:wan" "0@eth0" - ;; - qcom,ipq8064-ap161) - ucidef_set_interface_lan "eth1 eth2" - ucidef_add_switch "switch0" \ - "0:lan" "1:lan" "2:lan" "3u@eth1" "6:wan" "4u@eth0" - ;; - qcom,ipq8064-db149) - ucidef_set_interface_lan "eth1 eth2 eth3" - ucidef_add_switch "switch0" \ - "1:lan" "2:lan" "3:lan" "4:lan" "6u@eth1" "5:wan" "0u@eth0" - ;; - tplink,ad7200) - ucidef_add_switch "switch0" \ - "2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "6@eth1" "1:wan" "0@eth0" - ;; - asus,onhub |\ - tplink,onhub) - ucidef_set_interfaces_lan_wan "eth1" "eth0" - ucidef_add_switch "switch0" \ - "1:lan" "6@eth1" "2:wan" "0@eth0" - ;; - nokia,ac400i |\ - ubnt,unifi-ac-hd) - ucidef_set_interface_lan "eth0 eth1" - ;; - zyxel,nbg6817) - ucidef_add_switch "switch0" \ - "1:lan" "2:lan" "3:lan" "4:lan" "6@eth1" "5:wan" "0@eth0" - ;; *) echo "Unsupported hardware. Network interfaces not intialized" ;; esac } -ipq806x_setup_mac_address() +ipq806x_setup_macs() { local board="$1" case "$board" in - linksys,ea7500-v1) - hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr) - ucidef_set_interface_macaddr "lan" "$hw_mac_addr" - ucidef_set_interface_macaddr "wan" "$hw_mac_addr" + linksys,ea7500-v1) + hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr) + ucidef_set_interface_macaddr "lan" "$hw_mac_addr" + ucidef_set_interface_macaddr "wan" "$hw_mac_addr" ;; - linksys,ea8500) - hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr) - ucidef_set_interface_macaddr "lan" "$hw_mac_addr" - ucidef_set_interface_macaddr "wan" "$hw_mac_addr" + linksys,ea8500) + hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr) + ucidef_set_interface_macaddr "lan" "$hw_mac_addr" + ucidef_set_interface_macaddr "wan" "$hw_mac_addr" ;; - zyxel,nbg6817) - hw_mac_addr=$(mtd_get_mac_ascii 0:appsblenv ethaddr) - ucidef_set_interface_macaddr "lan" "$(macaddr_add $hw_mac_addr 2)" - ucidef_set_interface_macaddr "wan" "$(macaddr_add $hw_mac_addr 3)" + zyxel,nbg6817) + hw_mac_addr=$(mtd_get_mac_ascii 0:appsblenv ethaddr) + ucidef_set_interface_macaddr "lan" "$(macaddr_add $hw_mac_addr 2)" + ucidef_set_interface_macaddr "wan" "$(macaddr_add $hw_mac_addr 3)" ;; esac } board_config_update - board=$(board_name) -ipq806x_setup_mac_address $board +ipq806x_setup_macs $board ipq806x_setup_interfaces $board board_config_flush diff --git a/target/linux/ipq806x/base-files/etc/board.d/05_compat-version b/target/linux/ipq806x/base-files/etc/board.d/05_compat-version new file mode 100644 index 00000000000..74135b0d627 --- /dev/null +++ b/target/linux/ipq806x/base-files/etc/board.d/05_compat-version @@ -0,0 +1,45 @@ +#!/bin/sh +# +# Copyright (C) 2020 OpenWrt.org +# + +. /lib/functions.sh +. /lib/functions/uci-defaults.sh + +board_config_update + +case "$(board_name)" in + arris,tr4400-v2 |\ + askey,rt4230w-rev6 |\ + asrock,g10 |\ + buffalo,wxr-2533dhp |\ + compex,wpq864 |\ + nec,wg2600hp |\ + nec,wg2600hp3 |\ + netgear,d7800 |\ + netgear,r7500 |\ + netgear,r7500v2 |\ + netgear,r7800 |\ + netgear,xr450 |\ + netgear,xr500 |\ + nokia,ac400i |\ + qcom,ipq8064-ap148 |\ + qcom,ipq8064-ap161 |\ + qcom,ipq8064-db149 |\ + tplink,ad7200 |\ + tplink,c2600 |\ + tplink,vr2600v |\ + zyxel,nbg6817 |\ + asus,onhub |\ + tplink,onhub) + ucidef_set_compat_version "1.1" + ;; + linksys,ea7500-v1 |\ + linksys,ea8500) + ucidef_set_compat_version "2.1" + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/ipq806x/config-6.1 b/target/linux/ipq806x/config-6.1 index 960e16ae74d..a1214dc9178 100644 --- a/target/linux/ipq806x/config-6.1 +++ b/target/linux/ipq806x/config-6.1 @@ -1,7 +1,6 @@ CONFIG_ALIGNMENT_TRAP=y # CONFIG_APQ_GCC_8084 is not set # CONFIG_APQ_MMCC_8084 is not set -CONFIG_AR8216_PHY=y CONFIG_ARCH_32BIT_OFF_T=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y # CONFIG_ARCH_IPQ40XX is not set diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts index c55287a4f12..e3987c6d07d 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts @@ -413,21 +413,103 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x04 0x80080080 /* PAD0_MODE */ - 0x0c 0x06000000 /* PAD6_MODE */ - 0x10 0x002613a0 /* PWS_REG */ - 0x50 0xcc36cc36 /* LED_CTRL0 */ - 0x54 0xca36ca36 /* LED_CTRL1 */ - 0x58 0xc936c936 /* LED_CTRL2 */ - 0x5c 0x03ffff00 /* LED_CTRL3 */ - 0x7c 0x0000004e /* PORT0_STATUS */ - 0x94 0x0000004e /* PORT6_STATUS */ - 0xe0 0xc74164de /* SGMII_CTRL */ - 0xe4 0x0006a545 /* MAC_PWR_SEL */ - >; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi index 3494b2bde2f..9d05cf40326 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi @@ -337,21 +337,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy4: ethernet-phy@4 { - reg = <4>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts index 6cb21fc4f3f..f76e098d9e6 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts @@ -129,6 +129,32 @@ }; }; +&mdio0 { + switch@10 { + ports { + port@1 { + label = "wan"; + }; + + port@2 { + label = "lan1"; + }; + + port@3 { + label = "lan2"; + }; + + port@4 { + label = "lan3"; + }; + + port@5 { + label = "lan4"; + }; + }; + }; +}; + &pcie2 { status = "okay"; max-link-speed = <1>; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts index d3b7c44877e..bd8f0d60192 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts @@ -90,21 +90,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy4: ethernet-phy@4 { - reg = <4>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts index 02ddbf31180..9d0b451f436 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts @@ -102,24 +102,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x20080 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy4: ethernet-phy@4 { - reg = <4>; - qca,phy-rgmii-en; - qca,txclk-delay-en; - qca,rxclk-delay-en; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; phy3: ethernet-phy@3 { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts index b8273c614ae..c8e4a1810eb 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts @@ -340,21 +340,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy4: ethernet-phy@4 { - reg = <4>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-db149.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-db149.dts index f628df919b4..063f27c6d2d 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-db149.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-db149.dts @@ -117,21 +117,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy4: ethernet-phy@4 { - reg = <4>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; phy6: ethernet-phy@6 { @@ -147,7 +232,6 @@ status = "okay"; phy-mode = "rgmii"; qcom,id = <0>; - phy-handle = <&phy4>; pinctrl-0 = <&rgmii0_pins>; pinctrl-names = "default"; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts index 9d82d52d273..aab44ea9e31 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts @@ -89,3 +89,29 @@ reg = <0x6080000 0x1f80000>; }; }; + +&mdio0 { + switch@10 { + ports { + port@1 { + label = "wan"; + }; + + port@2 { + label = "lan1"; + }; + + port@3 { + label = "lan2"; + }; + + port@4 { + label = "lan3"; + }; + + port@5 { + label = "lan4"; + }; + }; + }; +}; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts index 1c6a4bdacd0..bc3a2c30496 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts @@ -106,12 +106,6 @@ }; }; -&mdio0 { - phy4: ethernet-phy@4 { - reg = <4>; - }; -}; - &gmac1 { qcom,phy_mdio_addr = <4>; qcom,poll_required = <1>; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi index 910bd86bc5f..fac43e785fb 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi @@ -185,18 +185,106 @@ reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>; reset-post-delay-us = <12000>; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x00010 0x2613a0 /* PWS_REG */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts index 63a72b53ae7..6795e8fa4fb 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts @@ -158,17 +158,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi index 53661059547..d20b55c2c29 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi @@ -62,21 +62,73 @@ pinctrl-0 = <&mdio_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0xaa545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy1: ethernet-phy@1 { - reg = <1>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts index 7bea5b6bceb..ff464d9d1e8 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts @@ -254,21 +254,104 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy4: ethernet-phy@4 { - reg = <4>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts index 6f0ba09c872..030d4456683 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts @@ -337,21 +337,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0xaa545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy4: ethernet-phy@4 { - reg = <4>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts index b0db8c88635..4fddf5e90a4 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts @@ -369,21 +369,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy4: ethernet-phy@4 { - reg = <4>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts index 431c9cd9af8..47829a08aa2 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts @@ -141,20 +141,105 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x06000000 /* PAD0_MODE */ - 0x0000c 0x00080080 /* PAD6_MODE */ - 0x000e4 0x0006a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x0000004e /* PORT0_STATUS */ - 0x00094 0x0000004e /* PORT6_STATUS */ - >; - }; +switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - ethernet-phy@4 { - reg = <4>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts index 359b4cd470c..37055f110b4 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts @@ -270,21 +270,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - ethernet-phy@4 { - reg = <4>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts index 39fd81fe553..97d76e11f0d 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts @@ -195,25 +195,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x07600000 /* PAD0_MODE */ - 0x00008 0x01000000 /* PAD5_MODE */ - 0x0000c 0x00000080 /* PAD6_MODE */ - 0x00050 0xcc35cc35 /* LED_CTRL0 */ - 0x00054 0xca35ca35 /* LED_CTRL1 */ - 0x00058 0xc935c935 /* LED_CTRL2 */ - 0x0005c 0x03ffff00 /* LED_CTRL3 */ - 0x000e4 0x0006a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x0000007e /* PORT0_STATUS */ - 0x00094 0x0000007e /* PORT6_STATUS */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - ethernet-phy@4 { - reg = <4>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts index 60a949f44e3..96becfb4c1e 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts @@ -245,40 +245,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0xaa545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */ - 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */ - 0x00978 0x19008643 /* QM_PORT1_CTRL0 */ - 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */ - 0x00980 0x19008643 /* QM_PORT2_CTRL0 */ - 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */ - 0x00988 0x19008643 /* QM_PORT3_CTRL0 */ - 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */ - 0x00990 0x19008643 /* QM_PORT4_CTRL0 */ - 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */ - 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */ - 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */ - 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */ - 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */ - >; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; - phy4: ethernet-phy@4 { - reg = <4>; - qca,ar8327-initvals = < - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x0000c 0x80 /* PAD6_MODE */ - >; + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi index 2328c497ea1..ecd2c5634a9 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi @@ -302,43 +302,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0xaa545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */ - 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */ - 0x00978 0x19008643 /* QM_PORT1_CTRL0 */ - 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */ - 0x00980 0x19008643 /* QM_PORT2_CTRL0 */ - 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */ - 0x00988 0x19008643 /* QM_PORT3_CTRL0 */ - 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */ - 0x00990 0x19008643 /* QM_PORT4_CTRL0 */ - 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */ - 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */ - 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */ - 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */ - 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */ - >; - qca,ar8327-vlans = < - 0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */ - 0x2 0x21 /* VLAN2 Ports 0/5 */ - >; - }; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; - phy4: ethernet-phy@4 { - reg = <4>; - qca,ar8327-initvals = < - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x0000c 0x80 /* PAD6_MODE */ - >; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts index 8d9601b6324..87948bb1d6a 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts @@ -297,19 +297,106 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0x0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0xaa545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - 0x00050 0xcf02cf02 /* LED_CTRL_0 */ - 0x00054 0xc832c832 /* LED_CTRL_1 */ - >; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; }; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts index 7b236af253e..bb00bbe7d31 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts @@ -311,17 +311,95 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - ethernet-phy@0 { - reg = <0x0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0xaa545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + }; }; phy7: ethernet-phy@7 { diff --git a/target/linux/ipq806x/image/chromium.mk b/target/linux/ipq806x/image/chromium.mk index ba989299760..637f17a94ac 100644 --- a/target/linux/ipq806x/image/chromium.mk +++ b/target/linux/ipq806x/image/chromium.mk @@ -1,3 +1,8 @@ +define Device/dsa-migration + DEVICE_COMPAT_VERSION := 1.1 + DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA +endef + define Build/cros-gpt cp $@ $@.tmp 2>/dev/null || true ptgen -o $@.tmp -g \ @@ -47,6 +52,7 @@ endef define Device/asus_onhub $(call Device/OnhubImage) + $(Device/dsa-migration) DEVICE_VENDOR := ASUS DEVICE_MODEL := OnHub SRT-AC1900 DEVICE_DTS := $$(SOC)-asus-onhub @@ -56,6 +62,7 @@ TARGET_DEVICES += asus_onhub define Device/tplink_onhub $(call Device/OnhubImage) + $(Device/dsa-migration) DEVICE_VENDOR := TP-Link DEVICE_MODEL := OnHub AC1900 Cloud Router DEVICE_DTS := $$(SOC)-tplink-onhub diff --git a/target/linux/ipq806x/image/generic.mk b/target/linux/ipq806x/image/generic.mk index a3e9eb59e72..0339a612d8e 100644 --- a/target/linux/ipq806x/image/generic.mk +++ b/target/linux/ipq806x/image/generic.mk @@ -8,6 +8,16 @@ define Device/kernel-size-migration use the force flag when image check fails. Settings will be lost. *** endef +define Device/dsa-migration + DEVICE_COMPAT_VERSION := 1.1 + DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA +endef + +define Device/dsa-migration-from-2_0 + DEVICE_COMPAT_VERSION := 2.1 + DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA +endef + define Build/buffalo-rootfs-cksum ( \ echo -ne "\x$$(od -A n -t u1 $@ | tr -s ' ' '\n' | \ @@ -67,6 +77,7 @@ endef define Device/arris_tr4400-v2 $(call Device/LegacyImage) + $(Device/dsa-migration) DEVICE_VENDOR := Arris DEVICE_MODEL := TR4400 DEVICE_VARIANT := v2 @@ -80,6 +91,7 @@ TARGET_DEVICES += arris_tr4400-v2 define Device/askey_rt4230w-rev6 $(call Device/LegacyImage) + $(Device/dsa-migration) DEVICE_VENDOR := Askey DEVICE_MODEL := RT4230W DEVICE_VARIANT := REV6 @@ -94,6 +106,7 @@ TARGET_DEVICES += askey_rt4230w-rev6 define Device/asrock_g10 $(call Device/FitImage) $(call Device/UbiFit) + $(Device/dsa-migration) SOC := qcom-ipq8064 DEVICE_VENDOR := ASRock DEVICE_MODEL := G10 @@ -107,6 +120,7 @@ TARGET_DEVICES += asrock_g10 define Device/buffalo_wxr-2533dhp $(call Device/LegacyImage) + $(Device/dsa-migration) SOC := qcom-ipq8064 DEVICE_VENDOR := Buffalo DEVICE_MODEL := WXR-2533DHP @@ -123,6 +137,7 @@ TARGET_DEVICES += buffalo_wxr-2533dhp define Device/compex_wpq864 $(call Device/FitImage) $(call Device/UbiFit) + $(Device/dsa-migration) DEVICE_VENDOR := Compex DEVICE_MODEL := WPQ864 BLOCKSIZE := 128k @@ -148,6 +163,7 @@ TARGET_DEVICES += edgecore_ecw5410 define Device/linksys_ea7500-v1 $(call Device/LegacyImage) $(Device/kernel-size-migration) + $(Device/dsa-migration-from-2_0) DEVICE_VENDOR := Linksys DEVICE_MODEL := EA7500 DEVICE_VARIANT := v1 @@ -168,6 +184,7 @@ TARGET_DEVICES += linksys_ea7500-v1 define Device/linksys_ea8500 $(call Device/LegacyImage) $(Device/kernel-size-migration) + $(Device/dsa-migration-from-2_0) DEVICE_VENDOR := Linksys DEVICE_MODEL := EA8500 SOC := qcom-ipq8064 @@ -223,6 +240,7 @@ TARGET_DEVICES += meraki_mr52 define Device/nec_wg2600hp $(call Device/LegacyImage) + $(Device/dsa-migration) DEVICE_VENDOR := NEC DEVICE_MODEL := Aterm WG2600HP SOC := qcom-ipq8064 @@ -236,6 +254,7 @@ TARGET_DEVICES += nec_wg2600hp define Device/nec_wg2600hp3 $(call Device/LegacyImage) + $(Device/dsa-migration) DEVICE_VENDOR := NEC Platforms DEVICE_MODEL := Aterm WG2600HP3 SOC := qcom-ipq8062 @@ -252,6 +271,7 @@ TARGET_DEVICES += nec_wg2600hp3 define Device/netgear_d7800 $(call Device/DniImage) + $(Device/dsa-migration) DEVICE_VENDOR := NETGEAR DEVICE_MODEL := Nighthawk X4 D7800 SOC := qcom-ipq8064 @@ -271,6 +291,7 @@ TARGET_DEVICES += netgear_d7800 define Device/netgear_r7500 $(call Device/DniImage) + $(Device/dsa-migration) DEVICE_VENDOR := NETGEAR DEVICE_MODEL := Nighthawk X4 R7500 DEVICE_VARIANT := v1 @@ -288,6 +309,7 @@ TARGET_DEVICES += netgear_r7500 define Device/netgear_r7500v2 $(call Device/DniImage) + $(Device/dsa-migration) DEVICE_VENDOR := NETGEAR DEVICE_MODEL := Nighthawk X4 R7500 DEVICE_VARIANT := v2 @@ -306,6 +328,7 @@ TARGET_DEVICES += netgear_r7500v2 define Device/netgear_r7800 $(call Device/DniImage) + $(Device/dsa-migration) DEVICE_VENDOR := NETGEAR DEVICE_MODEL := Nighthawk X4S R7800 SOC := qcom-ipq8065 @@ -322,6 +345,7 @@ TARGET_DEVICES += netgear_r7800 define Device/netgear_xr450 $(call Device/DniImage) + $(Device/dsa-migration) DEVICE_VENDOR := NETGEAR DEVICE_MODEL := Nighthawk XR450 SOC := qcom-ipq8065 @@ -336,6 +360,7 @@ TARGET_DEVICES += netgear_xr450 define Device/netgear_xr500 $(call Device/DniImage) + $(Device/dsa-migration) DEVICE_VENDOR := NETGEAR DEVICE_MODEL := Nighthawk XR500 SOC := qcom-ipq8065 @@ -351,6 +376,7 @@ TARGET_DEVICES += netgear_xr500 define Device/nokia_ac400i $(call Device/FitImage) $(call Device/UbiFit) + $(Device/dsa-migration) DEVICE_VENDOR := Nokia DEVICE_MODEL := AC400i SOC := qcom-ipq8065 @@ -365,6 +391,7 @@ TARGET_DEVICES += nokia_ac400i define Device/qcom_ipq8064-ap148 $(call Device/FitImage) $(call Device/UbiFit) + $(Device/dsa-migration) DEVICE_VENDOR := Qualcomm DEVICE_MODEL := AP148 DEVICE_VARIANT := standard @@ -382,6 +409,7 @@ TARGET_DEVICES += qcom_ipq8064-ap148 define Device/qcom_ipq8064-ap148-legacy $(call Device/LegacyImage) $(call Device/UbiFit) + $(Device/dsa-migration) DEVICE_VENDOR := Qualcomm DEVICE_MODEL := AP148 DEVICE_VARIANT := legacy @@ -398,6 +426,7 @@ TARGET_DEVICES += qcom_ipq8064-ap148-legacy define Device/qcom_ipq8064-ap161 $(call Device/FitImage) $(call Device/UbiFit) + $(Device/dsa-migration) DEVICE_VENDOR := Qualcomm DEVICE_MODEL := AP161 SOC := qcom-ipq8064 @@ -412,6 +441,7 @@ TARGET_DEVICES += qcom_ipq8064-ap161 define Device/qcom_ipq8064-db149 $(call Device/FitImage) + $(Device/dsa-migration) DEVICE_VENDOR := Qualcomm DEVICE_MODEL := DB149 SOC := qcom-ipq8064 @@ -424,6 +454,7 @@ TARGET_DEVICES += qcom_ipq8064-db149 define Device/tplink_ad7200 $(call Device/TpSafeImage) + $(Device/dsa-migration) DEVICE_VENDOR := TP-Link DEVICE_MODEL := AD7200 DEVICE_VARIANT := v1/v2 @@ -440,6 +471,7 @@ TARGET_DEVICES += tplink_ad7200 define Device/tplink_c2600 $(call Device/TpSafeImage) + $(Device/dsa-migration) DEVICE_VENDOR := TP-Link DEVICE_MODEL := Archer C2600 DEVICE_VARIANT := v1 @@ -454,6 +486,7 @@ endef TARGET_DEVICES += tplink_c2600 define Device/tplink_vr2600v + $(Device/dsa-migration) DEVICE_VENDOR := TP-Link DEVICE_MODEL := Archer VR2600v DEVICE_VARIANT := v1 @@ -486,6 +519,7 @@ endef TARGET_DEVICES += ubnt_unifi-ac-hd define Device/zyxel_nbg6817 + $(Device/dsa-migration) DEVICE_VENDOR := ZyXEL DEVICE_MODEL := NBG6817 SOC := qcom-ipq8065 From f166c9e6177123d8ef67150bb6376c217a261414 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Tue, 20 Jun 2023 09:57:07 +0200 Subject: [PATCH 02/20] ipq806x: move ASRock G10 fix mac preinit script to generic board.d script Drop and move ASRock G10 preinit script to fix mac address to generic board.d script and rework for consistency with other devices following a similar implementation. Signed-off-by: Christian Marangi --- .../ipq806x/base-files/etc/board.d/02_network | 6 ++++++ .../lib/preinit/05_set_iface_mac_ipq806x.sh | 14 -------------- 2 files changed, 6 insertions(+), 14 deletions(-) delete mode 100644 target/linux/ipq806x/base-files/lib/preinit/05_set_iface_mac_ipq806x.sh diff --git a/target/linux/ipq806x/base-files/etc/board.d/02_network b/target/linux/ipq806x/base-files/etc/board.d/02_network index d64805b8f5e..3ba3ff79e9e 100644 --- a/target/linux/ipq806x/base-files/etc/board.d/02_network +++ b/target/linux/ipq806x/base-files/etc/board.d/02_network @@ -83,6 +83,12 @@ ipq806x_setup_macs() ucidef_set_interface_macaddr "lan" "$(macaddr_add $hw_mac_addr 2)" ucidef_set_interface_macaddr "wan" "$(macaddr_add $hw_mac_addr 3)" ;; + asrock,g10) + hw_mac_addr=$(mtd_get_mac_ascii hwconfig HW.LAN.MAC.Address) + ucidef_set_interface_macaddr "lan" "$hw_mac_addr" + hw_mac_addr=$(mtd_get_mac_ascii hwconfig HW.WAN.MAC.Address) + ucidef_set_interface_macaddr "wan" "$hw_mac_addr" + ;; esac } diff --git a/target/linux/ipq806x/base-files/lib/preinit/05_set_iface_mac_ipq806x.sh b/target/linux/ipq806x/base-files/lib/preinit/05_set_iface_mac_ipq806x.sh deleted file mode 100644 index ca8d0b1555f..00000000000 --- a/target/linux/ipq806x/base-files/lib/preinit/05_set_iface_mac_ipq806x.sh +++ /dev/null @@ -1,14 +0,0 @@ -. /lib/functions.sh - -preinit_set_mac_address() { - case $(board_name) in - asrock,g10) - lan_mac=$(mtd_get_mac_ascii hwconfig HW.LAN.MAC.Address) - wan_mac=$(mtd_get_mac_ascii hwconfig HW.WAN.MAC.Address) - ip link set dev eth0 address "${lan_mac}" - ip link set dev eth1 address "${wan_mac}" - ;; - esac -} - -boot_hook_add preinit_main preinit_set_mac_address From a62b1544d15d5cfd9622efcd22b7b835297a1a41 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Tue, 26 Sep 2023 13:47:44 +0200 Subject: [PATCH 03/20] generic: 6.1: backport various qca8k fixes patch Backport various QCA8K fixes patch merged upstream. Refresh any changed patches due to backports. Signed-off-by: Christian Marangi --- ...d-QCA8K_ATU_TABLE_SIZE-define-for-fd.patch | 63 +++++ ...a8k-convert-to-regmap-read-write-API.patch | 261 ++++++++++++++++++ ...-enable-use_single_write-for-qca8xxx.patch | 78 ++++++ ...ke-learning-configurable-and-keep-of.patch | 146 ++++++++++ ...mit-user-ports-access-to-the-first-C.patch | 53 ++++ ...ve-qca8xxx-hol-fixup-to-separate-fun.patch | 111 ++++++++ ...e-dsa_for_each-macro-instead-of-for-.patch | 158 +++++++++++ ...a8k-move-qca8k_port_to_phy-to-header.patch | 4 +- ...net-dsa-qca8k-add-LEDs-basic-support.patch | 6 +- 9 files changed, 875 insertions(+), 5 deletions(-) create mode 100644 target/linux/generic/backport-6.1/778-v6.3-01-net-dsa-qca8k-add-QCA8K_ATU_TABLE_SIZE-define-for-fd.patch create mode 100644 target/linux/generic/backport-6.1/778-v6.3-02-net-dsa-qca8k-convert-to-regmap-read-write-API.patch create mode 100644 target/linux/generic/backport-6.1/779-v6.5-net-dsa-qca8k-enable-use_single_write-for-qca8xxx.patch create mode 100644 target/linux/generic/backport-6.1/780-v6.6-01-net-dsa-qca8k-make-learning-configurable-and-keep-of.patch create mode 100644 target/linux/generic/backport-6.1/780-v6.6-02-net-dsa-qca8k-limit-user-ports-access-to-the-first-C.patch create mode 100644 target/linux/generic/backport-6.1/780-v6.6-03-net-dsa-qca8k-move-qca8xxx-hol-fixup-to-separate-fun.patch create mode 100644 target/linux/generic/backport-6.1/780-v6.6-04-net-dsa-qca8k-use-dsa_for_each-macro-instead-of-for-.patch diff --git a/target/linux/generic/backport-6.1/778-v6.3-01-net-dsa-qca8k-add-QCA8K_ATU_TABLE_SIZE-define-for-fd.patch b/target/linux/generic/backport-6.1/778-v6.3-01-net-dsa-qca8k-add-QCA8K_ATU_TABLE_SIZE-define-for-fd.patch new file mode 100644 index 00000000000..9331fd536d9 --- /dev/null +++ b/target/linux/generic/backport-6.1/778-v6.3-01-net-dsa-qca8k-add-QCA8K_ATU_TABLE_SIZE-define-for-fd.patch @@ -0,0 +1,63 @@ +From e03cea60c3db8c6b011cc36ecef9281dff8377f3 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 25 Jan 2023 21:35:16 +0100 +Subject: [PATCH] net: dsa: qca8k: add QCA8K_ATU_TABLE_SIZE define for fdb + access + +Add and use QCA8K_ATU_TABLE_SIZE instead of hardcoding the ATU size with +a pure number and using sizeof on the array. + +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-common.c | 10 ++++++---- + drivers/net/dsa/qca/qca8k.h | 2 ++ + 2 files changed, 8 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -150,11 +150,12 @@ static int qca8k_busy_wait(struct qca8k_ + + static int qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb) + { +- u32 reg[3]; ++ u32 reg[QCA8K_ATU_TABLE_SIZE]; + int ret; + + /* load the ARL table into an array */ +- ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); ++ ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, ++ QCA8K_ATU_TABLE_SIZE * sizeof(u32)); + if (ret) + return ret; + +@@ -178,7 +179,7 @@ static int qca8k_fdb_read(struct qca8k_p + static void qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask, + const u8 *mac, u8 aging) + { +- u32 reg[3] = { 0 }; ++ u32 reg[QCA8K_ATU_TABLE_SIZE] = { 0 }; + + /* vid - 83:72 */ + reg[2] = FIELD_PREP(QCA8K_ATU_VID_MASK, vid); +@@ -195,7 +196,8 @@ static void qca8k_fdb_write(struct qca8k + reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]); + + /* load the array into the ARL table */ +- qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); ++ qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, ++ QCA8K_ATU_TABLE_SIZE * sizeof(u32)); + } + + static int qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -148,6 +148,8 @@ + #define QCA8K_REG_IPV4_PRI_ADDR_MASK 0x474 + + /* Lookup registers */ ++#define QCA8K_ATU_TABLE_SIZE 3 /* 12 bytes wide table / sizeof(u32) */ ++ + #define QCA8K_REG_ATU_DATA0 0x600 + #define QCA8K_ATU_ADDR2_MASK GENMASK(31, 24) + #define QCA8K_ATU_ADDR3_MASK GENMASK(23, 16) diff --git a/target/linux/generic/backport-6.1/778-v6.3-02-net-dsa-qca8k-convert-to-regmap-read-write-API.patch b/target/linux/generic/backport-6.1/778-v6.3-02-net-dsa-qca8k-convert-to-regmap-read-write-API.patch new file mode 100644 index 00000000000..f66149ae37d --- /dev/null +++ b/target/linux/generic/backport-6.1/778-v6.3-02-net-dsa-qca8k-convert-to-regmap-read-write-API.patch @@ -0,0 +1,261 @@ +From c766e077d927e1775902c18827205ea2ade3a35d Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 25 Jan 2023 21:35:17 +0100 +Subject: [PATCH] net: dsa: qca8k: convert to regmap read/write API + +Convert qca8k to regmap read/write bulk API. The mgmt eth can write up +to 32 bytes of data at times. Currently we use a custom function to do +it but regmap now supports declaration of read/write bulk even without a +bus. + +Drop the custom function and rework the regmap function to this new +implementation. + +Rework the qca8k_fdb_read/write function to use the new +regmap_bulk_read/write as the old qca8k_bulk_read/write are now dropped. + +Cc: Mark Brown +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 92 ++++++++++++++++++++++++------ + drivers/net/dsa/qca/qca8k-common.c | 47 ++------------- + drivers/net/dsa/qca/qca8k.h | 3 - + 3 files changed, 77 insertions(+), 65 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -425,16 +425,12 @@ qca8k_regmap_update_bits_eth(struct qca8 + } + + static int +-qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) ++qca8k_read_mii(struct qca8k_priv *priv, uint32_t reg, uint32_t *val) + { +- struct qca8k_priv *priv = (struct qca8k_priv *)ctx; + struct mii_bus *bus = priv->bus; + u16 r1, r2, page; + int ret; + +- if (!qca8k_read_eth(priv, reg, val, sizeof(*val))) +- return 0; +- + qca8k_split_addr(reg, &r1, &r2, &page); + + mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +@@ -451,16 +447,12 @@ exit: + } + + static int +-qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val) ++qca8k_write_mii(struct qca8k_priv *priv, uint32_t reg, uint32_t val) + { +- struct qca8k_priv *priv = (struct qca8k_priv *)ctx; + struct mii_bus *bus = priv->bus; + u16 r1, r2, page; + int ret; + +- if (!qca8k_write_eth(priv, reg, &val, sizeof(val))) +- return 0; +- + qca8k_split_addr(reg, &r1, &r2, &page); + + mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +@@ -477,17 +469,14 @@ exit: + } + + static int +-qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val) ++qca8k_regmap_update_bits_mii(struct qca8k_priv *priv, uint32_t reg, ++ uint32_t mask, uint32_t write_val) + { +- struct qca8k_priv *priv = (struct qca8k_priv *)ctx; + struct mii_bus *bus = priv->bus; + u16 r1, r2, page; + u32 val; + int ret; + +- if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val)) +- return 0; +- + qca8k_split_addr(reg, &r1, &r2, &page); + + mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +@@ -510,17 +499,84 @@ exit: + return ret; + } + ++static int ++qca8k_bulk_read(void *ctx, const void *reg_buf, size_t reg_len, ++ void *val_buf, size_t val_len) ++{ ++ int i, count = val_len / sizeof(u32), ret; ++ u32 reg = *(u32 *)reg_buf & U16_MAX; ++ struct qca8k_priv *priv = ctx; ++ ++ if (priv->mgmt_master && ++ !qca8k_read_eth(priv, reg, val_buf, val_len)) ++ return 0; ++ ++ /* loop count times and increment reg of 4 */ ++ for (i = 0; i < count; i++, reg += sizeof(u32)) { ++ ret = qca8k_read_mii(priv, reg, val_buf + i); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_bulk_gather_write(void *ctx, const void *reg_buf, size_t reg_len, ++ const void *val_buf, size_t val_len) ++{ ++ int i, count = val_len / sizeof(u32), ret; ++ u32 reg = *(u32 *)reg_buf & U16_MAX; ++ struct qca8k_priv *priv = ctx; ++ u32 *val = (u32 *)val_buf; ++ ++ if (priv->mgmt_master && ++ !qca8k_write_eth(priv, reg, val, val_len)) ++ return 0; ++ ++ /* loop count times, increment reg of 4 and increment val ptr to ++ * the next value ++ */ ++ for (i = 0; i < count; i++, reg += sizeof(u32), val++) { ++ ret = qca8k_write_mii(priv, reg, *val); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_bulk_write(void *ctx, const void *data, size_t bytes) ++{ ++ return qca8k_bulk_gather_write(ctx, data, sizeof(u16), data + sizeof(u16), ++ bytes - sizeof(u16)); ++} ++ ++static int ++qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val) ++{ ++ struct qca8k_priv *priv = ctx; ++ ++ if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val)) ++ return 0; ++ ++ return qca8k_regmap_update_bits_mii(priv, reg, mask, write_val); ++} ++ + static struct regmap_config qca8k_regmap_config = { + .reg_bits = 16, + .val_bits = 32, + .reg_stride = 4, + .max_register = 0x16ac, /* end MIB - Port6 range */ +- .reg_read = qca8k_regmap_read, +- .reg_write = qca8k_regmap_write, ++ .read = qca8k_bulk_read, ++ .write = qca8k_bulk_write, + .reg_update_bits = qca8k_regmap_update_bits, + .rd_table = &qca8k_readable_table, + .disable_locking = true, /* Locking is handled by qca8k read/write */ + .cache_type = REGCACHE_NONE, /* Explicitly disable CACHE */ ++ .max_raw_read = 32, /* mgmt eth can read/write up to 8 registers at time */ ++ .max_raw_write = 32, + }; + + static int +@@ -2091,8 +2147,6 @@ static SIMPLE_DEV_PM_OPS(qca8k_pm_ops, + + static const struct qca8k_info_ops qca8xxx_ops = { + .autocast_mib = qca8k_get_ethtool_stats_eth, +- .read_eth = qca8k_read_eth, +- .write_eth = qca8k_write_eth, + }; + + static const struct qca8k_match_data qca8327 = { +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -101,45 +101,6 @@ const struct regmap_access_table qca8k_r + .n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges), + }; + +-/* TODO: remove these extra ops when we can support regmap bulk read/write */ +-static int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- int i, count = len / sizeof(u32), ret; +- +- if (priv->mgmt_master && priv->info->ops->read_eth && +- !priv->info->ops->read_eth(priv, reg, val, len)) +- return 0; +- +- for (i = 0; i < count; i++) { +- ret = regmap_read(priv->regmap, reg + (i * 4), val + i); +- if (ret < 0) +- return ret; +- } +- +- return 0; +-} +- +-/* TODO: remove these extra ops when we can support regmap bulk read/write */ +-static int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- int i, count = len / sizeof(u32), ret; +- u32 tmp; +- +- if (priv->mgmt_master && priv->info->ops->write_eth && +- !priv->info->ops->write_eth(priv, reg, val, len)) +- return 0; +- +- for (i = 0; i < count; i++) { +- tmp = val[i]; +- +- ret = regmap_write(priv->regmap, reg + (i * 4), tmp); +- if (ret < 0) +- return ret; +- } +- +- return 0; +-} +- + static int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask) + { + u32 val; +@@ -154,8 +115,8 @@ static int qca8k_fdb_read(struct qca8k_p + int ret; + + /* load the ARL table into an array */ +- ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, +- QCA8K_ATU_TABLE_SIZE * sizeof(u32)); ++ ret = regmap_bulk_read(priv->regmap, QCA8K_REG_ATU_DATA0, reg, ++ QCA8K_ATU_TABLE_SIZE); + if (ret) + return ret; + +@@ -196,8 +157,8 @@ static void qca8k_fdb_write(struct qca8k + reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]); + + /* load the array into the ARL table */ +- qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, +- QCA8K_ATU_TABLE_SIZE * sizeof(u32)); ++ regmap_bulk_write(priv->regmap, QCA8K_REG_ATU_DATA0, reg, ++ QCA8K_ATU_TABLE_SIZE); + } + + static int qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -330,9 +330,6 @@ struct qca8k_priv; + + struct qca8k_info_ops { + int (*autocast_mib)(struct dsa_switch *ds, int port, u64 *data); +- /* TODO: remove these extra ops when we can support regmap bulk read/write */ +- int (*read_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len); +- int (*write_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len); + }; + + struct qca8k_match_data { diff --git a/target/linux/generic/backport-6.1/779-v6.5-net-dsa-qca8k-enable-use_single_write-for-qca8xxx.patch b/target/linux/generic/backport-6.1/779-v6.5-net-dsa-qca8k-enable-use_single_write-for-qca8xxx.patch new file mode 100644 index 00000000000..3619440f075 --- /dev/null +++ b/target/linux/generic/backport-6.1/779-v6.5-net-dsa-qca8k-enable-use_single_write-for-qca8xxx.patch @@ -0,0 +1,78 @@ +From 2c39dd025da489cf87d26469d9f5ff19715324a0 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 24 Jul 2023 05:25:28 +0200 +Subject: [PATCH 1/4] net: dsa: qca8k: enable use_single_write for qca8xxx + +The qca8xxx switch supports 2 way to write reg values, a slow way using +mdio and a fast way by sending specially crafted mgmt packet to +read/write reg. + +The fast way can support up to 32 bytes of data as eth packet are used +to send/receive. + +This correctly works for almost the entire regmap of the switch but with +the use of some kernel selftests for dsa drivers it was found a funny +and interesting hw defect/limitation. + +For some specific reg, bulk write won't work and will result in writing +only part of the requested regs resulting in half data written. This was +especially hard to track and discover due to the total strangeness of +the problem and also by the specific regs where this occurs. + +This occurs in the specific regs of the ATU table, where multiple entry +needs to be written to compose the entire entry. +It was discovered that with a bulk write of 12 bytes on +QCA8K_REG_ATU_DATA0 only QCA8K_REG_ATU_DATA0 and QCA8K_REG_ATU_DATA2 +were written, but QCA8K_REG_ATU_DATA1 was always zero. +Tcpdump was used to make sure the specially crafted packet was correct +and this was confirmed. + +The problem was hard to track as the lack of QCA8K_REG_ATU_DATA1 +resulted in an entry somehow possible as the first bytes of the mac +address are set in QCA8K_REG_ATU_DATA0 and the entry type is set in +QCA8K_REG_ATU_DATA2. + +Funlly enough writing QCA8K_REG_ATU_DATA1 results in the same problem +with QCA8K_REG_ATU_DATA2 empty and QCA8K_REG_ATU_DATA1 and +QCA8K_REG_ATU_FUNC correctly written. +A speculation on the problem might be that there are some kind of +indirection internally when accessing these regs and they can't be +accessed all together, due to the fact that it's really a table mapped +somewhere in the switch SRAM. + +Even more funny is the fact that every other reg was tested with all +kind of combination and they are not affected by this problem. Read +operation was also tested and always worked so it's not affected by this +problem. + +The problem is not present if we limit writing a single reg at times. + +To handle this hardware defect, enable use_single_write so that bulk +api can correctly split the write in multiple different operation +effectively reverting to a non-bulk write. + +Cc: Mark Brown +Fixes: c766e077d927 ("net: dsa: qca8k: convert to regmap read/write API") +Signed-off-by: Christian Marangi +Cc: stable@vger.kernel.org +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -575,8 +575,11 @@ static struct regmap_config qca8k_regmap + .rd_table = &qca8k_readable_table, + .disable_locking = true, /* Locking is handled by qca8k read/write */ + .cache_type = REGCACHE_NONE, /* Explicitly disable CACHE */ +- .max_raw_read = 32, /* mgmt eth can read/write up to 8 registers at time */ +- .max_raw_write = 32, ++ .max_raw_read = 32, /* mgmt eth can read up to 8 registers at time */ ++ /* ATU regs suffer from a bug where some data are not correctly ++ * written. Disable bulk write to correctly write ATU entry. ++ */ ++ .use_single_write = true, + }; + + static int diff --git a/target/linux/generic/backport-6.1/780-v6.6-01-net-dsa-qca8k-make-learning-configurable-and-keep-of.patch b/target/linux/generic/backport-6.1/780-v6.6-01-net-dsa-qca8k-make-learning-configurable-and-keep-of.patch new file mode 100644 index 00000000000..b1c0a32e1bf --- /dev/null +++ b/target/linux/generic/backport-6.1/780-v6.6-01-net-dsa-qca8k-make-learning-configurable-and-keep-of.patch @@ -0,0 +1,146 @@ +From 23cfc7172e5297d0bee49ac6f6f8248d1cf0820d Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 30 Jul 2023 09:41:10 +0200 +Subject: [PATCH 1/4] net: dsa: qca8k: make learning configurable and keep off + if standalone + +Address learning should initially be turned off by the driver for port +operation in standalone mode, then the DSA core handles changes to it +via ds->ops->port_bridge_flags(). + +Currently this is not the case for qca8k where learning is enabled +unconditionally in qca8k_setup for every user port. + +Handle ports configured in standalone mode by making the learning +configurable and not enabling it by default. + +Implement .port_pre_bridge_flags and .port_bridge_flags dsa ops to +enable learning for bridge that request it and tweak +.port_stp_state_set to correctly disable learning when port is +configured in standalone mode. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Reviewed-by: Florian Fainelli +Link: https://lore.kernel.org/r/20230730074113.21889-2-ansuelsmth@gmail.com +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 7 +++-- + drivers/net/dsa/qca/qca8k-common.c | 48 ++++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 6 ++++ + 3 files changed, 58 insertions(+), 3 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1883,9 +1883,8 @@ qca8k_setup(struct dsa_switch *ds) + if (ret) + return ret; + +- /* Enable ARP Auto-learning by default */ +- ret = regmap_set_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_LEARN); ++ ret = regmap_clear_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(i), ++ QCA8K_PORT_LOOKUP_LEARN); + if (ret) + return ret; + +@@ -1991,6 +1990,8 @@ static const struct dsa_switch_ops qca8k + .port_change_mtu = qca8k_port_change_mtu, + .port_max_mtu = qca8k_port_max_mtu, + .port_stp_state_set = qca8k_port_stp_state_set, ++ .port_pre_bridge_flags = qca8k_port_pre_bridge_flags, ++ .port_bridge_flags = qca8k_port_bridge_flags, + .port_bridge_join = qca8k_port_bridge_join, + .port_bridge_leave = qca8k_port_bridge_leave, + .port_fast_age = qca8k_port_fast_age, +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -565,9 +565,26 @@ int qca8k_get_mac_eee(struct dsa_switch + return 0; + } + ++static int qca8k_port_configure_learning(struct dsa_switch *ds, int port, ++ bool learning) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ if (learning) ++ return regmap_set_bits(priv->regmap, ++ QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_LEARN); ++ else ++ return regmap_clear_bits(priv->regmap, ++ QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_LEARN); ++} ++ + void qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) + { ++ struct dsa_port *dp = dsa_to_port(ds, port); + struct qca8k_priv *priv = ds->priv; ++ bool learning = false; + u32 stp_state; + + switch (state) { +@@ -582,8 +599,11 @@ void qca8k_port_stp_state_set(struct dsa + break; + case BR_STATE_LEARNING: + stp_state = QCA8K_PORT_LOOKUP_STATE_LEARNING; ++ learning = dp->learning; + break; + case BR_STATE_FORWARDING: ++ learning = dp->learning; ++ fallthrough; + default: + stp_state = QCA8K_PORT_LOOKUP_STATE_FORWARD; + break; +@@ -591,6 +611,34 @@ void qca8k_port_stp_state_set(struct dsa + + qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), + QCA8K_PORT_LOOKUP_STATE_MASK, stp_state); ++ ++ qca8k_port_configure_learning(ds, port, learning); ++} ++ ++int qca8k_port_pre_bridge_flags(struct dsa_switch *ds, int port, ++ struct switchdev_brport_flags flags, ++ struct netlink_ext_ack *extack) ++{ ++ if (flags.mask & ~BR_LEARNING) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++int qca8k_port_bridge_flags(struct dsa_switch *ds, int port, ++ struct switchdev_brport_flags flags, ++ struct netlink_ext_ack *extack) ++{ ++ int ret; ++ ++ if (flags.mask & BR_LEARNING) { ++ ret = qca8k_port_configure_learning(ds, port, ++ flags.val & BR_LEARNING); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; + } + + int qca8k_port_bridge_join(struct dsa_switch *ds, int port, +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -448,6 +448,12 @@ int qca8k_get_mac_eee(struct dsa_switch + + /* Common bridge function */ + void qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state); ++int qca8k_port_pre_bridge_flags(struct dsa_switch *ds, int port, ++ struct switchdev_brport_flags flags, ++ struct netlink_ext_ack *extack); ++int qca8k_port_bridge_flags(struct dsa_switch *ds, int port, ++ struct switchdev_brport_flags flags, ++ struct netlink_ext_ack *extack); + int qca8k_port_bridge_join(struct dsa_switch *ds, int port, + struct dsa_bridge bridge, + bool *tx_fwd_offload, diff --git a/target/linux/generic/backport-6.1/780-v6.6-02-net-dsa-qca8k-limit-user-ports-access-to-the-first-C.patch b/target/linux/generic/backport-6.1/780-v6.6-02-net-dsa-qca8k-limit-user-ports-access-to-the-first-C.patch new file mode 100644 index 00000000000..b430d2f7922 --- /dev/null +++ b/target/linux/generic/backport-6.1/780-v6.6-02-net-dsa-qca8k-limit-user-ports-access-to-the-first-C.patch @@ -0,0 +1,53 @@ +From 18e8feae4a807994e4906d659116d249bfecd4c5 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 30 Jul 2023 09:41:11 +0200 +Subject: [PATCH 2/4] net: dsa: qca8k: limit user ports access to the first CPU + port on setup + +In preparation for multi-CPU support, set CPU port LOOKUP MEMBER outside +the port loop and setup the LOOKUP MEMBER mask for user ports only to +the first CPU port. + +This is to handle flooding condition where every CPU port is set as +target and prevent packet duplication for unknown frames from user ports. + +Secondary CPU port LOOKUP MEMBER mask will be setup later when +port_change_master will be implemented. + +Signed-off-by: Christian Marangi +Reviewed-by: Simon Horman +Reviewed-by: Florian Fainelli +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20230730074113.21889-3-ansuelsmth@gmail.com +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 14 ++++++-------- + 1 file changed, 6 insertions(+), 8 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1863,18 +1863,16 @@ qca8k_setup(struct dsa_switch *ds) + if (ret) + return ret; + ++ /* CPU port gets connected to all user ports of the switch */ ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(cpu_port), ++ QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds)); ++ if (ret) ++ return ret; ++ + /* Setup connection between CPU port & user ports + * Configure specific switch configuration for ports + */ + for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- /* CPU port gets connected to all user ports of the switch */ +- if (dsa_is_cpu_port(ds, i)) { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds)); +- if (ret) +- return ret; +- } +- + /* Individual user ports get connected to CPU port only */ + if (dsa_is_user_port(ds, i)) { + ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), diff --git a/target/linux/generic/backport-6.1/780-v6.6-03-net-dsa-qca8k-move-qca8xxx-hol-fixup-to-separate-fun.patch b/target/linux/generic/backport-6.1/780-v6.6-03-net-dsa-qca8k-move-qca8xxx-hol-fixup-to-separate-fun.patch new file mode 100644 index 00000000000..9423c4b6047 --- /dev/null +++ b/target/linux/generic/backport-6.1/780-v6.6-03-net-dsa-qca8k-move-qca8xxx-hol-fixup-to-separate-fun.patch @@ -0,0 +1,111 @@ +From a9108b0712bf018dc69020864b21485b71b17dfc Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 30 Jul 2023 09:41:12 +0200 +Subject: [PATCH 3/4] net: dsa: qca8k: move qca8xxx hol fixup to separate + function + +Move qca8xxx hol fixup to separate function to tidy things up and to +permit using a more efficent loop in future patch. + +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Link: https://lore.kernel.org/r/20230730074113.21889-4-ansuelsmth@gmail.com +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 78 +++++++++++++++++--------------- + 1 file changed, 42 insertions(+), 36 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1773,6 +1773,46 @@ static int qca8k_connect_tag_protocol(st + return 0; + } + ++static void qca8k_setup_hol_fixup(struct qca8k_priv *priv, int port) ++{ ++ u32 mask; ++ ++ switch (port) { ++ /* The 2 CPU port and port 5 requires some different ++ * priority than any other ports. ++ */ ++ case 0: ++ case 5: ++ case 6: ++ mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) | ++ QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e); ++ break; ++ default: ++ mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) | ++ QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19); ++ } ++ regmap_write(priv->regmap, QCA8K_REG_PORT_HOL_CTRL0(port), mask); ++ ++ mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) | ++ QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_WRED_EN; ++ regmap_update_bits(priv->regmap, QCA8K_REG_PORT_HOL_CTRL1(port), ++ QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK | ++ QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_WRED_EN, ++ mask); ++} ++ + static int + qca8k_setup(struct dsa_switch *ds) + { +@@ -1908,42 +1948,8 @@ qca8k_setup(struct dsa_switch *ds) + * missing settings to improve switch stability under load condition. + * This problem is limited to qca8337 and other qca8k switch are not affected. + */ +- if (priv->switch_id == QCA8K_ID_QCA8337) { +- switch (i) { +- /* The 2 CPU port and port 5 requires some different +- * priority than any other ports. +- */ +- case 0: +- case 5: +- case 6: +- mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) | +- QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e); +- break; +- default: +- mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) | +- QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19); +- } +- qca8k_write(priv, QCA8K_REG_PORT_HOL_CTRL0(i), mask); +- +- mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) | +- QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_WRED_EN; +- qca8k_rmw(priv, QCA8K_REG_PORT_HOL_CTRL1(i), +- QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK | +- QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_WRED_EN, +- mask); +- } ++ if (priv->switch_id == QCA8K_ID_QCA8337) ++ qca8k_setup_hol_fixup(priv, i); + } + + /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */ diff --git a/target/linux/generic/backport-6.1/780-v6.6-04-net-dsa-qca8k-use-dsa_for_each-macro-instead-of-for-.patch b/target/linux/generic/backport-6.1/780-v6.6-04-net-dsa-qca8k-use-dsa_for_each-macro-instead-of-for-.patch new file mode 100644 index 00000000000..60de7109652 --- /dev/null +++ b/target/linux/generic/backport-6.1/780-v6.6-04-net-dsa-qca8k-use-dsa_for_each-macro-instead-of-for-.patch @@ -0,0 +1,158 @@ +From 01e6f8ad8d26ced14b0cf288c42e55d03a7c5070 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 30 Jul 2023 09:41:13 +0200 +Subject: [PATCH 4/4] net: dsa: qca8k: use dsa_for_each macro instead of for + loop + +Convert for loop to dsa_for_each macro to save some redundant write on +unconnected/unused port and tidy things up. + +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Link: https://lore.kernel.org/r/20230730074113.21889-5-ansuelsmth@gmail.com +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 107 ++++++++++++++++--------------- + 1 file changed, 54 insertions(+), 53 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1817,7 +1817,8 @@ static int + qca8k_setup(struct dsa_switch *ds) + { + struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- int cpu_port, ret, i; ++ struct dsa_port *dp; ++ int cpu_port, ret; + u32 mask; + + cpu_port = qca8k_find_cpu_port(ds); +@@ -1868,27 +1869,27 @@ qca8k_setup(struct dsa_switch *ds) + dev_warn(priv->dev, "mib init failed"); + + /* Initial setup of all ports */ +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ dsa_switch_for_each_port(dp, ds) { + /* Disable forwarding by default on all ports */ +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(dp->index), + QCA8K_PORT_LOOKUP_MEMBER, 0); + if (ret) + return ret; ++ } + +- /* Enable QCA header mode on all cpu ports */ +- if (dsa_is_cpu_port(ds, i)) { +- ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(i), +- FIELD_PREP(QCA8K_PORT_HDR_CTRL_TX_MASK, QCA8K_PORT_HDR_CTRL_ALL) | +- FIELD_PREP(QCA8K_PORT_HDR_CTRL_RX_MASK, QCA8K_PORT_HDR_CTRL_ALL)); +- if (ret) { +- dev_err(priv->dev, "failed enabling QCA header mode"); +- return ret; +- } ++ /* Disable MAC by default on all user ports */ ++ dsa_switch_for_each_user_port(dp, ds) ++ qca8k_port_set_status(priv, dp->index, 0); ++ ++ /* Enable QCA header mode on all cpu ports */ ++ dsa_switch_for_each_cpu_port(dp, ds) { ++ ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(dp->index), ++ FIELD_PREP(QCA8K_PORT_HDR_CTRL_TX_MASK, QCA8K_PORT_HDR_CTRL_ALL) | ++ FIELD_PREP(QCA8K_PORT_HDR_CTRL_RX_MASK, QCA8K_PORT_HDR_CTRL_ALL)); ++ if (ret) { ++ dev_err(priv->dev, "failed enabling QCA header mode on port %d", dp->index); ++ return ret; + } +- +- /* Disable MAC by default on all user ports */ +- if (dsa_is_user_port(ds, i)) +- qca8k_port_set_status(priv, i, 0); + } + + /* Forward all unknown frames to CPU port for Linux processing +@@ -1910,48 +1911,48 @@ qca8k_setup(struct dsa_switch *ds) + return ret; + + /* Setup connection between CPU port & user ports +- * Configure specific switch configuration for ports ++ * Individual user ports get connected to CPU port only + */ +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- /* Individual user ports get connected to CPU port only */ +- if (dsa_is_user_port(ds, i)) { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_MEMBER, +- BIT(cpu_port)); +- if (ret) +- return ret; +- +- ret = regmap_clear_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_LEARN); +- if (ret) +- return ret; +- +- /* For port based vlans to work we need to set the +- * default egress vid +- */ +- ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(i), +- QCA8K_EGREES_VLAN_PORT_MASK(i), +- QCA8K_EGREES_VLAN_PORT(i, QCA8K_PORT_VID_DEF)); +- if (ret) +- return ret; +- +- ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(i), +- QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) | +- QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF)); +- if (ret) +- return ret; +- } ++ dsa_switch_for_each_user_port(dp, ds) { ++ u8 port = dp->index; + +- /* The port 5 of the qca8337 have some problem in flood condition. The +- * original legacy driver had some specific buffer and priority settings +- * for the different port suggested by the QCA switch team. Add this +- * missing settings to improve switch stability under load condition. +- * This problem is limited to qca8337 and other qca8k switch are not affected. ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_MEMBER, ++ BIT(cpu_port)); ++ if (ret) ++ return ret; ++ ++ ret = regmap_clear_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_LEARN); ++ if (ret) ++ return ret; ++ ++ /* For port based vlans to work we need to set the ++ * default egress vid + */ +- if (priv->switch_id == QCA8K_ID_QCA8337) +- qca8k_setup_hol_fixup(priv, i); ++ ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port), ++ QCA8K_EGREES_VLAN_PORT_MASK(port), ++ QCA8K_EGREES_VLAN_PORT(port, QCA8K_PORT_VID_DEF)); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port), ++ QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) | ++ QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF)); ++ if (ret) ++ return ret; + } + ++ /* The port 5 of the qca8337 have some problem in flood condition. The ++ * original legacy driver had some specific buffer and priority settings ++ * for the different port suggested by the QCA switch team. Add this ++ * missing settings to improve switch stability under load condition. ++ * This problem is limited to qca8337 and other qca8k switch are not affected. ++ */ ++ if (priv->switch_id == QCA8K_ID_QCA8337) ++ dsa_switch_for_each_available_port(dp, ds) ++ qca8k_setup_hol_fixup(priv, dp->index); ++ + /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */ + if (priv->switch_id == QCA8K_ID_QCA8327) { + mask = QCA8K_GLOBAL_FC_GOL_XON_THRES(288) | diff --git a/target/linux/generic/backport-6.1/801-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch b/target/linux/generic/backport-6.1/801-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch index ba8216f7830..3c89819ac08 100644 --- a/target/linux/generic/backport-6.1/801-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch +++ b/target/linux/generic/backport-6.1/801-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch @@ -20,7 +20,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/qca/qca8k-8xxx.c +++ b/drivers/net/dsa/qca/qca8k-8xxx.c -@@ -719,21 +719,6 @@ err_clear_skb: +@@ -778,21 +778,6 @@ err_clear_skb: return ret; } @@ -44,7 +44,7 @@ Signed-off-by: David S. Miller { --- a/drivers/net/dsa/qca/qca8k.h +++ b/drivers/net/dsa/qca/qca8k.h -@@ -422,6 +422,20 @@ struct qca8k_fdb { +@@ -421,6 +421,20 @@ struct qca8k_fdb { u8 mac[6]; }; diff --git a/target/linux/generic/backport-6.1/801-v6.4-02-net-dsa-qca8k-add-LEDs-basic-support.patch b/target/linux/generic/backport-6.1/801-v6.4-02-net-dsa-qca8k-add-LEDs-basic-support.patch index e5cd03f1f30..58478f56ccc 100644 --- a/target/linux/generic/backport-6.1/801-v6.4-02-net-dsa-qca8k-add-LEDs-basic-support.patch +++ b/target/linux/generic/backport-6.1/801-v6.4-02-net-dsa-qca8k-add-LEDs-basic-support.patch @@ -71,7 +71,7 @@ Signed-off-by: David S. Miller static void qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) -@@ -1729,6 +1730,10 @@ qca8k_setup(struct dsa_switch *ds) +@@ -1829,6 +1830,10 @@ qca8k_setup(struct dsa_switch *ds) if (ret) return ret; @@ -386,7 +386,7 @@ Signed-off-by: David S. Miller #define QCA8K_GOL_MAC_ADDR0 0x60 #define QCA8K_GOL_MAC_ADDR1 0x64 #define QCA8K_MAX_FRAME_SIZE 0x78 -@@ -383,6 +429,19 @@ struct qca8k_pcs { +@@ -382,6 +428,19 @@ struct qca8k_pcs { int port; }; @@ -406,7 +406,7 @@ Signed-off-by: David S. Miller struct qca8k_priv { u8 switch_id; u8 switch_revision; -@@ -407,6 +466,7 @@ struct qca8k_priv { +@@ -406,6 +465,7 @@ struct qca8k_priv { struct qca8k_pcs pcs_port_0; struct qca8k_pcs pcs_port_6; const struct qca8k_match_data *info; From 500dbaefd2a6a1c9c0d81e275a28c6a8e26519e4 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Tue, 20 Jun 2023 08:41:32 +0200 Subject: [PATCH 04/20] generic: 6.1: backport patch for multi CPU port support on QCA8K Backport pending patch for multi CPU port support on QCA8K. 6.1 already supports all the requiredt code to change a DSA master port so only this patch fixing the driver is required. Signed-off-by: Christian Marangi --- ...-qca8k-implement-lag_fdb_add-del-ops.patch | 86 ++++++++++ ...a8k-enable-flooding-to-both-CPU-port.patch | 37 ++++ ...k-add-support-for-port_change_master.patch | 158 ++++++++++++++++++ 3 files changed, 281 insertions(+) create mode 100644 target/linux/generic/pending-6.1/711-01-net-dsa-qca8k-implement-lag_fdb_add-del-ops.patch create mode 100644 target/linux/generic/pending-6.1/711-02-net-dsa-qca8k-enable-flooding-to-both-CPU-port.patch create mode 100644 target/linux/generic/pending-6.1/711-03-net-dsa-qca8k-add-support-for-port_change_master.patch diff --git a/target/linux/generic/pending-6.1/711-01-net-dsa-qca8k-implement-lag_fdb_add-del-ops.patch b/target/linux/generic/pending-6.1/711-01-net-dsa-qca8k-implement-lag_fdb_add-del-ops.patch new file mode 100644 index 00000000000..04935d0d7a9 --- /dev/null +++ b/target/linux/generic/pending-6.1/711-01-net-dsa-qca8k-implement-lag_fdb_add-del-ops.patch @@ -0,0 +1,86 @@ +From 3b4329230db8750bea7a56ef07f07cbbf5fc6c5a Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 4 Jul 2023 22:50:12 +0200 +Subject: [PATCH 19/20] net: dsa: qca8k: implement lag_fdb_add/del ops + +Implement lag_fdb_add/del ops to correctly support using LAG interface. +Qca8k switch supports declaring fdb entry for link aggregation by simply +setting the DES_PORT bits to all the LAG member. + +Signed-off-by: Christian Marangi +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 2 ++ + drivers/net/dsa/qca/qca8k-common.c | 48 ++++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 6 ++++ + 3 files changed, 56 insertions(+) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1993,6 +1993,8 @@ static const struct dsa_switch_ops qca8k + .port_fdb_add = qca8k_port_fdb_add, + .port_fdb_del = qca8k_port_fdb_del, + .port_fdb_dump = qca8k_port_fdb_dump, ++ .lag_fdb_add = qca8k_lag_fdb_add, ++ .lag_fdb_del = qca8k_lag_fdb_del, + .port_mdb_add = qca8k_port_mdb_add, + .port_mdb_del = qca8k_port_mdb_del, + .port_mirror_add = qca8k_port_mirror_add, +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -1215,6 +1215,42 @@ int qca8k_port_lag_leave(struct dsa_swit + return qca8k_lag_refresh_portmap(ds, port, lag, true); + } + ++int qca8k_lag_fdb_add(struct dsa_switch *ds, struct dsa_lag lag, ++ const unsigned char *addr, u16 vid, ++ struct dsa_db db) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ struct dsa_port *dp; ++ u16 port_mask = 0; ++ ++ /* Set the vid to the port vlan id if no vid is set */ ++ if (!vid) ++ vid = QCA8K_PORT_VID_DEF; ++ ++ dsa_lag_foreach_port(dp, ds->dst, &lag) ++ port_mask |= BIT(dp->index); ++ ++ return qca8k_port_fdb_insert(priv, addr, port_mask, vid); ++} ++ ++int qca8k_lag_fdb_del(struct dsa_switch *ds, struct dsa_lag lag, ++ const unsigned char *addr, u16 vid, ++ struct dsa_db db) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ struct dsa_port *dp; ++ u16 port_mask = 0; ++ ++ /* Set the vid to the port vlan id if no vid is set */ ++ if (!vid) ++ vid = QCA8K_PORT_VID_DEF; ++ ++ dsa_lag_foreach_port(dp, ds->dst, &lag) ++ port_mask |= BIT(dp->index); ++ ++ return qca8k_fdb_del(priv, addr, port_mask, vid); ++} ++ + int qca8k_read_switch_id(struct qca8k_priv *priv) + { + u32 val; +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -590,5 +590,11 @@ int qca8k_port_lag_join(struct dsa_switc + struct netlink_ext_ack *extack); + int qca8k_port_lag_leave(struct dsa_switch *ds, int port, + struct dsa_lag lag); ++int qca8k_lag_fdb_add(struct dsa_switch *ds, struct dsa_lag lag, ++ const unsigned char *addr, u16 vid, ++ struct dsa_db db); ++int qca8k_lag_fdb_del(struct dsa_switch *ds, struct dsa_lag lag, ++ const unsigned char *addr, u16 vid, ++ struct dsa_db db); + + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/pending-6.1/711-02-net-dsa-qca8k-enable-flooding-to-both-CPU-port.patch b/target/linux/generic/pending-6.1/711-02-net-dsa-qca8k-enable-flooding-to-both-CPU-port.patch new file mode 100644 index 00000000000..27539b9074a --- /dev/null +++ b/target/linux/generic/pending-6.1/711-02-net-dsa-qca8k-enable-flooding-to-both-CPU-port.patch @@ -0,0 +1,37 @@ +From b954d61d9ecfa64450fc178586719dc2a95b92a7 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 20 Jun 2023 21:48:24 +0200 +Subject: [PATCH 3/4] net: dsa: qca8k: enable flooding to both CPU port + +To permit a multi-CPU setup, flood all unknown frames to all CPU ports. +Each CPU port should have correct LOOKUP MEMBER configuration to +prevent receiving duplicate packets from user ports. + +Signed-off-by: Christian Marangi +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 13 +++++-------- + 1 file changed, 5 insertions(+), 8 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1882,15 +1882,12 @@ qca8k_setup(struct dsa_switch *ds) + } + } + +- /* Forward all unknown frames to CPU port for Linux processing +- * Notice that in multi-cpu config only one port should be set +- * for igmp, unknown, multicast and broadcast packet +- */ ++ /* Forward all unknown frames to CPU port for Linux processing */ + ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1, +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK, BIT(cpu_port)) | +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK, BIT(cpu_port)) | +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK, BIT(cpu_port)) | +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK, BIT(cpu_port))); ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK, dsa_cpu_ports(ds)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK, dsa_cpu_ports(ds)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK, dsa_cpu_ports(ds)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK, dsa_cpu_ports(ds))); + if (ret) + return ret; + diff --git a/target/linux/generic/pending-6.1/711-03-net-dsa-qca8k-add-support-for-port_change_master.patch b/target/linux/generic/pending-6.1/711-03-net-dsa-qca8k-add-support-for-port_change_master.patch new file mode 100644 index 00000000000..53a29f547a1 --- /dev/null +++ b/target/linux/generic/pending-6.1/711-03-net-dsa-qca8k-add-support-for-port_change_master.patch @@ -0,0 +1,158 @@ +From b2d6ebf2f92f8695c83fa6979f4ab579c588df76 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 20 Jun 2023 07:57:38 +0200 +Subject: [PATCH 4/4] net: dsa: qca8k: add support for port_change_master + +Add support for port_change_master to permit assigning an alternative +CPU port if the switch have both CPU port connected or create a LAG on +both CPU port and assign the LAG as DSA master. + +On port change master request, we check if the master is a LAG. +With LAG we compose the cpu_port_mask with the CPU port in the LAG, if +master is a simple dsa_port, we derive the index. + +Finally we apply the new cpu_port_mask to the LOOKUP MEMBER to permit +the port to receive packet by the new CPU port setup for the port and we +refresh the CPU ports LOOKUP MEMBER configuration to reflect the new +user port state. + +port_lag_join/leave is updated to refresh the user ports if we detect +that the LAG is a DSA master and we have user port using it as a master. + +Signed-off-by: Christian Marangi +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 116 ++++++++++++++++++++++++++++++- + 1 file changed, 114 insertions(+), 2 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1719,6 +1719,117 @@ qca8k_get_tag_protocol(struct dsa_switch + return DSA_TAG_PROTO_QCA; + } + ++static int qca8k_port_change_master(struct dsa_switch *ds, int port, ++ struct net_device *master, ++ struct netlink_ext_ack *extack) ++{ ++ struct dsa_switch_tree *dst = ds->dst; ++ struct qca8k_priv *priv = ds->priv; ++ u8 cpu_port_mask = 0; ++ struct dsa_port *dp; ++ u32 val; ++ int ret; ++ ++ /* With LAG of CPU port, compose the mask for port LOOKUP MEMBER */ ++ if (netif_is_lag_master(master)) { ++ struct dsa_lag *lag; ++ int id; ++ ++ id = dsa_lag_id(dst, master); ++ lag = dsa_lag_by_id(dst, id); ++ ++ dsa_lag_foreach_port(dp, dst, lag) ++ if (dsa_port_is_cpu(dp)) ++ cpu_port_mask |= BIT(dp->index); ++ } else { ++ dp = master->dsa_ptr; ++ cpu_port_mask |= BIT(dp->index); ++ } ++ ++ /* Connect port to new cpu port */ ++ ret = regmap_read(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(port), &val); ++ if (ret) ++ return ret; ++ ++ /* Reset connected CPU port in port LOOKUP MEMBER */ ++ val &= ~dsa_cpu_ports(ds); ++ /* Assign the new CPU port in port LOOKUP MEMBER */ ++ val |= cpu_port_mask; ++ ++ ret = regmap_update_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_MEMBER, ++ val); ++ if (ret) ++ return ret; ++ ++ /* Refresh CPU port LOOKUP MEMBER with new port */ ++ dsa_tree_for_each_cpu_port(dp, ds->dst) { ++ u32 reg = QCA8K_PORT_LOOKUP_CTRL(dp->index); ++ ++ /* If CPU port in mask assign port, else remove port */ ++ if (BIT(dp->index) & cpu_port_mask) ++ ret = regmap_set_bits(priv->regmap, reg, BIT(port)); ++ else ++ ret = regmap_clear_bits(priv->regmap, reg, BIT(port)); ++ ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int qca8k_port_lag_refresh_user_ports(struct dsa_switch *ds, ++ struct dsa_lag lag) ++{ ++ struct net_device *lag_dev = lag.dev; ++ struct dsa_port *dp; ++ int ret; ++ ++ /* Ignore if LAG is not a DSA master */ ++ if (!netif_is_lag_master(lag_dev)) ++ return 0; ++ ++ dsa_switch_for_each_user_port(dp, ds) { ++ /* Skip if assigned master is not the LAG */ ++ if (dsa_port_to_master(dp) != lag_dev) ++ continue; ++ ++ ret = qca8k_port_change_master(ds, dp->index, ++ lag_dev, NULL); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int qca8xxx_port_lag_join(struct dsa_switch *ds, int port, ++ struct dsa_lag lag, ++ struct netdev_lag_upper_info *info, ++ struct netlink_ext_ack *extack) ++{ ++ int ret; ++ ++ ret = qca8k_port_lag_join(ds, port, lag, info, extack); ++ if (ret) ++ return ret; ++ ++ return qca8k_port_lag_refresh_user_ports(ds, lag); ++} ++ ++static int qca8xxx_port_lag_leave(struct dsa_switch *ds, int port, ++ struct dsa_lag lag) ++{ ++ int ret; ++ ++ ret = qca8k_port_lag_leave(ds, port, lag); ++ if (ret) ++ return ret; ++ ++ return qca8k_port_lag_refresh_user_ports(ds, lag); ++} ++ + static void + qca8k_master_change(struct dsa_switch *ds, const struct net_device *master, + bool operational) +@@ -2005,8 +2116,9 @@ static const struct dsa_switch_ops qca8k + .phylink_mac_link_down = qca8k_phylink_mac_link_down, + .phylink_mac_link_up = qca8k_phylink_mac_link_up, + .get_phy_flags = qca8k_get_phy_flags, +- .port_lag_join = qca8k_port_lag_join, +- .port_lag_leave = qca8k_port_lag_leave, ++ .port_lag_join = qca8xxx_port_lag_join, ++ .port_lag_leave = qca8xxx_port_lag_leave, ++ .port_change_master = qca8k_port_change_master, + .master_state_change = qca8k_master_change, + .connect_tag_protocol = qca8k_connect_tag_protocol, + }; From 8eab5b2526703a3183012852c75e8512d50d3f7e Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Tue, 20 Jun 2023 09:49:53 +0200 Subject: [PATCH 05/20] ipq806x: enable and setup multi-CPU port for qca8k switch Enable and setup multi-cpu for qca8k switch for ipq806x based devices. Rework each DTS to enable the secondary CPU port on QCA8K switch and apply the required values originally set by the OEM in the old swconfig node. In original firmware the first CPU port was always assigned to the WAN port and the secondary CPU port was assigned to the rest of the LAN port. Follow this original implementation using an init.d script. To setup the CPU port ip tools is required. Add additional default package ip-tiny to correctly setup the CPU port. Signed-off-by: Christian Marangi --- target/linux/ipq806x/Makefile | 2 +- .../base-files/etc/init.d/qca8k_set_port | 45 +++++++++++++++++++ .../arm/boot/dts/qcom-ipq8062-wg2600hp3.dts | 4 +- .../boot/dts/qcom-ipq8064-ad7200-c2600.dtsi | 9 ++-- .../arch/arm/boot/dts/qcom-ipq8064-d7800.dts | 9 ++-- .../arm/boot/dts/qcom-ipq8064-eax500.dtsi | 9 ++-- .../arch/arm/boot/dts/qcom-ipq8064-g10.dts | 9 ++-- .../arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi | 9 ++-- .../arch/arm/boot/dts/qcom-ipq8064-r7500.dts | 7 ++- .../arm/boot/dts/qcom-ipq8064-r7500v2.dts | 9 ++-- .../arm/boot/dts/qcom-ipq8064-vr2600v.dts | 9 ++-- .../arm/boot/dts/qcom-ipq8064-wg2600hp.dts | 10 ++--- .../arch/arm/boot/dts/qcom-ipq8064-wpq864.dts | 9 ++-- .../arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts | 9 ++-- .../arm/boot/dts/qcom-ipq8065-nbg6817.dts | 9 ++-- .../arm/boot/dts/qcom-ipq8065-nighthawk.dtsi | 9 ++-- .../boot/dts/qcom-ipq8065-rt4230w-rev6.dts | 11 ++--- .../arm/boot/dts/qcom-ipq8065-tr4400-v2.dts | 9 ++-- 18 files changed, 95 insertions(+), 92 deletions(-) create mode 100755 target/linux/ipq806x/base-files/etc/init.d/qca8k_set_port diff --git a/target/linux/ipq806x/Makefile b/target/linux/ipq806x/Makefile index 74a0007a4e0..1bcea1fa80f 100644 --- a/target/linux/ipq806x/Makefile +++ b/target/linux/ipq806x/Makefile @@ -21,6 +21,6 @@ DEFAULT_PACKAGES += \ kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport \ kmod-phy-qcom-ipq806x-usb kmod-usb3 kmod-usb-dwc3-qcom \ kmod-ath10k-ct wpad-basic-mbedtls \ - uboot-envtools + uboot-envtools ip-tiny $(eval $(call BuildTarget)) diff --git a/target/linux/ipq806x/base-files/etc/init.d/qca8k_set_port b/target/linux/ipq806x/base-files/etc/init.d/qca8k_set_port new file mode 100755 index 00000000000..bf14907b8fb --- /dev/null +++ b/target/linux/ipq806x/base-files/etc/init.d/qca8k_set_port @@ -0,0 +1,45 @@ +#!/bin/sh /etc/rc.common + +START=15 + +set_qca8k_port() { + local port=$1 + local master=$2 + + ip link set $port type dsa conduit $master +} + +boot() { + # Restore original implementation where the eth1 (port 6) was used + # for the lan port and the eth0 (port 0) was used for the wan port + case $(board_name) in + askey,rt4230w-rev6 |\ + asrock,g10 |\ + buffalo,wxr-2533dhp |\ + compex,wpq864 |\ + nec,wg2600hp |\ + nec,wg2600hp3 |\ + netgear,d7800 |\ + netgear,r7500 |\ + netgear,r7500v2 |\ + netgear,r7800 |\ + netgear,xr450 |\ + netgear,xr500 |\ + nokia,ac400i |\ + tplink,ad7200 |\ + tplink,c2600 |\ + tplink,vr2600v |\ + zyxel,nbg6817) + set_qca8k_port lan1 eth1 + set_qca8k_port lan2 eth1 + set_qca8k_port lan3 eth1 + set_qca8k_port lan4 eth1 + set_qca8k_port wan eth0 + ;; + asus,onhub |\ + tplink,onhub) + set_qca8k_port lan1 eth1 + set_qca8k_port wan eth0 + ;; + esac +} diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts index e3987c6d07d..5f78d91b9ea 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts @@ -471,19 +471,19 @@ phy-handle = <&phy_port5>; }; - /* port@6 { reg = <6>; label = "cpu"; ethernet = <&gmac2>; phy-mode = "sgmii"; + qca,sgmii-enable-pll; + qca,sgmii-rxclk-falling-edge; fixed-link { speed = <1000>; full-duplex; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi index 9d05cf40326..c425c9cd2ed 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi @@ -396,21 +396,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts index c8e4a1810eb..7e4e0c829c2 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts @@ -399,21 +399,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi index fac43e785fb..e5cc2424190 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi @@ -244,21 +244,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts index 6795e8fa4fb..efcb6ec2411 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts @@ -217,21 +217,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi index d20b55c2c29..b84c8512ae9 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi @@ -100,21 +100,18 @@ phy-handle = <&phy_port2>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts index ff464d9d1e8..c58c289d35d 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts @@ -313,19 +313,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts index 030d4456683..719a423cad3 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts @@ -396,21 +396,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts index 4fddf5e90a4..8104ce18298 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts @@ -428,21 +428,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts index 47829a08aa2..87b05b57ba9 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts @@ -199,21 +199,19 @@ switch@10 { phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + qca,sgmii-rxclk-falling-edge; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts index 37055f110b4..f8b20b0635f 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts @@ -329,21 +329,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts index 97d76e11f0d..2d761ee3557 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts @@ -254,21 +254,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts index 96becfb4c1e..693e14c1207 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts @@ -304,21 +304,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi index ecd2c5634a9..51ad5ac8eef 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi @@ -361,21 +361,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac2>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts index 87948bb1d6a..6bf2cfe128a 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts @@ -356,21 +356,18 @@ phy-handle = <&phy_port5>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; - ethernet = <&gmac2>; - phy-mode = "rgmii"; + ethernet = <&gmac1>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts index bb00bbe7d31..600bcc8421d 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts @@ -363,21 +363,18 @@ phy-handle = <&phy_port4>; }; - /* port@6 { - reg = <0>; + reg = <6>; label = "cpu"; ethernet = <&gmac1>; - phy-mode = "rgmii"; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; fixed-link { speed = <1000>; full-duplex; - pause; - asym-pause; }; }; - */ }; mdio { From c707cff6c94bfe3b5ec530f8496e91f763899172 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Tue, 26 Sep 2023 14:10:42 +0200 Subject: [PATCH 06/20] ipq806x: add LEDs definition for non-standard qca8k LEDs Add LEDs definition for devices that use a non-standard qca8k LEDs configuration. This is to restore original setup of the LED and be on par with swconfig old configuration. Signed-off-by: Christian Marangi --- .../ipq806x/base-files/etc/board.d/01_leds | 27 ++++++ .../arm/boot/dts/qcom-ipq8062-wg2600hp3.dts | 96 +++++++++++++++++++ .../boot/dts/qcom-ipq8065-rt4230w-rev6.dts | 96 +++++++++++++++++++ 3 files changed, 219 insertions(+) diff --git a/target/linux/ipq806x/base-files/etc/board.d/01_leds b/target/linux/ipq806x/base-files/etc/board.d/01_leds index 950b7ad9688..0b64bbb4206 100644 --- a/target/linux/ipq806x/base-files/etc/board.d/01_leds +++ b/target/linux/ipq806x/base-files/etc/board.d/01_leds @@ -9,6 +9,18 @@ board_config_update board=$(board_name) case "$board" in +askey,rt4230w-rev6) + ucidef_set_led_netdev "wan-port-link" "WAN-PORT-LINK" "qca8k-0.0:00:green:wan" "wan" "link-10 link-100 link-1000" + ucidef_set_led_netdev "wan-port-activity" "WAN-PORT-ACTIVITY" "qca8k-0.0:00:amber:wan" "wan" "tx rx" + ucidef_set_led_netdev "lan1-port-link" "LAN1-PORT-LINK" "qca8k-0.0:01:green:lan" "lan1" "link-10 link-100 link-1000" + ucidef_set_led_netdev "lan1-port-activity" "LAN1-PORT-ACTIVITY" "qca8k-0.0:01:amber:lan" "lan1" "tx rx" + ucidef_set_led_netdev "lan2-port-link" "LAN2-PORT-LINK" "qca8k-0.0:02:green:lan" "lan2" "link-10 link-100 link-1000" + ucidef_set_led_netdev "lan2-port-activity" "LAN2-PORT-ACTIVITY" "qca8k-0.0:02:amber:lan" "lan2" "tx rx" + ucidef_set_led_netdev "lan3-port-link" "LAN3-PORT-LINK" "qca8k-0.0:03:green:lan" "lan3" "link-10 link-100 link-1000" + ucidef_set_led_netdev "lan3-port-activity" "LAN3-PORT-ACTIVITY" "qca8k-0.0:03:amber:lan" "lan3" "tx rx" + ucidef_set_led_netdev "lan4-port-link" "LAN4-PORT-LINK" "qca8k-0.0:04:green:lan" "lan4" "link-10 link-100 link-1000" + ucidef_set_led_netdev "lan4-port-activity" "LAN4-PORT-ACTIVITY" "qca8k-0.0:04:amber:lan" "lan4" "tx rx" + ;; buffalo,wxr-2533dhp) ucidef_set_led_wlan "wlan" "WLAN" "white:wireless" "phy0tpt" ucidef_set_led_netdev "wan" "WAN" "white:internet" "wan" @@ -32,6 +44,21 @@ nec,wg2600hp) ;; nec,wg2600hp3) ucidef_set_led_netdev "wan" "WAN" "green:active" "wan" + ucidef_set_led_netdev "wan-port-10" "WAN-PORT-10" "qca8k-0.0:00:green:wan-1" "wan" "tx rx link-10" + ucidef_set_led_netdev "wan-port-100" "WAN-PORT-100" "qca8k-0.0:00:green:wan-2" "wan" "tx rx link-100" + ucidef_set_led_netdev "wan-port-1000" "WAN-PORT-1000" "qca8k-0.0:00:green:wan-3" "wan" "tx rx link-1000" + ucidef_set_led_netdev "lan1-port-10" "LAN1-PORT-10" "qca8k-0.0:01:green:lan-1" "lan1" "tx rx link-10" + ucidef_set_led_netdev "lan1-port-100" "LAN1-PORT-100" "qca8k-0.0:01:green:lan-2" "lan1" "tx rx link-100" + ucidef_set_led_netdev "lan1-port-1000" "LAN1-PORT-1000" "qca8k-0.0:01:green:lan-3" "lan1" "tx rx link-1000" + ucidef_set_led_netdev "lan2-port-10" "LAN2-PORT-10" "qca8k-0.0:02:green:lan-1" "lan2" "tx rx link-10" + ucidef_set_led_netdev "lan2-port-100" "LAN2-PORT-100" "qca8k-0.0:02:green:lan-2" "lan2" "tx rx link-100" + ucidef_set_led_netdev "lan2-port-1000" "LAN2-PORT-1000" "qca8k-0.0:02:green:lan-3" "lan2" "tx rx link-1000" + ucidef_set_led_netdev "lan3-port-10" "LAN3-PORT-10" "qca8k-0.0:03:green:lan-1" "lan3" "tx rx link-10" + ucidef_set_led_netdev "lan3-port-100" "LAN3-PORT-100" "qca8k-0.0:03:green:lan-2" "lan3" "tx rx link-100" + ucidef_set_led_netdev "lan3-port-1000" "LAN3-PORT-1000" "qca8k-0.0:03:green:lan-3" "lan3" "tx rx link-1000" + ucidef_set_led_netdev "lan4-port-10" "LAN4-PORT-10" "qca8k-0.0:04:green:lan-1" "lan4" "tx rx link-10" + ucidef_set_led_netdev "lan4-port-100" "LAN4-PORT-100" "qca8k-0.0:04:green:lan-2" "lan4" "tx rx link-100" + ucidef_set_led_netdev "lan4-port-1000" "LAN4-PORT-1000" "qca8k-0.0:04:green:lan-3" "lan4" "tx rx link-1000" ;; netgear,d7800 |\ netgear,r7500 |\ diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts index 5f78d91b9ea..2c181bd8830 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts @@ -2,6 +2,7 @@ #include "qcom-ipq8062-smb208.dtsi" #include +#include / { model = "NEC Platforms Aterm WG2600HP3"; @@ -441,6 +442,25 @@ label = "wan"; phy-mode = "internal"; phy-handle = <&phy_port1>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_WAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_WAN; + default-state = "keep"; + }; + }; }; port@2 { @@ -448,6 +468,25 @@ label = "lan1"; phy-mode = "internal"; phy-handle = <&phy_port2>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@3 { @@ -455,6 +494,25 @@ label = "lan2"; phy-mode = "internal"; phy-handle = <&phy_port3>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@4 { @@ -462,6 +520,25 @@ label = "lan3"; phy-mode = "internal"; phy-handle = <&phy_port4>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@5 { @@ -469,6 +546,25 @@ label = "lan4"; phy-mode = "internal"; phy-handle = <&phy_port5>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@6 { diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts index 6bf2cfe128a..5453f9fcb3c 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts @@ -2,6 +2,7 @@ #include "qcom-ipq8065-smb208.dtsi" #include +#include / { model = "Askey RT4230W REV6"; @@ -326,6 +327,25 @@ label = "wan"; phy-mode = "internal"; phy-handle = <&phy_port1>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_WAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_WAN; + default-state = "keep"; + }; + }; }; port@2 { @@ -333,6 +353,25 @@ label = "lan1"; phy-mode = "internal"; phy-handle = <&phy_port2>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@3 { @@ -340,6 +379,25 @@ label = "lan2"; phy-mode = "internal"; phy-handle = <&phy_port3>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@4 { @@ -347,6 +405,25 @@ label = "lan3"; phy-mode = "internal"; phy-handle = <&phy_port4>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@5 { @@ -354,6 +431,25 @@ label = "lan4"; phy-mode = "internal"; phy-handle = <&phy_port5>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@6 { From 33908b2ad7839f6d7ca44dcb9749c5770d93b73d Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Tue, 26 Sep 2023 15:39:55 +0200 Subject: [PATCH 07/20] ipq40xx: refresh qca8k patches Refresh qca8k patches to sync with the generic backports changes. Signed-off-by: Christian Marangi --- ...a-qca8k-add-IPQ4019-built-in-switch-support.patch | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/linux/ipq40xx/patches-6.1/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch b/target/linux/ipq40xx/patches-6.1/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch index 8bacb2c7109..992884cf31d 100644 --- a/target/linux/ipq40xx/patches-6.1/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch +++ b/target/linux/ipq40xx/patches-6.1/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch @@ -58,7 +58,7 @@ Signed-off-by: Robert Marko +obj-$(CONFIG_NET_DSA_QCA8K_IPQ4019) += qca8k-ipq4019.o qca8k-common.o --- a/drivers/net/dsa/qca/qca8k-common.c +++ b/drivers/net/dsa/qca/qca8k-common.c -@@ -449,7 +449,7 @@ static int qca8k_vlan_del(struct qca8k_p +@@ -412,7 +412,7 @@ static int qca8k_vlan_del(struct qca8k_p /* Check if we're the last member to be removed */ del = true; @@ -67,7 +67,7 @@ Signed-off-by: Robert Marko mask = QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(i); if ((reg & mask) != mask) { -@@ -642,7 +642,7 @@ int qca8k_port_bridge_join(struct dsa_sw +@@ -653,7 +653,7 @@ int qca8k_port_bridge_join(struct dsa_sw cpu_port = dsa_to_port(ds, port)->cpu_dp->index; port_mask = BIT(cpu_port); @@ -76,7 +76,7 @@ Signed-off-by: Robert Marko if (dsa_is_cpu_port(ds, i)) continue; if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &bridge)) -@@ -674,7 +674,7 @@ void qca8k_port_bridge_leave(struct dsa_ +@@ -685,7 +685,7 @@ void qca8k_port_bridge_leave(struct dsa_ cpu_port = dsa_to_port(ds, port)->cpu_dp->index; @@ -1057,7 +1057,7 @@ Signed-off-by: Robert Marko #define QCA8K_QCA832X_MIB_COUNT 39 #define QCA8K_QCA833X_MIB_COUNT 41 -@@ -263,6 +267,7 @@ +@@ -265,6 +269,7 @@ #define QCA8K_PORT_LOOKUP_STATE_LEARNING QCA8K_PORT_LOOKUP_STATE(0x3) #define QCA8K_PORT_LOOKUP_STATE_FORWARD QCA8K_PORT_LOOKUP_STATE(0x4) #define QCA8K_PORT_LOOKUP_LEARN BIT(20) @@ -1065,7 +1065,7 @@ Signed-off-by: Robert Marko #define QCA8K_PORT_LOOKUP_ING_MIRROR_EN BIT(25) #define QCA8K_REG_GOL_TRUNK_CTRL0 0x700 -@@ -339,6 +344,53 @@ +@@ -341,6 +346,53 @@ #define MII_ATH_MMD_ADDR 0x0d #define MII_ATH_MMD_DATA 0x0e @@ -1119,7 +1119,7 @@ Signed-off-by: Robert Marko enum { QCA8K_PORT_SPEED_10M = 0, QCA8K_PORT_SPEED_100M = 1, -@@ -467,6 +519,10 @@ struct qca8k_priv { +@@ -466,6 +518,10 @@ struct qca8k_priv { struct qca8k_pcs pcs_port_6; const struct qca8k_match_data *info; struct qca8k_led ports_led[QCA8K_LED_COUNT]; From f4106c728ed1349d060255f6f9014fec80d63f78 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 18 Sep 2023 16:36:34 +0200 Subject: [PATCH 08/20] ipq806x: add patch fixing regression from stmmac TX timer Add patch fixing regression from stmmac TX timer. Refer to the single patch for extensive details on the problem. This should restore original performance before 4.19 kernel. Fixes: #11676 Signed-off-by: Christian Marangi --- ...t-introduce-napi_is_scheduled-helper.patch | 77 +++++++++++++++++++ ...et-stmmac-improve-TX-timer-arm-logic.patch | 76 ++++++++++++++++++ ...ac-increase-TX-coalesce-timer-to-5ms.patch | 37 +++++++++ 3 files changed, 190 insertions(+) create mode 100644 target/linux/ipq806x/patches-6.1/700-01-net-introduce-napi_is_scheduled-helper.patch create mode 100644 target/linux/ipq806x/patches-6.1/700-02-net-stmmac-improve-TX-timer-arm-logic.patch create mode 100644 target/linux/ipq806x/patches-6.1/700-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch diff --git a/target/linux/ipq806x/patches-6.1/700-01-net-introduce-napi_is_scheduled-helper.patch b/target/linux/ipq806x/patches-6.1/700-01-net-introduce-napi_is_scheduled-helper.patch new file mode 100644 index 00000000000..813ec97abce --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/700-01-net-introduce-napi_is_scheduled-helper.patch @@ -0,0 +1,77 @@ +From b5532bdc6d09e6e789417f0c7a0b665b57b0e7be Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 18 Sep 2023 14:21:56 +0200 +Subject: [PATCH 1/3] net: introduce napi_is_scheduled helper + +We currently have napi_if_scheduled_mark_missed that can be used to +check if napi is scheduled but that does more thing than simply checking +it and return a bool. Some driver already implement custom function to +check if napi is scheduled. + +Drop these custom function and introduce napi_is_scheduled that simply +check if napi is scheduled atomically. + +Update any driver and code that implement a similar check and instead +use this new helper. + +Signed-off-by: Christian Marangi +--- + drivers/net/ethernet/chelsio/cxgb3/sge.c | 8 -------- + drivers/net/wireless/realtek/rtw89/core.c | 2 +- + include/linux/netdevice.h | 5 +++++ + net/core/dev.c | 2 +- + 4 files changed, 7 insertions(+), 10 deletions(-) + +--- a/drivers/net/ethernet/chelsio/cxgb3/sge.c ++++ b/drivers/net/ethernet/chelsio/cxgb3/sge.c +@@ -2507,14 +2507,6 @@ static int napi_rx_handler(struct napi_s + return work_done; + } + +-/* +- * Returns true if the device is already scheduled for polling. +- */ +-static inline int napi_is_scheduled(struct napi_struct *napi) +-{ +- return test_bit(NAPI_STATE_SCHED, &napi->state); +-} +- + /** + * process_pure_responses - process pure responses from a response queue + * @adap: the adapter +--- a/drivers/net/wireless/realtek/rtw89/core.c ++++ b/drivers/net/wireless/realtek/rtw89/core.c +@@ -1479,7 +1479,7 @@ static void rtw89_core_rx_to_mac80211(st + struct napi_struct *napi = &rtwdev->napi; + + /* In low power mode, napi isn't scheduled. Receive it to netif. */ +- if (unlikely(!test_bit(NAPI_STATE_SCHED, &napi->state))) ++ if (unlikely(!napi_is_scheduled(napi))) + napi = NULL; + + rtw89_core_hw_to_sband_rate(rx_status); +--- a/include/linux/netdevice.h ++++ b/include/linux/netdevice.h +@@ -468,6 +468,11 @@ static inline bool napi_prefer_busy_poll + return test_bit(NAPI_STATE_PREFER_BUSY_POLL, &n->state); + } + ++static inline bool napi_is_scheduled(struct napi_struct *n) ++{ ++ return test_bit(NAPI_STATE_SCHED, &n->state); ++} ++ + bool napi_schedule_prep(struct napi_struct *n); + + /** +--- a/net/core/dev.c ++++ b/net/core/dev.c +@@ -6562,7 +6562,7 @@ static int __napi_poll(struct napi_struc + * accidentally calling ->poll() when NAPI is not scheduled. + */ + work = 0; +- if (test_bit(NAPI_STATE_SCHED, &n->state)) { ++ if (napi_is_scheduled(n)) { + work = n->poll(n, weight); + trace_napi_poll(n, work, weight); + } diff --git a/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-improve-TX-timer-arm-logic.patch b/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-improve-TX-timer-arm-logic.patch new file mode 100644 index 00000000000..0f2f366fa94 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-improve-TX-timer-arm-logic.patch @@ -0,0 +1,76 @@ +From 26e872db0f14c09ab57486b538ecc3a24c579df2 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 18 Sep 2023 14:39:01 +0200 +Subject: [PATCH 2/3] net: stmmac: improve TX timer arm logic + +There is currently a problem with the TX timer getting armed multiple +unnecessary times causing big performance regression on some device that +suffer from heavy handling of hrtimer rearm. + +The use of the TX timer is an old implementation that predates the napi +implementation and the interrupt enable/disable handling. + +Due to stmmac being a very old code, the TX timer was never evaluated +again with this new implementation and was kept there causing +performance regression. The performance regression started to appear +with kernel version 4.19 with 8fce33317023 ("net: stmmac: Rework coalesce +timer and fix multi-queue races") where the timer was reduced to 1ms +causing it to be armed 40 times more than before. + +Decreasing the timer made the problem more present and caused the +regression in the other of 600-700mbps on some device (regression where +this was notice is ipq806x). + +The problem is in the fact that handling the hrtimer on some target is +expensive and recent kernel made the timer armed much more times. +A solution that was proposed was reverting the hrtimer change and use +mod_timer but such solution would still hide the real problem in the +current implementation. + +To fix the regression, apply some additional logic and skip arming the +timer when not needed. + +Arm the timer ONLY if a napi is not already scheduled. Running the timer +is redundant since the same function (stmmac_tx_clean) will run in the +napi TX poll. Also try to cancel any timer if a napi is scheduled to +prevent redundant run of TX call. + +With the following new logic the original performance are restored while +keeping using the hrtimer. + +Signed-off-by: Christian Marangi +--- + .../net/ethernet/stmicro/stmmac/stmmac_main.c | 18 +++++++++++++++--- + 1 file changed, 15 insertions(+), 3 deletions(-) + +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +@@ -2974,13 +2974,25 @@ static void stmmac_tx_timer_arm(struct s + { + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + u32 tx_coal_timer = priv->tx_coal_timer[queue]; ++ struct stmmac_channel *ch; ++ struct napi_struct *napi; + + if (!tx_coal_timer) + return; + +- hrtimer_start(&tx_q->txtimer, +- STMMAC_COAL_TIMER(tx_coal_timer), +- HRTIMER_MODE_REL); ++ ch = &priv->channel[tx_q->queue_index]; ++ napi = tx_q->xsk_pool ? &ch->rxtx_napi : &ch->tx_napi; ++ ++ /* Arm timer only if napi is not already scheduled. ++ * Try to cancel any timer if napi is scheduled, timer will be armed ++ * again in the next scheduled napi. ++ */ ++ if (unlikely(!napi_is_scheduled(napi))) ++ hrtimer_start(&tx_q->txtimer, ++ STMMAC_COAL_TIMER(tx_coal_timer), ++ HRTIMER_MODE_REL); ++ else ++ hrtimer_try_to_cancel(&tx_q->txtimer); + } + + /** diff --git a/target/linux/ipq806x/patches-6.1/700-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch b/target/linux/ipq806x/patches-6.1/700-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch new file mode 100644 index 00000000000..f86c16ec81b --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/700-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch @@ -0,0 +1,37 @@ +From 13e24b0c4318b8b4d0a0fde7e5e7ccb982821c63 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 18 Sep 2023 15:11:13 +0200 +Subject: [PATCH 3/3] net: stmmac: increase TX coalesce timer to 5ms + +Commit 8fce33317023 ("net: stmmac: Rework coalesce timer and fix +multi-queue races") decreased the TX coalesce timer from 40ms to 1ms. + +This caused some performance regression on some target (regression was +reported at least on ipq806x) in the order of 600mbps dropping from +gigabit handling to only 200mbps. + +The problem was identified in the TX timer getting armed too much time. +While this was fixed and improved in another commit, performance can be +improved even further by increasing the timer delay a bit moving from +1ms to 5ms. + +The value is a good balance between battery saving by prevending too +much interrupt to be generated and permitting good performance for +internet oriented devices. + +Signed-off-by: Christian Marangi +--- + drivers/net/ethernet/stmicro/stmmac/common.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/stmicro/stmmac/common.h ++++ b/drivers/net/ethernet/stmicro/stmmac/common.h +@@ -286,7 +286,7 @@ struct stmmac_safety_stats { + #define MIN_DMA_RIWT 0x10 + #define DEF_DMA_RIWT 0xa0 + /* Tx coalesce parameters */ +-#define STMMAC_COAL_TX_TIMER 1000 ++#define STMMAC_COAL_TX_TIMER 5000 + #define STMMAC_MAX_COAL_TX_TICK 100000 + #define STMMAC_TX_MAX_FRAMES 256 + #define STMMAC_TX_FRAMES 25 From cafa8804a4c5fdea18c7435c09c549841855c98c Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 18 Sep 2023 16:36:34 +0200 Subject: [PATCH 09/20] ipq806x: add patch fixing regression from stmmac TX timer Add patch fixing regression from stmmac TX timer. Refer to the single patch for extensive details on the problem. This should restore original performance before 4.19 kernel. Fixes: #11676 Signed-off-by: Christian Marangi --- ...t-introduce-napi_is_scheduled-helper.patch | 2 +- ...c-move-TX-timer-arm-after-DMA-enable.patch | 89 +++++++++++++++++++ ...t-stmmac-improve-TX-timer-arm-logic.patch} | 6 +- ...c-increase-TX-coalesce-timer-to-5ms.patch} | 4 +- 4 files changed, 95 insertions(+), 6 deletions(-) create mode 100644 target/linux/ipq806x/patches-6.1/700-02-net-stmmac-move-TX-timer-arm-after-DMA-enable.patch rename target/linux/ipq806x/patches-6.1/{700-02-net-stmmac-improve-TX-timer-arm-logic.patch => 700-03-net-stmmac-improve-TX-timer-arm-logic.patch} (93%) rename target/linux/ipq806x/patches-6.1/{700-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch => 700-04-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch} (91%) diff --git a/target/linux/ipq806x/patches-6.1/700-01-net-introduce-napi_is_scheduled-helper.patch b/target/linux/ipq806x/patches-6.1/700-01-net-introduce-napi_is_scheduled-helper.patch index 813ec97abce..9694bf1144f 100644 --- a/target/linux/ipq806x/patches-6.1/700-01-net-introduce-napi_is_scheduled-helper.patch +++ b/target/linux/ipq806x/patches-6.1/700-01-net-introduce-napi_is_scheduled-helper.patch @@ -1,7 +1,7 @@ From b5532bdc6d09e6e789417f0c7a0b665b57b0e7be Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 18 Sep 2023 14:21:56 +0200 -Subject: [PATCH 1/3] net: introduce napi_is_scheduled helper +Subject: [PATCH 1/4] net: introduce napi_is_scheduled helper We currently have napi_if_scheduled_mark_missed that can be used to check if napi is scheduled but that does more thing than simply checking diff --git a/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-move-TX-timer-arm-after-DMA-enable.patch b/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-move-TX-timer-arm-after-DMA-enable.patch new file mode 100644 index 00000000000..2b523984257 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-move-TX-timer-arm-after-DMA-enable.patch @@ -0,0 +1,89 @@ +From fb04db35447d1e8ff557c8e57139164cecab7de5 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Sep 2023 15:38:31 +0200 +Subject: [PATCH 2/4] net: stmmac: move TX timer arm after DMA enable + +Move TX timer arm call after DMA interrupt is enabled again. + +The TX timer arm function changed logic and now is skipped if a napi is +already scheduled. By moving the TX timer arm call after DMA is enabled, +we permit to correctly skip if a DMA interrupt has been fired and a napi +has been scheduled again. + +Signed-off-by: Christian Marangi +--- + .../net/ethernet/stmicro/stmmac/stmmac_main.c | 19 +++++++++++++++---- + 1 file changed, 15 insertions(+), 4 deletions(-) + +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +@@ -2529,7 +2529,8 @@ static void stmmac_bump_dma_threshold(st + * @queue: TX queue index + * Description: it reclaims the transmit resources after transmission completes. + */ +-static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue) ++static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue, ++ bool *pending_packets) + { + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + unsigned int bytes_compl = 0, pkts_compl = 0; +@@ -2692,7 +2693,7 @@ static int stmmac_tx_clean(struct stmmac + + /* We still have pending packets, let's call for a new scheduling */ + if (tx_q->dirty_tx != tx_q->cur_tx) +- stmmac_tx_timer_arm(priv, queue); ++ *pending_packets = true; + + __netif_tx_unlock_bh(netdev_get_tx_queue(priv->dev, queue)); + +@@ -5474,12 +5475,13 @@ static int stmmac_napi_poll_tx(struct na + struct stmmac_channel *ch = + container_of(napi, struct stmmac_channel, tx_napi); + struct stmmac_priv *priv = ch->priv_data; ++ bool pending_packets = false; + u32 chan = ch->index; + int work_done; + + priv->xstats.napi_poll++; + +- work_done = stmmac_tx_clean(priv, budget, chan); ++ work_done = stmmac_tx_clean(priv, budget, chan, &pending_packets); + work_done = min(work_done, budget); + + if (work_done < budget && napi_complete_done(napi, work_done)) { +@@ -5490,6 +5492,10 @@ static int stmmac_napi_poll_tx(struct na + spin_unlock_irqrestore(&ch->lock, flags); + } + ++ /* TX still have packet to handle, check if we need to arm tx timer */ ++ if (pending_packets) ++ stmmac_tx_timer_arm(priv, chan); ++ + return work_done; + } + +@@ -5499,11 +5505,12 @@ static int stmmac_napi_poll_rxtx(struct + container_of(napi, struct stmmac_channel, rxtx_napi); + struct stmmac_priv *priv = ch->priv_data; + int rx_done, tx_done, rxtx_done; ++ bool tx_pending_packets = false; + u32 chan = ch->index; + + priv->xstats.napi_poll++; + +- tx_done = stmmac_tx_clean(priv, budget, chan); ++ tx_done = stmmac_tx_clean(priv, budget, chan, &tx_pending_packets); + tx_done = min(tx_done, budget); + + rx_done = stmmac_rx_zc(priv, budget, chan); +@@ -5528,6 +5535,10 @@ static int stmmac_napi_poll_rxtx(struct + spin_unlock_irqrestore(&ch->lock, flags); + } + ++ /* TX still have packet to handle, check if we need to arm tx timer */ ++ if (tx_pending_packets) ++ stmmac_tx_timer_arm(priv, chan); ++ + return min(rxtx_done, budget - 1); + } + diff --git a/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-improve-TX-timer-arm-logic.patch b/target/linux/ipq806x/patches-6.1/700-03-net-stmmac-improve-TX-timer-arm-logic.patch similarity index 93% rename from target/linux/ipq806x/patches-6.1/700-02-net-stmmac-improve-TX-timer-arm-logic.patch rename to target/linux/ipq806x/patches-6.1/700-03-net-stmmac-improve-TX-timer-arm-logic.patch index 0f2f366fa94..6160b95e605 100644 --- a/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-improve-TX-timer-arm-logic.patch +++ b/target/linux/ipq806x/patches-6.1/700-03-net-stmmac-improve-TX-timer-arm-logic.patch @@ -1,7 +1,7 @@ -From 26e872db0f14c09ab57486b538ecc3a24c579df2 Mon Sep 17 00:00:00 2001 +From cd40cd8b1ca4a6f531c6c3fd78b306e5014f9c04 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 18 Sep 2023 14:39:01 +0200 -Subject: [PATCH 2/3] net: stmmac: improve TX timer arm logic +Subject: [PATCH 3/4] net: stmmac: improve TX timer arm logic There is currently a problem with the TX timer getting armed multiple unnecessary times causing big performance regression on some device that @@ -45,7 +45,7 @@ Signed-off-by: Christian Marangi --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -2974,13 +2974,25 @@ static void stmmac_tx_timer_arm(struct s +@@ -2975,13 +2975,25 @@ static void stmmac_tx_timer_arm(struct s { struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; u32 tx_coal_timer = priv->tx_coal_timer[queue]; diff --git a/target/linux/ipq806x/patches-6.1/700-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch b/target/linux/ipq806x/patches-6.1/700-04-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch similarity index 91% rename from target/linux/ipq806x/patches-6.1/700-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch rename to target/linux/ipq806x/patches-6.1/700-04-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch index f86c16ec81b..3f977020972 100644 --- a/target/linux/ipq806x/patches-6.1/700-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch +++ b/target/linux/ipq806x/patches-6.1/700-04-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch @@ -1,7 +1,7 @@ -From 13e24b0c4318b8b4d0a0fde7e5e7ccb982821c63 Mon Sep 17 00:00:00 2001 +From 95281ab33fbaa1e974bceb20cfb0f5c92934f2b3 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 18 Sep 2023 15:11:13 +0200 -Subject: [PATCH 3/3] net: stmmac: increase TX coalesce timer to 5ms +Subject: [PATCH 4/4] net: stmmac: increase TX coalesce timer to 5ms Commit 8fce33317023 ("net: stmmac: Rework coalesce timer and fix multi-queue races") decreased the TX coalesce timer from 40ms to 1ms. From 5d111b67140d26dee4c8c4f2a6baf4cf077840a4 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Sat, 30 Sep 2023 22:06:05 +0200 Subject: [PATCH 10/20] ipq806x: disable unused SWCONFIG config flags Disable unused SWCONFIG config flags now that we switched to DSA and are not needed anymore. Signed-off-by: Christian Marangi --- target/linux/ipq806x/config-6.1 | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/linux/ipq806x/config-6.1 b/target/linux/ipq806x/config-6.1 index a1214dc9178..c0086137136 100644 --- a/target/linux/ipq806x/config-6.1 +++ b/target/linux/ipq806x/config-6.1 @@ -493,8 +493,6 @@ CONFIG_SPMI_MSM_PMIC_ARB=y CONFIG_SRCU=y CONFIG_STMMAC_ETH=y CONFIG_STMMAC_PLATFORM=y -CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_LEDS=y CONFIG_SWPHY=y CONFIG_SWP_EMULATE=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y From c354c069b32d7be34955c69e7124cfc469ffb83c Mon Sep 17 00:00:00 2001 From: Oskari Rauta Date: Sun, 1 Oct 2023 13:07:31 +0300 Subject: [PATCH 11/20] uci: fix Makefile formatting Fix wrong declaration for PKG_SROUCE_URL and PKG_VERSION variables and add missing colon Signed-off-by: Oskari Rauta --- package/system/uci/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/system/uci/Makefile b/package/system/uci/Makefile index ffbbce577c8..86bfdfb9783 100644 --- a/package/system/uci/Makefile +++ b/package/system/uci/Makefile @@ -11,9 +11,9 @@ include $(TOPDIR)/rules.mk PKG_NAME:=uci PKG_RELEASE:=1 -PKG_SOURCE_URL=$(PROJECT_GIT)/project/uci.git +PKG_SOURCE_URL:=$(PROJECT_GIT)/project/uci.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE=2023-08-10 +PKG_SOURCE_DATE:=2023-08-10 PKG_SOURCE_VERSION:=5781664d5087ccc4b5ab58505883231212dbedbc PKG_MIRROR_HASH:=2d60a8543fa00cfc75df6417354b004abf58f672c91bf0a3bffe3ea1dbf84a4b From 85b0d7592c454f2e4e02be043a1e433c67df4e41 Mon Sep 17 00:00:00 2001 From: Mikhail Zhilkin Date: Sat, 30 Sep 2023 14:07:15 +0000 Subject: [PATCH 12/20] mediatek: fix eeprom loading (Mercusys MR90X v1) Commit mt76: drop default eeprom file for mt7986-firmware (e3aa645b267ca4f08773b5366583e9b0020fc3e9) breaks eeprom loading for Mercusys MR90X v1. As a result WiFi is not working at all. This commit adds Mercusus MR90x to the caldata script (it works after the commit mentioned above). And we can safely drop "81_fix_eeprom" script as it's no longer required. Fixes: e3aa645b267ca4f08773b5366583e9b0020fc3e9 Signed-off-by: Mikhail Zhilkin --- .../etc/hotplug.d/firmware/11-mt76-caldata | 8 ++++++++ .../filogic/base-files/lib/preinit/81_fix_eeprom | 16 ---------------- 2 files changed, 8 insertions(+), 16 deletions(-) delete mode 100644 target/linux/mediatek/filogic/base-files/lib/preinit/81_fix_eeprom diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata index e4d33879c6d..bc1dcb0008c 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata @@ -21,6 +21,14 @@ case "$FIRMWARE" in ;; esac ;; +"mediatek/mt7986_eeprom_mt7975_dual.bin") + case "$board" in + mercusys,mr90x-v1) + ln -sf /tmp/tp_data/MT7986_EEPROM.bin \ + /lib/firmware/$FIRMWARE + ;; + esac + ;; "mediatek/mt7986_eeprom_mt7976.bin") case "$board" in acer,predator-w6) diff --git a/target/linux/mediatek/filogic/base-files/lib/preinit/81_fix_eeprom b/target/linux/mediatek/filogic/base-files/lib/preinit/81_fix_eeprom deleted file mode 100644 index 0a842facca8..00000000000 --- a/target/linux/mediatek/filogic/base-files/lib/preinit/81_fix_eeprom +++ /dev/null @@ -1,16 +0,0 @@ -. /lib/functions/system.sh - -preinit_fix_eeprom() { - case $(board_name) in - mercusys,mr90x-v1) - eeprom="/lib/firmware/mediatek/mt7986_eeprom_mt7975_dual.bin" - oem="/tmp/tp_data/MT7986_EEPROM.bin" - [ ! -L $eeprom -a -e $oem ] && \ - mv -f $eeprom $eeprom.bak && ln -s $oem $eeprom - ;; - *) - ;; - esac -} - -boot_hook_add preinit_main preinit_fix_eeprom From 954142f4774aa6c0dca0a44179b3b0d119782f38 Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Mon, 2 Oct 2023 12:59:18 +0200 Subject: [PATCH 13/20] rtl8812au-ct: Fix PKG_MIRROR_HASH The PKG_MIRROR_HASH is wrong, fix it. Found and fixed using this command: make package download check FIXUP=1 Fixes: c123e4f0533e ("rtl8812au-ct: bump to fix kernel 6.1 compile") Signed-off-by: Hauke Mehrtens --- package/kernel/rtl8812au-ct/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/kernel/rtl8812au-ct/Makefile b/package/kernel/rtl8812au-ct/Makefile index e3b71f75aa0..b0440a68589 100644 --- a/package/kernel/rtl8812au-ct/Makefile +++ b/package/kernel/rtl8812au-ct/Makefile @@ -7,7 +7,7 @@ PKG_LICENSE:=GPLv2 PKG_LICENSE_FILES:= PKG_SOURCE_URL:=https://github.com/greearb/rtl8812AU_8821AU_linux.git -PKG_MIRROR_HASH:=7ae5ebcba382de97942b13f8edbcb2ebff1a93eb25ae1d3de98317386fafb830 +PKG_MIRROR_HASH:=748f5c58aa3f391222c0c43db35b9ff4c30c9c987ca052a5a3cdf36193e5821b PKG_SOURCE_PROTO:=git PKG_SOURCE_DATE:=2022-10-26 PKG_SOURCE_VERSION:=9b2b203a217e1320602a0eb07c338a1bfca0f5a6 From 93182ff272af0379581638399fba1948b11c7259 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 2 Oct 2023 18:53:16 +0200 Subject: [PATCH 14/20] ipq-wifi: improve and update instructions on how to add board files Improve and update instructions on how to add board files and both describe the needed step to upstream a board file or to use it locally. Signed-off-by: Christian Marangi --- package/firmware/ipq-wifi/Makefile | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile index 6dd2260fac0..fe11b71e481 100644 --- a/package/firmware/ipq-wifi/Makefile +++ b/package/firmware/ipq-wifi/Makefile @@ -116,9 +116,23 @@ Do not install it for any other device! PREV_BOARD+=ipq-wifi-$(1) endef -# Add board name to ALLWIFIBOARDS -# Place files in this directory as board-. -# Add $(eval $(call generate-ipq-wifi-package,,)) +# To add local files for testing: +# 1. create a new directory in the ipq-wifi package directory called "files". +# 2. place there the needed board files. +# +# To send a board file upstream: +# 1. create a pull request in https://github.com/openwrt/firmware_qca-wireless or +# send a patch to the mailing list adding the tag firmware/qca-wireless before +# the PATCH tag. +# 2. create a pull request in the main openwrt repository bumping the ipq-wifi +# package to the new version and adding the required lines to add the board file. +# +# Changes needed to the ipq-wifi Makefile: +# 1. Add board name to ALLWIFIBOARDS +# 2. Add $(eval $(call generate-ipq-wifi-package,,)) +# +# Board files should follow this name structure: +# board-. $(eval $(call generate-ipq-wifi-package,buffalo_wxr-5950ax12,Buffalo WXR-5950AX12)) $(eval $(call generate-ipq-wifi-package,compex_wpq873,Compex WPQ-873)) From b7eea2db7344c8389b46dfd52dfe3e5cd2fd1780 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Sat, 30 Sep 2023 13:19:30 +0200 Subject: [PATCH 15/20] ipq40xx: use upstreamed SDI disable support Google WiFi board has what seems as debug version of TZ/QSEE and it is always enabling SDI (Secure Debug Image) and in order to do a regular reboot it must be disabled, as otherwise you are stuck in a debug state where you are supposed to extract debug logs via QCA tooling which is not helpfull at all for regular users. So, instead of using our downstream version to disable SDI lets use the version that was merged upstream and relies on a boolean property in the SCM node instead of checking the compatible. Signed-off-by: Robert Marko Tested-by: Brian Norris --- .../arch/arm/boot/dts/qcom-ipq4019-wifi.dts | 4 + ...are-qcom_scm-disable-SDI-if-required.patch | 83 +++++++++++++++++++ ...RM-dts-qcom-ipq4019-add-label-to-SCM.patch | 24 ++++++ ...are-qcom-scm-Add-SDI-disable-support.patch | 60 -------------- ...-qcom-scm-disable-SDI-on-Google-WiFi.patch | 34 -------- 5 files changed, 111 insertions(+), 94 deletions(-) create mode 100644 target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch create mode 100644 target/linux/ipq40xx/patches-6.1/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch delete mode 100644 target/linux/ipq40xx/patches-6.1/420-firmware-qcom-scm-Add-SDI-disable-support.patch delete mode 100644 target/linux/ipq40xx/patches-6.1/421-firmware-qcom-scm-disable-SDI-on-Google-WiFi.patch diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts index f92c2897381..f2e39c87aef 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts @@ -67,6 +67,10 @@ }; }; +&scm { + qcom,sdi-enabled; +}; + &tlmm { fw_pinmux: fw_pinmux { wp { diff --git a/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch b/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch new file mode 100644 index 00000000000..1ef46d9be37 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch @@ -0,0 +1,83 @@ +From ff4aa3bc98258a240b9bbab53fd8d2fb8184c485 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Wed, 16 Aug 2023 18:45:39 +0200 +Subject: [PATCH] firmware: qcom_scm: disable SDI if required + +IPQ5018 has SDI (Secure Debug Image) enabled by TZ by default, and that +means that WDT being asserted or just trying to reboot will hang the board +in the debug mode and only pulling the power and repowering will help. +Some IPQ4019 boards like Google WiFI have it enabled as well. + +Luckily, SDI can be disabled via an SCM call. + +So, lets use the boolean DT property to identify boards that have SDI +enabled by default and use the SCM call to disable SDI during SCM probe. +It is important to disable it as soon as possible as we might have a WDT +assertion at any time which would then leave the board in debug mode, +thus disabling it during SCM removal is not enough. + +Signed-off-by: Robert Marko +Reviewed-by: Guru Das Srinagesh +Link: https://lore.kernel.org/r/20230816164641.3371878-2-robimarko@gmail.com +Signed-off-by: Bjorn Andersson +--- + drivers/firmware/qcom_scm.c | 30 ++++++++++++++++++++++++++++++ + drivers/firmware/qcom_scm.h | 1 + + 2 files changed, 31 insertions(+) + +--- a/drivers/firmware/qcom_scm.c ++++ b/drivers/firmware/qcom_scm.c +@@ -400,6 +400,29 @@ int qcom_scm_set_remote_state(u32 state, + } + EXPORT_SYMBOL(qcom_scm_set_remote_state); + ++static int qcom_scm_disable_sdi(void) ++{ ++ int ret; ++ struct qcom_scm_desc desc = { ++ .svc = QCOM_SCM_SVC_BOOT, ++ .cmd = QCOM_SCM_BOOT_SDI_CONFIG, ++ .args[0] = 1, /* Disable watchdog debug */ ++ .args[1] = 0, /* Disable SDI */ ++ .arginfo = QCOM_SCM_ARGS(2), ++ .owner = ARM_SMCCC_OWNER_SIP, ++ }; ++ struct qcom_scm_res res; ++ ++ ret = qcom_scm_clk_enable(); ++ if (ret) ++ return ret; ++ ret = qcom_scm_call(__scm->dev, &desc, &res); ++ ++ qcom_scm_clk_disable(); ++ ++ return ret ? : res.result[0]; ++} ++ + static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) + { + struct qcom_scm_desc desc = { +@@ -1404,6 +1427,13 @@ static int qcom_scm_probe(struct platfor + + __get_convention(); + ++ ++ /* ++ * Disable SDI if indicated by DT that it is enabled by default. ++ */ ++ if (of_property_read_bool(pdev->dev.of_node, "qcom,sdi-enabled")) ++ qcom_scm_disable_sdi(); ++ + /* + * If requested enable "download mode", from this point on warmboot + * will cause the boot stages to enter download mode, unless +--- a/drivers/firmware/qcom_scm.h ++++ b/drivers/firmware/qcom_scm.h +@@ -77,6 +77,7 @@ extern int scm_legacy_call(struct device + #define QCOM_SCM_SVC_BOOT 0x01 + #define QCOM_SCM_BOOT_SET_ADDR 0x01 + #define QCOM_SCM_BOOT_TERMINATE_PC 0x02 ++#define QCOM_SCM_BOOT_SDI_CONFIG 0x09 + #define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10 + #define QCOM_SCM_BOOT_SET_ADDR_MC 0x11 + #define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a diff --git a/target/linux/ipq40xx/patches-6.1/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch b/target/linux/ipq40xx/patches-6.1/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch new file mode 100644 index 00000000000..8b9352e6f1e --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch @@ -0,0 +1,24 @@ +From ea9fba16d972becc84cd2a82d25030975dc609a5 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sat, 30 Sep 2023 13:09:27 +0200 +Subject: [PATCH] ARM: dts: qcom: ipq4019: add label to SCM + +Some IPQ4019 boards require SDI to be disabled by adding a property to the +SCM node, so lets make that easy by adding a label to the SCM node. + +Signed-off-by: Robert Marko +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -155,7 +155,7 @@ + }; + + firmware { +- scm { ++ scm: scm { + compatible = "qcom,scm-ipq4019", "qcom,scm"; + }; + }; diff --git a/target/linux/ipq40xx/patches-6.1/420-firmware-qcom-scm-Add-SDI-disable-support.patch b/target/linux/ipq40xx/patches-6.1/420-firmware-qcom-scm-Add-SDI-disable-support.patch deleted file mode 100644 index 732f3c50fb6..00000000000 --- a/target/linux/ipq40xx/patches-6.1/420-firmware-qcom-scm-Add-SDI-disable-support.patch +++ /dev/null @@ -1,60 +0,0 @@ -From b514bc3c0a5a57bc83843dc66c72788b9c9435ac Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Thu, 18 May 2023 16:02:23 +0200 -Subject: [PATCH 1/3] firmware: qcom: scm: Add SDI disable support - -Some SoC-s like IPQ5018 require SDI(Secure Debug Image) to be disabled -before trying to reboot, otherwise board will just hang after reboot has -been issued via PSCI. - -So, provide a call to SCM that allows disabling it. - -Signed-off-by: Robert Marko -Acked-by: Mukesh Ojha ---- - drivers/firmware/qcom_scm.c | 23 +++++++++++++++++++++++ - drivers/firmware/qcom_scm.h | 1 + - 2 files changed, 24 insertions(+) - ---- a/drivers/firmware/qcom_scm.c -+++ b/drivers/firmware/qcom_scm.c -@@ -400,6 +400,29 @@ int qcom_scm_set_remote_state(u32 state, - } - EXPORT_SYMBOL(qcom_scm_set_remote_state); - -+static int qcom_scm_disable_sdi(void) -+{ -+ int ret; -+ struct qcom_scm_desc desc = { -+ .svc = QCOM_SCM_SVC_BOOT, -+ .cmd = QCOM_SCM_BOOT_SDI_CONFIG, -+ .args[0] = 1, /* Disable watchdog debug */ -+ .args[1] = 0, /* Disable SDI */ -+ .arginfo = QCOM_SCM_ARGS(2), -+ .owner = ARM_SMCCC_OWNER_SIP, -+ }; -+ struct qcom_scm_res res; -+ -+ ret = qcom_scm_clk_enable(); -+ if (ret) -+ return ret; -+ ret = qcom_scm_call(__scm->dev, &desc, &res); -+ -+ qcom_scm_clk_disable(); -+ -+ return ret ? : res.result[0]; -+} -+ - static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) - { - struct qcom_scm_desc desc = { ---- a/drivers/firmware/qcom_scm.h -+++ b/drivers/firmware/qcom_scm.h -@@ -77,6 +77,7 @@ extern int scm_legacy_call(struct device - #define QCOM_SCM_SVC_BOOT 0x01 - #define QCOM_SCM_BOOT_SET_ADDR 0x01 - #define QCOM_SCM_BOOT_TERMINATE_PC 0x02 -+#define QCOM_SCM_BOOT_SDI_CONFIG 0x09 - #define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10 - #define QCOM_SCM_BOOT_SET_ADDR_MC 0x11 - #define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a diff --git a/target/linux/ipq40xx/patches-6.1/421-firmware-qcom-scm-disable-SDI-on-Google-WiFi.patch b/target/linux/ipq40xx/patches-6.1/421-firmware-qcom-scm-disable-SDI-on-Google-WiFi.patch deleted file mode 100644 index ff788c5c566..00000000000 --- a/target/linux/ipq40xx/patches-6.1/421-firmware-qcom-scm-disable-SDI-on-Google-WiFi.patch +++ /dev/null @@ -1,34 +0,0 @@ -From a658ad57c2b9d46eb5395c7bb8cf83b8e0f289e7 Mon Sep 17 00:00:00 2001 -From: Brian Norris -Date: Fri, 28 Jul 2023 12:02:19 +0200 -Subject: [PATCH 2/3] firmware: qcom: scm: disable SDI on Google WiFi - -Google WiFi seems to have SDI (Secure Debug Image) enabled by default which -prevents normal reboot from working causing the board to just hang after -reboot is called. - -So lets disable SDI during SCM probe on Google WiFi boards in order to -avoid a state where WDT will kick in and then the board will just hang -in the debug mode. - -Signed-off-by: Brian Norris ---- - drivers/firmware/qcom_scm.c | 7 +++++++ - 1 file changed, 7 insertions(+) - ---- a/drivers/firmware/qcom_scm.c -+++ b/drivers/firmware/qcom_scm.c -@@ -1435,6 +1435,13 @@ static int qcom_scm_probe(struct platfor - if (download_mode) - qcom_scm_set_download_mode(true); - -+ /* -+ * Factory firmware leaves SDI (a debug interface), which prevents -+ * clean reboot. -+ */ -+ if (of_machine_is_compatible("google,wifi")) -+ qcom_scm_disable_sdi(); -+ - return 0; - } - From a181b9f0f9269525319024f53d83c7efe9da544b Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 2 Oct 2023 22:13:10 +0200 Subject: [PATCH 16/20] yafut: add missing PKG_MIRROR_HASH Add missing PKG_MIRROR_HASH. This is always needed as is used to generate and use a tar instead of git clone and validate the hash of it. Signed-off-by: Christian Marangi --- package/utils/yafut/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/package/utils/yafut/Makefile b/package/utils/yafut/Makefile index fe27db97d22..ef16404c336 100644 --- a/package/utils/yafut/Makefile +++ b/package/utils/yafut/Makefile @@ -5,6 +5,7 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=https://github.com/kempniu/yafut.git +PKG_MIRROR_HASH:=6eece622d1df99ffee1a18d162d36292f32bf2d5e514663a6b61fd82c2ecbcba PKG_SOURCE_DATE:=2023-03-31 PKG_SOURCE_VERSION:=16435e89d449f953712983315e1a89cdb678620d From 32a696f9e419ebec5b166847a16a5a45d030acbd Mon Sep 17 00:00:00 2001 From: Uwe Niethammer Date: Sun, 1 Oct 2023 12:26:51 +0200 Subject: [PATCH 17/20] uqmi: added timeout to fix hanging qmi.sh Modems which are using qmi do not reply on the 1st sync but they do on subsequent. So qmi.sh is hanging on the first call. Since 2020 uqmi supports a timeout parameter. Unfortunately qmi.sh didn't make use of this parameter. So qmi.sh is now invoking an early dummy access to unlock the modem Signed-off-by: Uwe Niethammer --- package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh | 2 ++ 1 file changed, 2 insertions(+) diff --git a/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh b/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh index 6c5104bccd8..eab7f1ea13d 100755 --- a/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh +++ b/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh @@ -83,6 +83,8 @@ proto_qmi_setup() { echo "Waiting for SIM initialization" local uninitialized_timeout=0 + # timeout 3s for first call to avoid hanging uqmi + uqmi -d "$device" --get-pin-status -t 3000 > /dev/null 2>&1 while uqmi -s -d "$device" --get-pin-status | grep '"UIM uninitialized"' > /dev/null; do [ -e "$device" ] || return 1 if [ "$uninitialized_timeout" -lt "$timeout" -o "$timeout" = "0" ]; then From 6a2e17d5c1451025396ba523e9f2d112212c7261 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Tue, 3 Oct 2023 02:32:35 +0100 Subject: [PATCH 18/20] mediatek: fix PCIe #PERST being de-asserted too early The driver for MediaTek gen3 PCIe hosts de-asserts all reset signals at the same time using a single register write operation. Delay the de-assertion of the #PERST signal by 100ms as some PCIe devices fail to come up otherwise. Signed-off-by: Daniel Golle --- ...1-pcie-mediatek-gen3-PERST-for-100ms.patch | 17 +++++++++++++++++ ...3-change-driver-name-to-mtk-pcie-gen.patch | 2 +- ...1-pcie-mediatek-gen3-PERST-for-100ms.patch | 19 +++++++++++++++++++ 3 files changed, 37 insertions(+), 1 deletion(-) create mode 100644 target/linux/mediatek/patches-5.15/611-pcie-mediatek-gen3-PERST-for-100ms.patch create mode 100644 target/linux/mediatek/patches-6.1/611-pcie-mediatek-gen3-PERST-for-100ms.patch diff --git a/target/linux/mediatek/patches-5.15/611-pcie-mediatek-gen3-PERST-for-100ms.patch b/target/linux/mediatek/patches-5.15/611-pcie-mediatek-gen3-PERST-for-100ms.patch new file mode 100644 index 00000000000..d526aded85a --- /dev/null +++ b/target/linux/mediatek/patches-5.15/611-pcie-mediatek-gen3-PERST-for-100ms.patch @@ -0,0 +1,17 @@ +--- a/drivers/pci/controller/pcie-mediatek-gen3.c ++++ b/drivers/pci/controller/pcie-mediatek-gen3.c +@@ -319,7 +319,13 @@ static int mtk_pcie_startup_port(struct + msleep(100); + + /* De-assert reset signals */ +- val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB); ++ val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB); ++ writel_relaxed(val, port->base + PCIE_RST_CTRL_REG); ++ ++ msleep(100); ++ ++ /* De-assert PERST# signals */ ++ val &= ~(PCIE_PE_RSTB); + writel_relaxed(val, port->base + PCIE_RST_CTRL_REG); + + /* Check if the link is up or not */ diff --git a/target/linux/mediatek/patches-5.15/922-v6.1-PCI-mediatek-gen3-change-driver-name-to-mtk-pcie-gen.patch b/target/linux/mediatek/patches-5.15/922-v6.1-PCI-mediatek-gen3-change-driver-name-to-mtk-pcie-gen.patch index 44aed2207d5..f026f5573ce 100644 --- a/target/linux/mediatek/patches-5.15/922-v6.1-PCI-mediatek-gen3-change-driver-name-to-mtk-pcie-gen.patch +++ b/target/linux/mediatek/patches-5.15/922-v6.1-PCI-mediatek-gen3-change-driver-name-to-mtk-pcie-gen.patch @@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c -@@ -1025,7 +1025,7 @@ static struct platform_driver mtk_pcie_d +@@ -1031,7 +1031,7 @@ static struct platform_driver mtk_pcie_d .probe = mtk_pcie_probe, .remove = mtk_pcie_remove, .driver = { diff --git a/target/linux/mediatek/patches-6.1/611-pcie-mediatek-gen3-PERST-for-100ms.patch b/target/linux/mediatek/patches-6.1/611-pcie-mediatek-gen3-PERST-for-100ms.patch new file mode 100644 index 00000000000..f88efc07320 --- /dev/null +++ b/target/linux/mediatek/patches-6.1/611-pcie-mediatek-gen3-PERST-for-100ms.patch @@ -0,0 +1,19 @@ +--- a/drivers/pci/controller/pcie-mediatek-gen3.c ++++ b/drivers/pci/controller/pcie-mediatek-gen3.c +@@ -350,9 +350,15 @@ static int mtk_pcie_startup_port(struct + msleep(100); + + /* De-assert reset signals */ +- val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB); ++ val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB); + writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG); + ++ msleep(100); ++ ++ /* De-assert PERST# signals */ ++ val &= ~(PCIE_PE_RSTB); ++ writel_relaxed(val, port->base + PCIE_RST_CTRL_REG); ++ + /* Check if the link is up or not */ + err = readl_poll_timeout(pcie->base + PCIE_LINK_STATUS_REG, val, + !!(val & PCIE_PORT_LINKUP), 20, From 9fb5082e258ac4672dc69636e5eb79f426defac8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Peter=20K=C3=B6rner?= Date: Sun, 24 Sep 2023 20:58:13 +0200 Subject: [PATCH 19/20] rtl93xx: fix condition intended to only select internal serdes ports MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This condition was introduced in commit 51c8f7661244 ("realtek: Improve MAC config handling for all SoCs") to correctly report the speed of the internal serdes ports as 10G, but instead makes all ports read 10G because the or-operator should have been an and-operator. Fixes: #9953 Fixes: 51c8f7661244 ("realtek: Improve MAC config handling for all SoCs") Signed-off-by: Peter Körner [ wrap comment to 72 column and improve commit ref ] Signed-off-by: Christian Marangi --- target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c index 5744c70ea3f..6f55f1e892e 100644 --- a/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c +++ b/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c @@ -559,7 +559,7 @@ static int rtl93xx_phylink_mac_link_state(struct dsa_switch *ds, int port, } if (priv->family_id == RTL9310_FAMILY_ID - && (port >= 52 || port <= 55)) { /* Internal serdes */ + && (port >= 52 && port <= 55)) { /* Internal serdes */ state->speed = SPEED_10000; state->link = 1; state->duplex = 1; From cd56a682326f9de4d77ee3afb99d13d25c478c08 Mon Sep 17 00:00:00 2001 From: Tobias Schramm Date: Sat, 23 Sep 2023 13:46:40 +0200 Subject: [PATCH 20/20] realtek: 5.15: rtl93xx: support 2500baseT and 5000baseT on USXGMII links The USXGMII implementation of Realtek switches can not only support 10GbE but also 2.5Gb and 5Gb on top of the usual data rates. Mark those as supported to allow them to be negotiated. This change has been tested on a ZyXEL XGS1250-12 with the following link partners: - NWA50AX Pro (2.5Gb) - RTL8152 USB NIC (2.5Gb) - AQC111 USB NIC (2.5Gb & 5Gb) Gbit and 10GbE has also been tested to still work fine with a variety of devices. Signed-off-by: Tobias Schramm --- .../linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c index 6f55f1e892e..6b661f90ade 100644 --- a/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c +++ b/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c @@ -429,8 +429,11 @@ static void rtl93xx_phylink_validate(struct dsa_switch *ds, int port, phylink_set(mask, 10000baseCR_Full); } - if (state->interface == PHY_INTERFACE_MODE_USXGMII) + if (state->interface == PHY_INTERFACE_MODE_USXGMII) { + phylink_set(mask, 2500baseT_Full); + phylink_set(mask, 5000baseT_Full); phylink_set(mask, 10000baseT_Full); + } phylink_set(mask, 10baseT_Half); phylink_set(mask, 10baseT_Full);