Merge branch 'openwrt:master' into master

include/image.mk

@@ -77,7 +77,7 @@ SQUASHFSOPT := -b $(SQUASHFS_BLOCKSIZE)
 SQUASHFSOPT += -p '/dev d 755 0 0' -p '/dev/console c 600 0 0 5 1'
 SQUASHFSOPT += $(if $(CONFIG_SELINUX),-xattrs,-no-xattrs)
 SQUASHFSCOMP := gzip
-LZMA_XZ_OPTIONS := -Xpreset extreme -Xlc 0 -Xlp 2 -Xpb 2
+LZMA_XZ_OPTIONS := -Xpreset 9 -Xe -Xlc 0 -Xlp 2 -Xpb 2
 ifeq ($(CONFIG_SQUASHFS_XZ),y)
   ifneq ($(filter arm x86 powerpc sparc,$(LINUX_KARCH)),)
     BCJ_FILTER:=-Xbcj $(LINUX_KARCH)

package/base-files/files/sbin/wifi

@@ -6,7 +6,7 @@
 
 usage() {
 	cat <<EOF
-Usage: $0 [config|up|down|reconf|reload|status]
+Usage: $0 [config|up|down|reconf|reload|status|isup]
 enables (default), disables or configures devices not yet configured.
 EOF
 	exit 1
@@ -17,8 +17,24 @@ ubus_wifi_cmd() {
 	local dev="$2"
 
 	json_init
-	[ -n "$2" ] && json_add_string device "$2"
+	[ -n "$dev" ] && json_add_string device "$dev"
-	ubus call network.wireless "$1" "$(json_dump)"
+	ubus call network.wireless "$cmd" "$(json_dump)"
+}
+
+wifi_isup() {
+	local dev="$1"
+
+	json_load "$(ubus_wifi_cmd "status" "$dev")"
+	json_get_keys devices
+
+	for device in $devices; do
+		json_select "$device"
+			json_get_var up up
+			[ $up -eq 0 ] && return 1
+		json_select ..
+	done
+
+	return 0
 }
 
 find_net_config() {(
@@ -245,6 +261,7 @@ case "$1" in
 	detect) wifi_detect_notice ;;
 	config) wifi_config ;;
 	status) ubus_wifi_cmd "status" "$2";;
+	isup) wifi_isup "$2"; exit $?;;
 	reload) wifi_reload "$2";;
 	reload_legacy) wifi_reload_legacy "$2";;
 	--help|help) usage;;

package/boot/uboot-mediatek/Makefile

@@ -1,8 +1,8 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
-PKG_VERSION:=2023.01
+PKG_VERSION:=2023.04
-PKG_HASH:=69423bad380f89a0916636e89e6dcbd2e4512d584308d922d1039d1e4331950f
+PKG_HASH:=e31cac91545ff41b71cec5d8c22afd695645cd6e2a442ccdacacd60534069341
 PKG_BUILD_DEPENDS:=!(TARGET_ramips||TARGET_mediatek_mt7623):arm-trusted-firmware-tools/host
 
 include $(INCLUDE_DIR)/u-boot.mk

package/boot/uboot-mediatek/patches/000-mtk-20-configs-mt7622-enable-environment-for-mt7622_rfb.patch

@@ -30,4 +30,4 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +CONFIG_ENV_SIZE_REDUND=0x40000
  CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
  CONFIG_NET_RANDOM_ETHADDR=y
- CONFIG_REGMAP=y
+ CONFIG_USE_IPADDR=y

package/boot/uboot-mediatek/patches/001-pinctrl-mediatek-set-R1-R0-in-case-pullen-pullsel-su.patch

@@ -0,0 +1,88 @@
+From patchwork Wed Apr 12 20:36:43 2023
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
+X-Patchwork-Id: 1768270
+Return-Path: <u-boot-bounces@lists.denx.de>
+X-Original-To: incoming@patchwork.ozlabs.org
+Delivered-To: patchwork-incoming@legolas.ozlabs.org
+Date: Wed, 12 Apr 2023 21:36:43 +0100
+From: Daniel Golle <daniel@makrotopia.org>
+To: u-boot@lists.denx.de, Sam Shih <sam.shih@mediatek.com>,
+ GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
+ Chunfeng Yun <chunfeng.yun@mediatek.com>,
+ Weijie Gao <weijie.gao@mediatek.com>, Ryder Lee <ryder.lee@mediatek.com>,
+ Frank Wunderlich <frank-w@public-files.de>
+Cc: Steven Liu =?utf-8?b?KOWKieS6uuixqik=?= <steven.liu@mediatek.com>,
+ John Crispin <john@phrozen.org>
+Subject: [PATCH] pinctrl: mediatek: set R1/R0 in case pullen/pullsel succeeded
+Message-ID: <ZDcWW7kLSLn1GMZ1@makrotopia.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+X-BeenThere: u-boot@lists.denx.de
+X-Mailman-Version: 2.1.39
+Precedence: list
+List-Id: U-Boot discussion <u-boot.lists.denx.de>
+Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
+
+Commit dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and
+related functions") changed the logic deciding to set R0 and R1
+registers for V1 devices.
+
+Before:
+	/* Also set PUPD/R0/R1 if the pin has them */
+	err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PUPD, !pullup);
+	if (err != -EINVAL) {
+		mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R0, r0);
+		mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R1, r1);
+	}
+
+After:
+	/* try pupd_r1_r0 if pullen_pullsel return error */
+	err = mtk_pinconf_bias_set_pullen_pullsel(dev, pin, disable, pullup,
+						  val);
+	if (err)
+		return mtk_pinconf_bias_set_pupd_r1_r0(dev, pin, disable,
+						       pullup, val);
+
+Tracing mtk_pinconf_bias_set_pullen_pullsel shows that the function
+always either returns 0 in case of success or -EINVAL in case any error
+has occurred. Hence the logic responsible of the decision to program R0
+and R1 has been inverted.
+
+This leads to problems on BananaPi R2 (MT7623N) when booting from
+SDMMC, it turns out accessing eMMC no longer works since
+U-Boot 2022.07:
+
+MT7623> mmc dev 0
+Card did not respond to voltage select! : -110
+
+The problem wasn't detected for a long time as both eMMC and SDMMC work
+fine if they are used to boot from, and hence R0 and R1 were already
+setup by the bootrom and/or preloader.
+
+Fix the logic to restore the originally intended and correct behavior
+and also change the descriptive comment accordingly.
+
+Fixes: dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and related functions")
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+@@ -349,10 +349,10 @@ int mtk_pinconf_bias_set_v1(struct udevi
+ {
+ 	int err;
+ 
+-	/* try pupd_r1_r0 if pullen_pullsel return error */
++	/* set pupd_r1_r0 if pullen_pullsel succeeded */
+ 	err = mtk_pinconf_bias_set_pullen_pullsel(dev, pin, disable, pullup,
+ 						  val);
+-	if (err)
++	if (!err)
+ 		return mtk_pinconf_bias_set_pupd_r1_r0(dev, pin, disable,
+ 						       pullup, val);
+ 

package/boot/uboot-mediatek/patches/100-00-clk-remove-log_ret-from-clk_get_rate.patch

@@ -20,7 +20,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/clk/clk-uclass.c
 +++ b/drivers/clk/clk-uclass.c
-@@ -469,7 +469,6 @@ void clk_free(struct clk *clk)
+@@ -471,7 +471,6 @@ void clk_free(struct clk *clk)
  ulong clk_get_rate(struct clk *clk)
  {
  	const struct clk_ops *ops;
@@ -28,7 +28,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  
  	debug("%s(clk=%p)\n", __func__, clk);
  	if (!clk_valid(clk))
-@@ -479,11 +478,7 @@ ulong clk_get_rate(struct clk *clk)
+@@ -481,11 +480,7 @@ ulong clk_get_rate(struct clk *clk)
  	if (!ops->get_rate)
  		return -ENOSYS;
  

package/boot/uboot-mediatek/patches/100-01-board-mediatek-add-more-network-configurations.patch

@@ -1,70 +0,0 @@
-From 97df847f8f895cc2692bb0e4e933269c275da378 Mon Sep 17 00:00:00 2001
-From: Weijie Gao <weijie.gao@mediatek.com>
-Date: Tue, 2 Mar 2021 15:47:45 +0800
-Subject: [PATCH 35/71] board: mediatek: add more network configurations
-
-Make the network configurations uniform for mediatek boards
-
-Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
----
- include/configs/mt7622.h | 3 ++-
- include/configs/mt7623.h | 1 +
- include/configs/mt7629.h | 1 +
- include/configs/mt7981.h | 5 +++++
- include/configs/mt7986.h | 5 +++++
- 5 files changed, 14 insertions(+), 1 deletion(-)
-
---- a/include/configs/mt7622.h
-+++ b/include/configs/mt7622.h
-@@ -19,6 +19,7 @@
- 
- /* Ethernet */
- #define CONFIG_IPADDR			192.168.1.1
--#define CONFIG_SERVERIP			192.168.1.3
-+#define CONFIG_SERVERIP			192.168.1.2
-+#define CONFIG_NETMASK			255.255.255.0
- 
- #endif
---- a/include/configs/mt7623.h
-+++ b/include/configs/mt7623.h
-@@ -35,6 +35,7 @@
- /* Ethernet */
- #define CONFIG_IPADDR			192.168.1.1
- #define CONFIG_SERVERIP			192.168.1.2
-+#define CONFIG_NETMASK			255.255.255.0
- 
- #ifdef CONFIG_DISTRO_DEFAULTS
- 
---- a/include/configs/mt7629.h
-+++ b/include/configs/mt7629.h
-@@ -30,5 +30,6 @@
- /* Ethernet */
- #define CONFIG_IPADDR			192.168.1.1
- #define CONFIG_SERVERIP			192.168.1.2
-+#define CONFIG_NETMASK			255.255.255.0
- 
- #endif
---- a/include/configs/mt7981.h
-+++ b/include/configs/mt7981.h
-@@ -18,4 +18,9 @@
- /* DRAM */
- #define CONFIG_SYS_SDRAM_BASE		0x40000000
- 
-+/* Ethernet */
-+#define CONFIG_IPADDR			192.168.1.1
-+#define CONFIG_SERVERIP			192.168.1.2
-+#define CONFIG_NETMASK			255.255.255.0
-+
- #endif
---- a/include/configs/mt7986.h
-+++ b/include/configs/mt7986.h
-@@ -18,4 +18,9 @@
- /* DRAM */
- #define CONFIG_SYS_SDRAM_BASE		0x40000000
- 
-+/* Ethernet */
-+#define CONFIG_IPADDR			192.168.1.1
-+#define CONFIG_SERVERIP			192.168.1.2
-+#define CONFIG_NETMASK			255.255.255.0
-+
- #endif

package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch

@@ -38,7 +38,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mtd/Kconfig
 +++ b/drivers/mtd/Kconfig
-@@ -210,6 +210,8 @@ config SYS_MAX_FLASH_BANKS_DETECT
+@@ -238,6 +238,8 @@ config SYS_MAX_FLASH_BANKS_DETECT
  	 to reduce the effective number of flash bank, between 0 and
  	 CONFIG_SYS_MAX_FLASH_BANKS
  
@@ -46,7 +46,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +
  source "drivers/mtd/nand/Kconfig"
  
- config SYS_NAND_MAX_CHIPS
+ config SYS_NAND_MAX_OOBFREE
 --- a/drivers/mtd/Makefile
 +++ b/drivers/mtd/Makefile
 @@ -38,3 +38,5 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPOR

package/boot/uboot-mediatek/patches/100-04-env-add-support-for-generic-MTD-device.patch

@@ -27,7 +27,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	defined(CONFIG_ENV_IS_IN_NAND)		|| \
  	defined(CONFIG_ENV_IS_IN_NVRAM)		|| \
  	defined(CONFIG_ENV_IS_IN_ONENAND)	|| \
-@@ -62,7 +63,7 @@ DECLARE_GLOBAL_DATA_PTR;
+@@ -61,7 +62,7 @@ DECLARE_GLOBAL_DATA_PTR;
  
  #if	!defined(ENV_IS_IN_DEVICE)		&& \
  	!defined(CONFIG_ENV_IS_NOWHERE)
@@ -38,7 +38,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  
 --- a/env/Kconfig
 +++ b/env/Kconfig
-@@ -53,7 +53,7 @@ config ENV_IS_NOWHERE
+@@ -62,7 +62,7 @@ config ENV_IS_NOWHERE
  		     !ENV_IS_IN_MMC && !ENV_IS_IN_NAND && \
  		     !ENV_IS_IN_NVRAM && !ENV_IS_IN_ONENAND && \
  		     !ENV_IS_IN_REMOTE && !ENV_IS_IN_SPI_FLASH && \
@@ -47,9 +47,9 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	help
  	  Define this if you don't want to or can't have an environment stored
  	  on a storage medium. In this case the environment will still exist
-@@ -242,6 +242,27 @@ config ENV_IS_IN_MMC
+@@ -251,6 +251,27 @@ config ENV_IS_IN_MMC
- 	  This value is also in units of bytes, but must also be aligned to
+ 	  offset: "u-boot,mmc-env-offset", "u-boot,mmc-env-offset-redundant".
- 	  an MMC sector boundary.
+ 	  CONFIG_ENV_OFFSET and CONFIG_ENV_OFFSET_REDUND are not used.
  
 +config ENV_IS_IN_MTD
 +	bool "Environment in a MTD device"
@@ -75,7 +75,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  config ENV_IS_IN_NAND
  	bool "Environment in a NAND device"
  	depends on !CHAIN_OF_TRUST
-@@ -549,10 +570,16 @@ config ENV_ADDR_REDUND
+@@ -558,10 +579,16 @@ config ENV_ADDR_REDUND
  	  Offset from the start of the device (or partition) of the redundant
  	  environment location.
  
@@ -93,7 +93,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	default 0x3f8000 if ARCH_ROCKCHIP && ENV_IS_IN_MMC
  	default 0x140000 if ARCH_ROCKCHIP && ENV_IS_IN_SPI_FLASH
  	default 0xF0000 if ARCH_SUNXI
-@@ -600,6 +627,12 @@ config ENV_SECT_SIZE
+@@ -609,6 +636,12 @@ config ENV_SECT_SIZE
  	help
  	  Size of the sector containing the environment.
  
@@ -108,7 +108,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	depends on ENV_IS_IN_UBI
 --- a/env/Makefile
 +++ b/env/Makefile
-@@ -26,6 +26,7 @@ obj-$(CONFIG_$(SPL_TPL_)ENV_IS_NOWHERE)
+@@ -24,6 +24,7 @@ obj-$(CONFIG_$(SPL_TPL_)ENV_IS_NOWHERE)
  obj-$(CONFIG_$(SPL_TPL_)ENV_IS_IN_MMC) += mmc.o
  obj-$(CONFIG_$(SPL_TPL_)ENV_IS_IN_FAT) += fat.o
  obj-$(CONFIG_$(SPL_TPL_)ENV_IS_IN_EXT4) += ext4.o
@@ -389,7 +389,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +};
 --- a/include/env_internal.h
 +++ b/include/env_internal.h
-@@ -130,6 +130,7 @@ enum env_location {
+@@ -109,6 +109,7 @@ enum env_location {
  	ENVL_FAT,
  	ENVL_FLASH,
  	ENVL_MMC,
@@ -399,7 +399,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	ENVL_ONENAND,
 --- a/tools/Makefile
 +++ b/tools/Makefile
-@@ -40,6 +40,7 @@ ENVCRC-$(CONFIG_ENV_IS_EMBEDDED) = y
+@@ -37,6 +37,7 @@ subdir-$(HOST_TOOLS_ALL) += gdb
  ENVCRC-$(CONFIG_ENV_IS_IN_EEPROM) = y
  ENVCRC-$(CONFIG_ENV_IS_IN_FLASH) = y
  ENVCRC-$(CONFIG_ENV_IS_IN_ONENAND) = y

package/boot/uboot-mediatek/patches/100-05-mtd-add-a-new-mtd-device-type-for-NMBM.patch

@@ -15,7 +15,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/cmd/mtdparts.c
 +++ b/cmd/mtdparts.c
-@@ -1060,6 +1060,9 @@ int mtd_id_parse(const char *id, const c
+@@ -1057,6 +1057,9 @@ int mtd_id_parse(const char *id, const c
  	} else if (strncmp(p, "spi-nand", 8) == 0) {
  		*dev_type = MTD_DEV_TYPE_SPINAND;
  		p += 8;

package/boot/uboot-mediatek/patches/100-06-mtd-add-core-facility-code-of-NMBM.patch

@@ -31,7 +31,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mtd/Kconfig
 +++ b/drivers/mtd/Kconfig
-@@ -226,4 +226,6 @@ source "drivers/mtd/spi/Kconfig"
+@@ -272,4 +272,6 @@ source "drivers/mtd/spi/Kconfig"
  
  source "drivers/mtd/ubi/Kconfig"
  

package/boot/uboot-mediatek/patches/100-09-cmd-add-nmbm-command.patch

@@ -15,7 +15,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/cmd/Kconfig
 +++ b/cmd/Kconfig
-@@ -1342,6 +1342,12 @@ config CMD_NAND_TORTURE
+@@ -1352,6 +1352,12 @@ config CMD_NAND_TORTURE
  
  endif # CMD_NAND
  
@@ -30,7 +30,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	depends on NVME
 --- a/cmd/Makefile
 +++ b/cmd/Makefile
-@@ -125,6 +125,7 @@ obj-y += legacy-mtd-utils.o
+@@ -123,6 +123,7 @@ obj-y += legacy-mtd-utils.o
  endif
  obj-$(CONFIG_CMD_MUX) += mux.o
  obj-$(CONFIG_CMD_NAND) += nand.o

package/boot/uboot-mediatek/patches/100-11-env-add-support-for-NMBM-upper-MTD-layer.patch

@@ -26,8 +26,8 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +	defined(CONFIG_ENV_IS_IN_NMBM)		|| \
  	defined(CONFIG_ENV_IS_IN_NVRAM)		|| \
  	defined(CONFIG_ENV_IS_IN_ONENAND)	|| \
- 	defined(CONFIG_ENV_IS_IN_SATA)		|| \
+ 	defined(CONFIG_ENV_IS_IN_SPI_FLASH)	|| \
-@@ -64,7 +65,7 @@ DECLARE_GLOBAL_DATA_PTR;
+@@ -63,7 +64,7 @@ DECLARE_GLOBAL_DATA_PTR;
  #if	!defined(ENV_IS_IN_DEVICE)		&& \
  	!defined(CONFIG_ENV_IS_NOWHERE)
  # error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|MMC|FAT|EXT4|MTD|\
@@ -38,7 +38,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  /*
 --- a/env/Kconfig
 +++ b/env/Kconfig
-@@ -53,7 +53,7 @@ config ENV_IS_NOWHERE
+@@ -62,7 +62,7 @@ config ENV_IS_NOWHERE
  		     !ENV_IS_IN_MMC && !ENV_IS_IN_NAND && \
  		     !ENV_IS_IN_NVRAM && !ENV_IS_IN_ONENAND && \
  		     !ENV_IS_IN_REMOTE && !ENV_IS_IN_SPI_FLASH && \
@@ -47,7 +47,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	help
  	  Define this if you don't want to or can't have an environment stored
  	  on a storage medium. In this case the environment will still exist
-@@ -303,6 +303,21 @@ config ENV_RANGE
+@@ -312,6 +312,21 @@ config ENV_RANGE
  	  Specifying a range with more erase blocks than are needed to hold
  	  CONFIG_ENV_SIZE allows bad blocks within the range to be avoided.
  
@@ -69,7 +69,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  config ENV_IS_IN_NVRAM
  	bool "Environment in a non-volatile RAM"
  	depends on !CHAIN_OF_TRUST
-@@ -579,7 +594,7 @@ config ENV_MTD_NAME
+@@ -588,7 +603,7 @@ config ENV_MTD_NAME
  config ENV_OFFSET
  	hex "Environment offset"
  	depends on ENV_IS_IN_EEPROM || ENV_IS_IN_MMC || ENV_IS_IN_NAND || \
@@ -80,7 +80,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	default 0xF0000 if ARCH_SUNXI
 --- a/env/Makefile
 +++ b/env/Makefile
-@@ -28,6 +28,7 @@ obj-$(CONFIG_$(SPL_TPL_)ENV_IS_IN_FAT) +
+@@ -26,6 +26,7 @@ obj-$(CONFIG_$(SPL_TPL_)ENV_IS_IN_FAT) +
  obj-$(CONFIG_$(SPL_TPL_)ENV_IS_IN_EXT4) += ext4.o
  obj-$(CONFIG_$(SPL_TPL_)ENV_IS_IN_MTD) += mtd.o
  obj-$(CONFIG_$(SPL_TPL_)ENV_IS_IN_NAND) += nand.o
@@ -260,7 +260,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +};
 --- a/include/env_internal.h
 +++ b/include/env_internal.h
-@@ -132,6 +132,7 @@ enum env_location {
+@@ -111,6 +111,7 @@ enum env_location {
  	ENVL_MMC,
  	ENVL_MTD,
  	ENVL_NAND,
@@ -270,11 +270,11 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	ENVL_REMOTE,
 --- a/tools/Makefile
 +++ b/tools/Makefile
-@@ -42,6 +42,7 @@ ENVCRC-$(CONFIG_ENV_IS_IN_FLASH) = y
+@@ -39,6 +39,7 @@ ENVCRC-$(CONFIG_ENV_IS_IN_FLASH) = y
  ENVCRC-$(CONFIG_ENV_IS_IN_ONENAND) = y
  ENVCRC-$(CONFIG_ENV_IS_IN_MTD) = y
  ENVCRC-$(CONFIG_ENV_IS_IN_NAND) = y
 +ENVCRC-$(CONFIG_ENV_IS_IN_NMBM) = y
  ENVCRC-$(CONFIG_ENV_IS_IN_NVRAM) = y
  ENVCRC-$(CONFIG_ENV_IS_IN_SPI_FLASH) = y
- CONFIG_BUILD_ENVCRC ?= $(ENVCRC-y)
+ BUILD_ENVCRC ?= $(ENVCRC-y)

package/boot/uboot-mediatek/patches/100-13-cmd-add-a-new-command-for-NAND-flash-debugging.patch

@@ -26,7 +26,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/cmd/Kconfig
 +++ b/cmd/Kconfig
-@@ -1342,6 +1342,14 @@ config CMD_NAND_TORTURE
+@@ -1352,6 +1352,14 @@ config CMD_NAND_TORTURE
  
  endif # CMD_NAND
  
@@ -43,7 +43,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	bool "nmbm"
 --- a/cmd/Makefile
 +++ b/cmd/Makefile
-@@ -125,6 +125,7 @@ obj-y += legacy-mtd-utils.o
+@@ -123,6 +123,7 @@ obj-y += legacy-mtd-utils.o
  endif
  obj-$(CONFIG_CMD_MUX) += mux.o
  obj-$(CONFIG_CMD_NAND) += nand.o

package/boot/uboot-mediatek/patches/100-14-mtd-spi-nor-add-support-to-read-flash-unique-ID.patch

@@ -114,7 +114,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  static int spi_nor_hwcaps2cmd(u32 hwcaps, const int table[][2], size_t size)
  {
  	size_t i;
-@@ -3901,6 +3995,7 @@ int spi_nor_scan(struct spi_nor *nor)
+@@ -3930,6 +4024,7 @@ int spi_nor_scan(struct spi_nor *nor)
  	nor->write = spi_nor_write_data;
  	nor->read_reg = spi_nor_read_reg;
  	nor->write_reg = spi_nor_write_reg;
@@ -132,7 +132,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  #define SNOR_MFR_CYPRESS	0x34
  
  /*
-@@ -565,6 +566,7 @@ struct spi_nor {
+@@ -571,6 +572,7 @@ struct spi_nor {
  	void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
  	int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
  	int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);

package/boot/uboot-mediatek/patches/100-15-cmd-sf-add-support-to-read-flash-unique-ID.patch

@@ -27,7 +27,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  enum {
  	STAGE_ERASE,
  	STAGE_CHECK,
-@@ -603,6 +611,8 @@ static int do_spi_flash(struct cmd_tbl *
+@@ -601,6 +609,8 @@ static int do_spi_flash(struct cmd_tbl *
  		ret = do_spi_flash_erase(argc, argv);
  	else if (strcmp(cmd, "protect") == 0)
  		ret = do_spi_protect(argc, argv);
@@ -36,7 +36,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	else if (IS_ENABLED(CONFIG_CMD_SF_TEST) && !strcmp(cmd, "test"))
  		ret = do_spi_flash_test(argc, argv);
  	else
-@@ -633,7 +643,8 @@ static const char long_help[] =
+@@ -626,7 +636,8 @@ static const char long_help[] =
  	"					  at `addr' to flash at `offset'\n"
  	"					  or to start of mtd `partition'\n"
  	"sf protect lock/unlock sector len	- protect/unprotect 'len' bytes starting\n"

package/boot/uboot-mediatek/patches/100-16-cmd-bootmenu-add-ability-to-select-item-by-shortkey.patch

@@ -14,40 +14,41 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/cmd/bootmenu.c
 +++ b/cmd/bootmenu.c
-@@ -87,16 +87,17 @@ static char *bootmenu_choice_entry(void
+@@ -89,6 +89,7 @@ static char *bootmenu_choice_entry(void
  	struct bootmenu_data *menu = data;
  	struct bootmenu_entry *iter;
- 	enum bootmenu_key key = KEY_NONE;
+ 	enum bootmenu_key key = BKEY_NONE;
 +	int choice = -1;
- 	int esc = 0;
  	int i;
  
+ 	cli_ch_init(cch);
+@@ -96,10 +97,10 @@ static char *bootmenu_choice_entry(void
  	while (1) {
  		if (menu->delay >= 0) {
  			/* Autoboot was not stopped */
--			bootmenu_autoboot_loop(menu, &key, &esc);
+-			key = bootmenu_autoboot_loop(menu, cch);
-+			bootmenu_autoboot_loop(menu, &key, &esc, &choice);
++			key = bootmenu_autoboot_loop(menu, cch, &choice);
  		} else {
  			/* Some key was pressed, so autoboot was stopped */
--			bootmenu_loop(menu, &key, &esc);
+-			key = bootmenu_loop(menu, cch);
-+			bootmenu_loop(menu, &key, &esc, &choice);
++			key = bootmenu_loop(menu, cch, &choice);
  		}
  
  		switch (key) {
-@@ -110,6 +111,12 @@ static char *bootmenu_choice_entry(void
+@@ -113,6 +114,12 @@ static char *bootmenu_choice_entry(void
  				++menu->active;
  			/* no menu key selected, regenerate menu */
  			return NULL;
-+		case KEY_CHOICE:
++		case BKEY_CHOICE:
 +			menu->active = choice;
 +			if (!menu->last_choiced) {
 +				menu->last_choiced = true;
 +				return NULL;
 +			}
- 		case KEY_SELECT:
+ 		case BKEY_SELECT:
  			iter = menu->first;
  			for (i = 0; i < menu->active; ++i)
-@@ -167,6 +174,9 @@ static int prepare_bootmenu_entry(struct
+@@ -170,6 +177,9 @@ static int prepare_bootmenu_entry(struct
  	unsigned short int i = *index;
  	struct bootmenu_entry *entry = NULL;
  	struct bootmenu_entry *iter = *current;
@@ -57,7 +58,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  
  	while ((option = bootmenu_getoption(i))) {
  
-@@ -181,11 +191,24 @@ static int prepare_bootmenu_entry(struct
+@@ -184,11 +194,24 @@ static int prepare_bootmenu_entry(struct
  		if (!entry)
  			return -ENOMEM;
  
@@ -83,7 +84,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  
  		entry->command = strdup(sep + 1);
  		if (!entry->command) {
-@@ -331,6 +354,7 @@ static struct bootmenu_data *bootmenu_cr
+@@ -334,6 +357,7 @@ static struct bootmenu_data *bootmenu_cr
  	menu->delay = delay;
  	menu->active = 0;
  	menu->first = NULL;
@@ -91,7 +92,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  
  	default_str = env_get("bootmenu_default");
  	if (default_str)
-@@ -366,9 +390,9 @@ static struct bootmenu_data *bootmenu_cr
+@@ -369,9 +393,9 @@ static struct bootmenu_data *bootmenu_cr
  
  		/* Add Quit entry if entering U-Boot console is disabled */
  		if (!IS_ENABLED(CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE))
@@ -105,7 +106,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  			free(entry);
 --- a/common/menu.c
 +++ b/common/menu.c
-@@ -47,6 +47,33 @@ struct menu {
+@@ -49,6 +49,33 @@ struct menu {
  	int item_cnt;
  };
  
@@ -139,68 +140,93 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  /*
   * An iterator function for menu items. callback will be called for each item
   * in m, with m, a pointer to the item, and extra being passed to callback. If
-@@ -426,7 +453,7 @@ int menu_destroy(struct menu *m)
+@@ -428,7 +455,7 @@ int menu_destroy(struct menu *m)
  }
  
- void bootmenu_autoboot_loop(struct bootmenu_data *menu,
+ enum bootmenu_key bootmenu_autoboot_loop(struct bootmenu_data *menu,
--			    enum bootmenu_key *key, int *esc)
+-					 struct cli_ch_state *cch)
-+			    enum bootmenu_key *key, int *esc, int *choice)
++					 struct cli_ch_state *cch, int *choice)
  {
+ 	enum bootmenu_key key = BKEY_NONE;
  	int i, c;
- 
+@@ -463,6 +490,19 @@ enum bootmenu_key bootmenu_autoboot_loop
-@@ -456,6 +483,19 @@ void bootmenu_autoboot_loop(struct bootm
  				break;
  			default:
- 				*key = KEY_NONE;
+ 				key = BKEY_NONE;
-+				if (*esc)
++				if (cch->esc_len || !choice)
 +					break;
 +
 +				*choice = find_choice(c);
 +				if ((*choice >= 0 &&
 +				     *choice < menu->count - 1)) {
-+					*key = KEY_CHOICE;
++					key = BKEY_CHOICE;
 +				} else if (c == '0') {
 +					*choice = menu->count - 1;
-+					*key = KEY_CHOICE;
++					key = BKEY_CHOICE;
 +				} else {
-+					*key = KEY_NONE;
++					key = BKEY_NONE;
 +				}
  				break;
  			}
- 
+ 			break;
-@@ -475,10 +515,16 @@ void bootmenu_autoboot_loop(struct bootm
+@@ -483,7 +523,8 @@ enum bootmenu_key bootmenu_autoboot_loop
+ 	return key;
  }
  
- void bootmenu_loop(struct bootmenu_data *menu,
+-enum bootmenu_key bootmenu_conv_key(int ichar)
--		   enum bootmenu_key *key, int *esc)
++enum bootmenu_key bootmenu_conv_key(struct bootmenu_data *menu, int ichar,
-+		   enum bootmenu_key *key, int *esc, int *choice)
++				    int *choice)
  {
+ 	enum bootmenu_key key;
+ 
+@@ -515,6 +556,20 @@ enum bootmenu_key bootmenu_conv_key(int
+ 	case ' ':
+ 		key = BKEY_SPACE;
+ 		break;
++	case '0' ... '9':
++	case 'a' ... 'z':
++		if (choice && menu) {
++			*choice = find_choice(ichar);
++			if ((*choice >= 0 && *choice < menu->count - 1)) {
++				key = BKEY_CHOICE;
++				break;
++			} else if (ichar == '0') {
++				*choice = menu->count - 1;
++				key = BKEY_CHOICE;
++				break;
++			}
++		}
++		fallthrough;
+ 	default:
+ 		key = BKEY_NONE;
+ 		break;
+@@ -524,11 +579,16 @@ enum bootmenu_key bootmenu_conv_key(int
+ }
+ 
+ enum bootmenu_key bootmenu_loop(struct bootmenu_data *menu,
+-				struct cli_ch_state *cch)
++				struct cli_ch_state *cch, int *choice)
+ {
+ 	enum bootmenu_key key;
  	int c;
  
 +	if (menu->last_choiced) {
 +		menu->last_choiced = false;
-+		*key = KEY_SELECT;
++		return BKEY_SELECT;
-+		return;
 +	}
 +
- 	if (*esc == 1) {
+ 	c = cli_ch_process(cch, 0);
- 		if (tstc()) {
+ 	if (!c) {
- 			c = getchar();
+ 		while (!c && !tstc()) {
-@@ -504,6 +550,14 @@ void bootmenu_loop(struct bootmenu_data
+@@ -542,7 +602,7 @@ enum bootmenu_key bootmenu_loop(struct b
- 		if (c == '\e') {
+ 		}
- 			*esc = 1;
+ 	}
- 			*key = KEY_NONE;
+ 
-+		} else {
+-	key = bootmenu_conv_key(c);
-+			*choice = find_choice(c);
++	key = bootmenu_conv_key(menu, c, choice);
-+			if ((*choice >= 0 && *choice < menu->count - 1)) {
+ 
-+				*key = KEY_CHOICE;
+ 	return key;
-+			} else if (c == '0') {
-+				*choice = menu->count - 1;
-+				*key = KEY_CHOICE;
-+			}
  }
- 		break;
- 	case 1:
 --- a/include/menu.h
 +++ b/include/menu.h
 @@ -6,6 +6,8 @@
@@ -209,10 +235,10 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  
 +#include <linux/ctype.h>
 +
+ struct cli_ch_state;
  struct menu;
  
- struct menu *menu_create(char *title, int timeout, int prompt,
+@@ -19,6 +21,8 @@ int menu_get_choice(struct menu *m, void
-@@ -18,6 +20,8 @@ int menu_get_choice(struct menu *m, void
  int menu_item_add(struct menu *m, char *item_key, void *item_data);
  int menu_destroy(struct menu *m);
  int menu_default_choice(struct menu *m, void **choice);
@@ -221,26 +247,66 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  
  /**
   * menu_show() Show a boot menu
-@@ -40,6 +44,7 @@ struct bootmenu_data {
+@@ -41,6 +45,7 @@ struct bootmenu_data {
  	int active;			/* active menu entry */
  	int count;			/* total count of menu entries */
  	struct bootmenu_entry *first;	/* first menu entry */
 +	bool last_choiced;
  };
  
- enum bootmenu_key {
+ /** enum bootmenu_key - keys that can be returned by the bootmenu */
-@@ -51,11 +56,12 @@ enum bootmenu_key {
+@@ -54,6 +59,7 @@ enum bootmenu_key {
- 	KEY_PLUS,
+ 	BKEY_MINUS,
- 	KEY_MINUS,
+ 	BKEY_SPACE,
- 	KEY_SPACE,
+ 	BKEY_SAVE,
-+	KEY_CHOICE,
++	BKEY_CHOICE,
- };
  
- void bootmenu_autoboot_loop(struct bootmenu_data *menu,
+ 	BKEY_COUNT,
--			    enum bootmenu_key *key, int *esc);
+ };
-+			    enum bootmenu_key *key, int *esc, int *choice);
+@@ -76,7 +82,7 @@ enum bootmenu_key {
- void bootmenu_loop(struct bootmenu_data *menu,
+  *	anything else: KEY_NONE
--		   enum bootmenu_key *key, int *esc);
+  */
-+		   enum bootmenu_key *key, int *esc, int *choice);
+ enum bootmenu_key bootmenu_autoboot_loop(struct bootmenu_data *menu,
+-					 struct cli_ch_state *cch);
++					 struct cli_ch_state *cch, int *choice);
+ 
+ /**
+  * bootmenu_loop() - handle waiting for a keypress when autoboot is disabled
+@@ -102,7 +108,7 @@ enum bootmenu_key bootmenu_autoboot_loop
+  *	Space: BKEY_SPACE
+  */
+ enum bootmenu_key bootmenu_loop(struct bootmenu_data *menu,
+-				struct cli_ch_state *cch);
++				struct cli_ch_state *cch, int *choice);
+ 
+ /**
+  * bootmenu_conv_key() - Convert a U-Boot keypress into a menu key
+@@ -110,6 +116,7 @@ enum bootmenu_key bootmenu_loop(struct b
+  * @ichar: Keypress to convert (ASCII, including control characters)
+  * Returns: Menu key that corresponds to @ichar, or BKEY_NONE if none
+  */
+-enum bootmenu_key bootmenu_conv_key(int ichar);
++enum bootmenu_key bootmenu_conv_key(struct bootmenu_data *menu, int ichar,
++				    int *choice);
  
  #endif /* __MENU_H__ */
+--- a/cmd/eficonfig.c
++++ b/cmd/eficonfig.c
+@@ -239,7 +239,7 @@ char *eficonfig_choice_entry(void *data)
+ 	cli_ch_init(cch);
+ 
+ 	while (1) {
+-		key = bootmenu_loop((struct bootmenu_data *)efi_menu, cch);
++		key = bootmenu_loop((struct bootmenu_data *)efi_menu, cch, NULL);
+ 
+ 		switch (key) {
+ 		case BKEY_UP:
+@@ -1937,7 +1937,7 @@ char *eficonfig_choice_change_boot_order
+ 
+ 	cli_ch_init(cch);
+ 	while (1) {
+-		key = bootmenu_loop(NULL, cch);
++		key = bootmenu_loop(NULL, cch, NULL);
+ 
+ 		switch (key) {
+ 		case BKEY_PLUS:

package/boot/uboot-mediatek/patches/100-19-board-mt7622-use-new-spi-nand-driver.patch

@@ -63,7 +63,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  CONFIG_CMD_PCI=y
  CONFIG_CMD_SF_TEST=y
  CONFIG_CMD_PING=y
-@@ -36,6 +37,10 @@ CONFIG_SYSCON=y
+@@ -40,6 +41,10 @@ CONFIG_SYSCON=y
  CONFIG_CLK=y
  CONFIG_MMC_HS200_SUPPORT=y
  CONFIG_MMC_MTK=y

package/boot/uboot-mediatek/patches/100-20-board-mt7981-add-reference-board-using-new-spi-nand-.patch

@@ -18,7 +18,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
-@@ -1266,6 +1266,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+@@ -1288,6 +1288,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
  	mt7623n-bananapi-bpi-r2.dtb \
  	mt7629-rfb.dtb \
  	mt7981-rfb.dtb \

package/boot/uboot-mediatek/patches/100-21-mtd-spi-nor-add-more-flash-ids.patch

@@ -33,9 +33,9 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	{ INFO("en25s64",    0x1c3817, 0, 64 * 1024,  128, SECT_4K) },
  #endif
  #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
-@@ -119,6 +120,11 @@ const struct flash_info spi_nor_ids[] =
+@@ -149,6 +150,11 @@ const struct flash_info spi_nor_ids[] =
- 			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ 	{INFO("gd55x02g", 0xc8481C, 0, 64 * 1024, 4096,	SECT_4K |
- 	},
+ 	SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)},
  	{
 +		INFO("gd25q256", 0xc84019, 0, 64 * 1024, 512,
 +			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
@@ -45,7 +45,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  		INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
  			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
  			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-@@ -398,6 +404,16 @@ const struct flash_info spi_nor_ids[] =
+@@ -468,6 +474,16 @@ const struct flash_info spi_nor_ids[] =
  			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
  	},
  	{
@@ -62,7 +62,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  		INFO("w25q128jw", 0xef8018, 0, 64 * 1024, 256,
  			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
  			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-@@ -447,6 +463,11 @@ const struct flash_info spi_nor_ids[] =
+@@ -517,6 +533,11 @@ const struct flash_info spi_nor_ids[] =
  			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
  	},
  	{ INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

package/boot/uboot-mediatek/patches/100-23-mmc-mtk-sd-add-support-to-display-verbose-error-log.patch

@@ -15,7 +15,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mmc/Kconfig
 +++ b/drivers/mmc/Kconfig
-@@ -818,6 +818,14 @@ config MMC_MTK
+@@ -823,6 +823,14 @@ config MMC_MTK
  	  This is needed if support for any SD/SDIO/MMC devices is required.
  	  If unsure, say N.
  
@@ -29,7 +29,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +
  endif
  
- config FSL_ESDHC
+ config FSL_SDHC_V2_3
 --- a/drivers/mmc/Makefile
 +++ b/drivers/mmc/Makefile
 @@ -84,3 +84,7 @@ obj-$(CONFIG_RENESAS_SDHI)		+= tmio-comm

package/boot/uboot-mediatek/patches/100-24-cmd-ubi-make-volume-find-create-remove-APIs-public.patch

@@ -45,7 +45,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	struct ubi_volume *vol;
 --- a/include/ubi_uboot.h
 +++ b/include/ubi_uboot.h
-@@ -73,6 +73,10 @@ extern void ubi_exit(void);
+@@ -51,6 +51,10 @@ extern void ubi_exit(void);
  extern int ubi_part(char *part_name, const char *vid_header_offset);
  extern int ubi_volume_write(char *volume, void *buf, size_t size);
  extern int ubi_volume_read(char *volume, char *buf, size_t size);

package/boot/uboot-mediatek/patches/100-26-env-ubi-add-support-to-create-environment-volume-if-.patch

@@ -14,7 +14,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/env/Kconfig
 +++ b/env/Kconfig
-@@ -666,6 +666,12 @@ config ENV_UBI_VOLUME_REDUND
+@@ -675,6 +675,12 @@ config ENV_UBI_VOLUME_REDUND
  	help
  	  Name of the redundant volume that you want to store the environment in.
  
@@ -29,7 +29,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	depends on ENV_IS_IN_UBI
 --- a/env/ubi.c
 +++ b/env/ubi.c
-@@ -100,6 +100,18 @@ static int env_ubi_save(void)
+@@ -106,6 +106,18 @@ static int env_ubi_save(void)
  #endif /* CONFIG_SYS_REDUNDAND_ENVIRONMENT */
  #endif /* CONFIG_CMD_SAVEENV */
  
@@ -48,7 +48,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  #ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
  static int env_ubi_load(void)
  {
-@@ -129,6 +141,11 @@ static int env_ubi_load(void)
+@@ -135,6 +147,11 @@ static int env_ubi_load(void)
  		return -EIO;
  	}
  
@@ -60,7 +60,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	read1_fail = ubi_volume_read(CONFIG_ENV_UBI_VOLUME, (void *)tmp_env1,
  				     CONFIG_ENV_SIZE);
  	if (read1_fail)
-@@ -166,6 +183,9 @@ static int env_ubi_load(void)
+@@ -172,6 +189,9 @@ static int env_ubi_load(void)
  		return -EIO;
  	}
  

package/boot/uboot-mediatek/patches/100-29-board-mediatek-wire-up-NMBM-support.patch

@@ -114,7 +114,7 @@ Subject: [PATCH] board: mediatek: wire-up NMBM support
 +}
 --- a/board/mediatek/mt7981/mt7981_rfb.c
 +++ b/board/mediatek/mt7981/mt7981_rfb.c
-@@ -4,7 +4,59 @@
+@@ -4,7 +4,58 @@
   * Author: Sam Shih <sam.shih@mediatek.com>
   */
  
@@ -133,9 +133,8 @@ Subject: [PATCH] board: mediatek: wire-up NMBM support
 +
  int board_init(void)
  {
-+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ 	return 0;
-+	return 0;
+ }
-+}
 +
 +int board_late_init(void)
 +{
@@ -172,11 +171,11 @@ Subject: [PATCH] board: mediatek: wire-up NMBM support
 +	add_mtd_device(upper);
 +#endif
 +
- 	return 0;
++	return 0;
- }
++}
 --- a/board/mediatek/mt7986/mt7986_rfb.c
 +++ b/board/mediatek/mt7986/mt7986_rfb.c
-@@ -4,7 +4,61 @@
+@@ -4,7 +4,60 @@
   * Author: Sam Shih <sam.shih@mediatek.com>
   */
  
@@ -195,9 +194,8 @@ Subject: [PATCH] board: mediatek: wire-up NMBM support
 +
  int board_init(void)
  {
-+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ 	return 0;
-+	return 0;
+ }
-+}
 +
 +int board_late_init(void)
 +{
@@ -236,5 +234,5 @@ Subject: [PATCH] board: mediatek: wire-up NMBM support
 +	add_mtd_device(upper);
 +#endif
 +
- 	return 0;
++	return 0;
- }
++}

package/boot/uboot-mediatek/patches/110-no-kwbimage.patch

@@ -1,6 +1,6 @@
 --- a/tools/Makefile
 +++ b/tools/Makefile
-@@ -121,7 +121,6 @@ dumpimage-mkimage-objs := aisimage.o \
+@@ -115,7 +115,6 @@ dumpimage-mkimage-objs := aisimage.o \
  			imximage.o \
  			imx8image.o \
  			imx8mimage.o \

package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch

@@ -1,6 +1,6 @@
 --- a/Makefile
 +++ b/Makefile
-@@ -1069,7 +1069,7 @@ quiet_cmd_pad_cat = CAT     $@
+@@ -1067,7 +1067,7 @@ quiet_cmd_pad_cat = CAT     $@
  cmd_pad_cat = $(cmd_objcopy) && $(append) || { rm -f $@; false; }
  
  quiet_cmd_lzma = LZMA    $@

package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch

@@ -123,7 +123,7 @@
  		   int arch, int ph_type, int bootstage_id,
 --- a/include/image.h
 +++ b/include/image.h
-@@ -1042,6 +1042,7 @@ int fit_parse_subimage(const char *spec,
+@@ -1046,6 +1046,7 @@ int fit_parse_subimage(const char *spec,
  		ulong *addr, const char **image_name);
  
  int fit_get_subimage_count(const void *fit, int images_noffset);

package/boot/uboot-mediatek/patches/211-cmd-bootmenu-custom-title.patch

@@ -1,6 +1,6 @@
 --- a/cmd/bootmenu.c
 +++ b/cmd/bootmenu.c
-@@ -449,7 +449,11 @@ static void menu_display_statusline(stru
+@@ -452,7 +452,11 @@ static void menu_display_statusline(stru
  	printf(ANSI_CURSOR_POSITION, 1, 1);
  	puts(ANSI_CLEAR_LINE);
  	printf(ANSI_CURSOR_POSITION, 2, 3);
@@ -13,7 +13,7 @@
  	puts(ANSI_CLEAR_LINE_TO_END);
  	printf(ANSI_CURSOR_POSITION, 3, 1);
  	puts(ANSI_CLEAR_LINE);
-@@ -534,6 +538,7 @@ static enum bootmenu_ret bootmenu_show(i
+@@ -537,6 +541,7 @@ static enum bootmenu_ret bootmenu_show(i
  		return BOOTMENU_RET_FAIL;
  	}
  
@@ -23,7 +23,7 @@
  			goto cleanup;
 --- a/include/menu.h
 +++ b/include/menu.h
-@@ -44,6 +44,7 @@ struct bootmenu_data {
+@@ -45,6 +45,7 @@ struct bootmenu_data {
  	int active;			/* active menu entry */
  	int count;			/* total count of menu entries */
  	struct bootmenu_entry *first;	/* first menu entry */

package/boot/uboot-mediatek/patches/212-cmd-bootmenu-hack-restore-ansi.patch

@@ -0,0 +1,11 @@
+--- a/common/menu.c
++++ b/common/menu.c
+@@ -15,7 +15,7 @@
+ 
+ #include "menu.h"
+ 
+-#define ansi 0
++#define ansi 1
+ 
+ /*
+  * Internally, each item in a menu is represented by a struct menu_item.

package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch

@@ -1,6 +1,6 @@
 --- a/cmd/Kconfig
 +++ b/cmd/Kconfig
-@@ -591,6 +591,12 @@ config CMD_ENV_EXISTS
+@@ -601,6 +601,12 @@ config CMD_ENV_EXISTS
  	  Check if a variable is defined in the environment for use in
  	  shell scripting.
  
@@ -15,7 +15,7 @@
  	help
 --- a/cmd/nvedit.c
 +++ b/cmd/nvedit.c
-@@ -409,6 +409,60 @@ int do_env_ask(struct cmd_tbl *cmdtp, in
+@@ -408,6 +408,60 @@ int do_env_ask(struct cmd_tbl *cmdtp, in
  }
  #endif
  
@@ -76,7 +76,7 @@
  #if defined(CONFIG_CMD_ENV_CALLBACK)
  static int print_static_binding(const char *var_name, const char *callback_name,
  				void *priv)
-@@ -1232,6 +1286,9 @@ static struct cmd_tbl cmd_env_sub[] = {
+@@ -1231,6 +1285,9 @@ static struct cmd_tbl cmd_env_sub[] = {
  	U_BOOT_CMD_MKENT(load, 1, 0, do_env_load, "", ""),
  #endif
  	U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_env_print, "", ""),
@@ -86,7 +86,7 @@
  #if defined(CONFIG_CMD_RUN)
  	U_BOOT_CMD_MKENT(run, CONFIG_SYS_MAXARGS, 1, do_run, "", ""),
  #endif
-@@ -1323,6 +1380,9 @@ static char env_help_text[] =
+@@ -1322,6 +1379,9 @@ static char env_help_text[] =
  #if defined(CONFIG_CMD_NVEDIT_EFI)
  	"env print -e [-guid guid] [-n] [name ...] - print UEFI environment\n"
  #endif
@@ -96,7 +96,7 @@
  #if defined(CONFIG_CMD_RUN)
  	"env run var [...] - run commands in an environment variable\n"
  #endif
-@@ -1432,6 +1492,17 @@ U_BOOT_CMD(
+@@ -1431,6 +1491,17 @@ U_BOOT_CMD(
  );
  #endif
  

package/boot/uboot-mediatek/patches/280-image-fdt-save-name-of-FIT-configuration-in-chosen-node.patch

@@ -28,4 +28,4 @@ Reviewed-by: Tom Rini <trini@konsulko.com>
 +
  	/* Update ethernet nodes */
  	fdt_fixup_ethernet(blob);
- #if CONFIG_IS_ENABLED(CMD_PSTORE)
+ #if IS_ENABLED(CONFIG_CMD_PSTORE)

package/boot/uboot-mediatek/patches/300-force-pylibfdt-build.patch

@@ -1,6 +1,6 @@
 --- a/Makefile
 +++ b/Makefile
-@@ -2028,26 +2028,7 @@ endif
+@@ -2000,26 +2000,7 @@ endif
  # Check dtc and pylibfdt, if DTC is provided, else build them
  PHONY += scripts_dtc
  scripts_dtc: scripts_basic

package/boot/uboot-mediatek/patches/303-mt7986-generic-reset-button-ignore-env.patch

@@ -17,7 +17,7 @@
  
  #include <mtd.h>
  #include <linux/mtd/mtd.h>
-@@ -25,7 +32,19 @@ int board_init(void)
+@@ -24,7 +31,19 @@ int board_init(void)
  
  int board_late_init(void)
  {

package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch

@@ -1,9 +1,9 @@
 --- a/configs/mt7623n_bpir2_defconfig
 +++ b/configs/mt7623n_bpir2_defconfig
-@@ -5,57 +5,142 @@ CONFIG_ARCH_MEDIATEK=y
+@@ -7,35 +7,105 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
- CONFIG_TEXT_BASE=0x81e00000
- CONFIG_SYS_MALLOC_F_LEN=0x4000
  CONFIG_NR_DRAM_BANKS=1
+ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10
 -CONFIG_ENV_SIZE=0x1000
 +CONFIG_ENV_SIZE=0x10000
  CONFIG_ENV_OFFSET=0x100000
@@ -13,9 +13,6 @@
 +CONFIG_SYS_PROMPT="MT7623> "
  CONFIG_TARGET_MT7623=y
  CONFIG_SYS_LOAD_ADDR=0x84000000
- CONFIG_DISTRO_DEFAULTS=y
- CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
- CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10
  CONFIG_FIT=y
 -CONFIG_FIT_VERBOSE=y
 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
@@ -27,6 +24,9 @@
 +CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
 +CONFIG_BOARD_LATE_INIT=y
++# CONFIG_BOOTSTD is not set
++# CONFIG_BOOT_DEFAULTS is not set
+ CONFIG_DISTRO_DEFAULTS=y
  CONFIG_BOOTDELAY=3
 +CONFIG_BOOTP_SEND_HOSTNAME=y
  CONFIG_DEFAULT_FDT_FILE="mt7623n-bananapi-bpi-r2.dtb"
@@ -68,16 +68,12 @@
 +CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_MBR=y
  CONFIG_CMD_MMC=y
--CONFIG_CMD_READ=y
+ CONFIG_CMD_READ=y
 -# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_MTD=y
  # CONFIG_CMD_NFS is not set
-+CONFIG_CMD_PCI=y
 +CONFIG_CMD_SF_TEST=y
 +CONFIG_CMD_PING=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
-+CONFIG_CMD_SMC=y
 +CONFIG_CMD_TFTPBOOT=y
 +CONFIG_CMD_TFTPSRV=y
 +CONFIG_CMD_ASKENV=y
@@ -91,69 +87,56 @@
 +CONFIG_CMD_STRINGS=y
 +CONFIG_CMD_USB=y
 +CONFIG_CMD_UUID=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_READ=y
 +CONFIG_CMD_SCSI=y
 +CONFIG_DISPLAY_CPUINFO=y
 +CONFIG_DM_ETH=y
 +CONFIG_DM_GPIO=y
 +CONFIG_DM_SCSI=y
 +CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
 +CONFIG_DM_REGULATOR=y
 +CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
 +CONFIG_DM_REGULATOR_GPIO=y
 +CONFIG_DM_USB=y
 +CONFIG_DM_PCI=y
-+CONFIG_DM_PWM=y
 +CONFIG_AHCI=y
 +CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
 +CONFIG_SCSI=y
-+CONFIG_PWM_MTK=y
 +CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  CONFIG_ENV_OVERWRITE=y
  CONFIG_ENV_IS_IN_MMC=y
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
- CONFIG_REGMAP=y
+ CONFIG_USE_IPADDR=y
- CONFIG_SYSCON=y
+ CONFIG_IPADDR="192.168.1.1"
- CONFIG_CLK=y
+ CONFIG_USE_SERVERIP=y
-+CONFIG_LZMA=y
+@@ -47,6 +117,12 @@ CONFIG_CLK=y
-+CONFIG_MEDIATEK_ETH=y
- # CONFIG_MMC_QUIRKS is not set
  CONFIG_SUPPORT_EMMC_BOOT=y
  CONFIG_MMC_HS400_SUPPORT=y
  CONFIG_MMC_MTK=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_MTK_TIMER=y
 +CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_PARTITION_UUIDS=y
 +CONFIG_PCI=y
 +CONFIG_PCIE_MEDIATEK=y
 +CONFIG_PHY=y
++CONFIG_PINCONF=y
  CONFIG_PHY_FIXED=y
--CONFIG_MEDIATEK_ETH=y
+ CONFIG_MEDIATEK_ETH=y
  CONFIG_PINCTRL=y
- CONFIG_PINCONF=y
+@@ -56,10 +132,13 @@ CONFIG_POWER_DOMAIN=y
- CONFIG_PINCTRL_MT7623=y
+ CONFIG_MTK_POWER_DOMAIN=y
- CONFIG_POWER_DOMAIN=y
+ CONFIG_DM_SERIAL=y
--CONFIG_MTK_POWER_DOMAIN=y
+ CONFIG_MTK_SERIAL=y
--CONFIG_DM_SERIAL=y
--CONFIG_MTK_SERIAL=y
 +CONFIG_RANDOM_UUID=y
 +CONFIG_REGEX=y
  CONFIG_SYSRESET=y
  CONFIG_SYSRESET_WATCHDOG=y
  CONFIG_TIMER=y
--CONFIG_MTK_TIMER=y
+ CONFIG_MTK_TIMER=y
 +CONFIG_VERSION_VARIABLE=y
  CONFIG_WDT_MTK=y
--CONFIG_LZMA=y
+ CONFIG_LZMA=y
  # CONFIG_EFI_GRUB_ARM32_WORKAROUND is not set
 --- /dev/null
 +++ b/bananapi_bpi-r2_env

package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch

@@ -1,9 +1,9 @@
 --- a/configs/mt7623a_unielec_u7623_02_defconfig
 +++ b/configs/mt7623a_unielec_u7623_02_defconfig
-@@ -5,55 +5,140 @@ CONFIG_ARCH_MEDIATEK=y
+@@ -7,34 +7,110 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
- CONFIG_TEXT_BASE=0x81e00000
- CONFIG_SYS_MALLOC_F_LEN=0x4000
  CONFIG_NR_DRAM_BANKS=1
+ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10
 -CONFIG_ENV_SIZE=0x1000
 +CONFIG_ENV_SIZE=0x10000
  CONFIG_ENV_OFFSET=0x100000
@@ -13,9 +13,6 @@
 +CONFIG_SYS_PROMPT="MT7623> "
  CONFIG_TARGET_MT7623=y
  CONFIG_SYS_LOAD_ADDR=0x84000000
- CONFIG_DISTRO_DEFAULTS=y
- CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
- CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10
  CONFIG_FIT=y
 -CONFIG_FIT_VERBOSE=y
 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
@@ -27,6 +24,9 @@
 +CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
 +CONFIG_BOARD_LATE_INIT=y
++# CONFIG_BOOTSTD is not set
++# CONFIG_BOOT_DEFAULTS is not set
+ CONFIG_DISTRO_DEFAULTS=y
  CONFIG_BOOTDELAY=3
 +CONFIG_BOOTP_SEND_HOSTNAME=y
  CONFIG_DEFAULT_FDT_FILE="mt7623a-unielec-u7623-02-emmc.dtb"
@@ -69,16 +69,12 @@
 +CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_MBR=y
  CONFIG_CMD_MMC=y
--CONFIG_CMD_READ=y
+ CONFIG_CMD_READ=y
 -# CONFIG_CMD_SETEXPR is not set
  # CONFIG_CMD_NFS is not set
--CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_CMD_PCI=y
 +CONFIG_CMD_SF_TEST=y
 +CONFIG_CMD_PING=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
-+CONFIG_CMD_SMC=y
 +CONFIG_CMD_TFTPBOOT=y
 +CONFIG_CMD_TFTPSRV=y
 +CONFIG_CMD_ASKENV=y
@@ -99,61 +95,52 @@
 +CONFIG_DM_GPIO=y
 +CONFIG_DM_SCSI=y
 +CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
 +CONFIG_DM_REGULATOR=y
 +CONFIG_DM_REGULATOR_FIXED=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_DM_REGULATOR_GPIO=y
 +CONFIG_DM_USB=y
 +CONFIG_DM_PCI=y
-+CONFIG_DM_PWM=y
 +CONFIG_AHCI=y
 +CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
 +CONFIG_SCSI=y
-+CONFIG_PWM_MTK=y
 +CONFIG_HUSH_PARSER=y
+ CONFIG_ENV_IS_IN_MMC=y
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 +CONFIG_SYS_MMC_ENV_DEV=0
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_MMC=y
  CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
- CONFIG_REGMAP=y
+ CONFIG_USE_IPADDR=y
- CONFIG_SYSCON=y
+ CONFIG_IPADDR="192.168.1.1"
- CONFIG_CLK=y
+ CONFIG_USE_SERVERIP=y
-+CONFIG_LZMA=y
+@@ -46,6 +122,11 @@ CONFIG_CLK=y
-+CONFIG_MEDIATEK_ETH=y
- # CONFIG_MMC_QUIRKS is not set
  CONFIG_SUPPORT_EMMC_BOOT=y
  CONFIG_MMC_HS400_SUPPORT=y
  CONFIG_MMC_MTK=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_MTK_TIMER=y
 +CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_PARTITION_UUIDS=y
 +CONFIG_PCI=y
 +CONFIG_PCIE_MEDIATEK=y
 +CONFIG_PHY=y
  CONFIG_PHY_FIXED=y
--CONFIG_MEDIATEK_ETH=y
+ CONFIG_MEDIATEK_ETH=y
  CONFIG_PINCTRL=y
- CONFIG_PINCONF=y
+@@ -55,9 +136,12 @@ CONFIG_POWER_DOMAIN=y
- CONFIG_PINCTRL_MT7623=y
+ CONFIG_MTK_POWER_DOMAIN=y
- CONFIG_POWER_DOMAIN=y
+ CONFIG_DM_SERIAL=y
--CONFIG_MTK_POWER_DOMAIN=y
+ CONFIG_MTK_SERIAL=y
--CONFIG_DM_SERIAL=y
--CONFIG_MTK_SERIAL=y
 +CONFIG_RANDOM_UUID=y
 +CONFIG_REGEX=y
  CONFIG_SYSRESET=y
  CONFIG_SYSRESET_WATCHDOG=y
  CONFIG_TIMER=y
--CONFIG_MTK_TIMER=y
+ CONFIG_MTK_TIMER=y
 +CONFIG_VERSION_VARIABLE=y
  CONFIG_WDT_MTK=y
--CONFIG_LZMA=y
+ CONFIG_LZMA=y
 --- /dev/null
 +++ b/unielec_u7623-02_env
 @@ -0,0 +1,47 @@

package/boot/uboot-mediatek/patches/402-update-bananapi-bpi-r64-device-tree.patch

@@ -51,7 +51,15 @@
  	reg_1p8v: regulator-1p8v {
  		compatible = "regulator-fixed";
  		regulator-name = "fixed-1.8V";
-@@ -197,7 +234,7 @@
+@@ -182,6 +219,7 @@
+ };
+ 
+ &uart0 {
++	mediatek,force-highspeed;
+ 	status = "okay";
+ };
+ 
+@@ -197,7 +235,7 @@
  	status = "okay";
  	bus-width = <8>;
  	max-frequency = <50000000>;
@@ -60,7 +68,7 @@
  	vmmc-supply = <&reg_3p3v>;
  	vqmmc-supply = <&reg_3p3v>;
  	non-removable;
-@@ -208,7 +245,7 @@
+@@ -208,7 +246,7 @@
  	pinctrl-0 = <&mmc1_pins_default>;
  	status = "okay";
  	bus-width = <4>;

package/boot/uboot-mediatek/patches/404-add-bananapi_bpi-r64_defconfigs.patch

@@ -1,6 +1,6 @@
 --- /dev/null
 +++ b/configs/mt7622_bananapi_bpi-r64-sdmmc_defconfig
-@@ -0,0 +1,160 @@
+@@ -0,0 +1,164 @@
 +CONFIG_ARM=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
@@ -161,6 +161,10 @@
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/bananapi_bpi-r64-sdmmc_env
 @@ -0,0 +1,82 @@
@@ -248,7 +252,7 @@
 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       $ver"
 --- /dev/null
 +++ b/configs/mt7622_bananapi_bpi-r64-emmc_defconfig
-@@ -0,0 +1,147 @@
+@@ -0,0 +1,151 @@
 +CONFIG_ARM=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
@@ -396,6 +400,10 @@
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/bananapi_bpi-r64-emmc_env
 @@ -0,0 +1,56 @@
@@ -457,7 +465,7 @@
 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       $ver"
 --- /dev/null
 +++ b/configs/mt7622_bananapi_bpi-r64-snand_defconfig
-@@ -0,0 +1,141 @@
+@@ -0,0 +1,145 @@
 +CONFIG_ARM=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
@@ -599,6 +607,10 @@
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.3"
 --- /dev/null
 +++ b/bananapi_bpi-r64-snand_env
 @@ -0,0 +1,57 @@

package/boot/uboot-mediatek/patches/406-dts-mt7623n-bpi-r2-uart0-force-highspeed.patch

@@ -0,0 +1,10 @@
+--- a/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts
++++ b/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts
+@@ -243,6 +243,7 @@
+ &uart0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&uart0_pins_a>;
++	mediatek,force-highspeed;
+ 	status = "okay";
+ };
+ 

package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch

@@ -1,6 +1,6 @@
 --- /dev/null
 +++ b/configs/mt7622_linksys_e8450_defconfig
-@@ -0,0 +1,137 @@
+@@ -0,0 +1,141 @@
 +CONFIG_ARM=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
@@ -133,6 +133,10 @@
 +CONFIG_HEXDUMP=y
 +CONFIG_RANDOM_UUID=y
 +CONFIG_REGEX=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_USB=y
 +CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
@@ -140,7 +144,7 @@
 +CONFIG_USB_STORAGE=y
 --- /dev/null
 +++ b/arch/arm/dts/mt7622-linksys-e8450-ubi.dts
-@@ -0,0 +1,193 @@
+@@ -0,0 +1,194 @@
 +// SPDX-License-Identifier: GPL-2.0
 +/*
 + * Copyright (c) 2019 MediaTek Inc.
@@ -303,6 +307,7 @@
 +};
 +
 +&uart0 {
++	mediatek,force-highspeed;
 +	status = "okay";
 +};
 +
@@ -336,7 +341,7 @@
 +};
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
-@@ -1263,6 +1263,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+@@ -1285,6 +1285,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
  	mt7622-rfb.dtb \
  	mt7623a-unielec-u7623-02-emmc.dtb \
  	mt7622-bananapi-bpi-r64.dtb \

package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch

@@ -1,6 +1,6 @@
 --- /dev/null
 +++ b/configs/mt7622_ubnt_unifi-6-lr_defconfig
-@@ -0,0 +1,143 @@
+@@ -0,0 +1,147 @@
 +CONFIG_ARM=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
@@ -144,9 +144,13 @@
 +CONFIG_SPI_FLASH_XMC=y
 +CONFIG_SPI_FLASH_USE_4K_SECTORS=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7622-ubnt-unifi-6-lr.dts
-@@ -0,0 +1,187 @@
+@@ -0,0 +1,188 @@
 +// SPDX-License-Identifier: GPL-2.0
 +/*
 + * Copyright (c) 2019 MediaTek Inc.
@@ -300,6 +304,7 @@
 +};
 +
 +&uart0 {
++	mediatek,force-highspeed;
 +	status = "okay";
 +};
 +
@@ -336,7 +341,7 @@
 +};
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
-@@ -1264,6 +1264,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+@@ -1286,6 +1286,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
  	mt7623a-unielec-u7623-02-emmc.dtb \
  	mt7622-bananapi-bpi-r64.dtb \
  	mt7622-linksys-e8450-ubi.dtb \

package/boot/uboot-mediatek/patches/420-add-support-for-RAVPower-RP-WD009.patch

@@ -125,7 +125,7 @@ Subject: [PATCH] add support for RAVPower RP-WD009
 +}
 --- /dev/null
 +++ b/configs/ravpower-rp-wd009-ram_defconfig
-@@ -0,0 +1,64 @@
+@@ -0,0 +1,68 @@
 +CONFIG_MIPS=y
 +CONFIG_SYS_LOAD_ADDR=0x80010000
 +CONFIG_NR_DRAM_BANKS=1
@@ -190,6 +190,10 @@ Subject: [PATCH] add support for RAVPower RP-WD009
 +CONFIG_BAUDRATE=57600
 +CONFIG_SYS_MAXARGS=64
 +CONFIG_SYS_CBSIZE=512
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/include/configs/ravpower-rp-wd009.h
 @@ -0,0 +1,40 @@

package/boot/uboot-mediatek/patches/430-add-bpi-r3.patch

@@ -1,6 +1,6 @@
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
-@@ -1271,6 +1271,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+@@ -1293,6 +1293,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
  	mt7981-snfi-nand-rfb.dtb \
  	mt7981-emmc-rfb.dtb \
  	mt7981-sd-rfb.dtb \
@@ -11,7 +11,7 @@
  	mt7986a-sd-rfb.dtb \
 --- /dev/null
 +++ b/configs/mt7986a_bpi-r3-emmc_defconfig
-@@ -0,0 +1,194 @@
+@@ -0,0 +1,198 @@
 +CONFIG_ARM=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
@@ -206,9 +206,13 @@
 +CONFIG_CMD_NAND=y
 +CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7986a_bpi-r3-nor_defconfig
-@@ -0,0 +1,193 @@
+@@ -0,0 +1,197 @@
 +CONFIG_ARM=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
@@ -402,9 +406,13 @@
 +CONFIG_CMD_MTD=y
 +CONFIG_CMD_SF=y
 +CONFIG_LMB_MAX_REGIONS=64
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7986a_bpi-r3-sd_defconfig
-@@ -0,0 +1,194 @@
+@@ -0,0 +1,198 @@
 +CONFIG_ARM=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
@@ -599,9 +607,13 @@
 +CONFIG_CMD_NAND=y
 +CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7986a_bpi-r3-snand_defconfig
-@@ -0,0 +1,195 @@
+@@ -0,0 +1,199 @@
 +CONFIG_ARM=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
@@ -797,6 +809,10 @@
 +CONFIG_CMD_NAND=y
 +CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7986a-bpi-r3-emmc.dts
 @@ -0,0 +1,33 @@
@@ -835,7 +851,7 @@
 +
 --- /dev/null
 +++ b/arch/arm/dts/mt7986a-bpi-r3-sd.dts
-@@ -0,0 +1,269 @@
+@@ -0,0 +1,270 @@
 +// SPDX-License-Identifier: GPL-2.0
 +/*
 + * Copyright (c) 2021 MediaTek Inc.
@@ -897,6 +913,7 @@
 +};
 +
 +&uart0 {
++	mediatek,force-highspeed;
 +	status = "okay";
 +};
 +

package/boot/uboot-mediatek/patches/431-add-xiaomi_redmi-ax6000.patch

@@ -1,6 +1,6 @@
 --- /dev/null
 +++ b/configs/mt7986_xiaomi_redmi-ax6000_defconfig
-@@ -0,0 +1,176 @@
+@@ -0,0 +1,180 @@
 +CONFIG_ARM=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
@@ -177,9 +177,13 @@
 +CONFIG_CMD_NAND=y
 +CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7986a-xiaomi_redmi-ax6000.dts
-@@ -0,0 +1,152 @@
+@@ -0,0 +1,153 @@
 +// SPDX-License-Identifier: GPL-2.0
 +/*
 + * Copyright (c) 2021 MediaTek Inc.
@@ -215,6 +219,7 @@
 +};
 +
 +&uart0 {
++	mediatek,force-highspeed;
 +	status = "okay";
 +};
 +

package/firmware/ipq-wifi/Makefile

@@ -6,9 +6,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware/qca-wireless.git
-PKG_SOURCE_DATE:=2023-03-27
+PKG_SOURCE_DATE:=2023-04-12
-PKG_SOURCE_VERSION:=ccd7e460cc798d90148a10539b6d94a5fd761004
+PKG_SOURCE_VERSION:=b22487d729362feaff7d06354353d005a3a9d6b7
-PKG_MIRROR_HASH:=e51d28c741aeb0867493a7bfc801b8b1977c942ed5d51d62c1aa8729c91cce32
+PKG_MIRROR_HASH:=94eea9db636b2cbf6782ec17d8b8fe36770c61ff283702ec418df1a1b09f54ef
 
 PKG_FLAGS:=nonshared
 

package/kernel/mac80211/patches/ath11k/0048-wifi-ath11k-fix-BUFFER_DONE-read-on-monitor-ring-rx-.patch

@@ -0,0 +1,130 @@
+From 68e93ac5a31d4975b25f819b2dfe914c72abc3bb Mon Sep 17 00:00:00 2001
+From: Harshitha Prem <quic_hprem@quicinc.com>
+Date: Wed, 15 Mar 2023 12:24:43 +0200
+Subject: [PATCH] wifi: ath11k: fix BUFFER_DONE read on monitor ring rx  buffer
+
+Perform dma_sync_single_for_cpu() on monitor ring rx buffer before
+reading BUFFER_DONE tag and do dma_unmap_single() only after device
+had set BUFFER_DONE tag to the buffer.
+
+Also when BUFFER_DONE tag is not set, allow the buffer to get read
+next time without freeing skb.
+
+This helps to fix AP+Monitor VAP with flood traffic scenario to see
+monitor ring rx buffer overrun missing BUFFER_DONE tag to be set.
+
+Also remove redundant rx dma buf free performed on DP
+rx_mon_status_refill_ring.
+
+Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+
+Signed-off-by: Sathishkumar Muruganandam <quic_murugana@quicinc.com>
+Signed-off-by: Harshitha Prem <quic_hprem@quicinc.com>
+Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+Link: https://lore.kernel.org/r/20230309164434.32660-1-quic_hprem@quicinc.com
+---
+ drivers/net/wireless/ath/ath11k/dp_rx.c | 57 ++++++++++---------------
+ 1 file changed, 23 insertions(+), 34 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
+@@ -435,7 +435,6 @@ fail_free_skb:
+ static int ath11k_dp_rxdma_buf_ring_free(struct ath11k *ar,
+ 					 struct dp_rxdma_ring *rx_ring)
+ {
+-	struct ath11k_pdev_dp *dp = &ar->dp;
+ 	struct sk_buff *skb;
+ 	int buf_id;
+ 
+@@ -453,28 +452,6 @@ static int ath11k_dp_rxdma_buf_ring_free
+ 	idr_destroy(&rx_ring->bufs_idr);
+ 	spin_unlock_bh(&rx_ring->idr_lock);
+ 
+-	/* if rxdma1_enable is false, mon_status_refill_ring
+-	 * isn't setup, so don't clean.
+-	 */
+-	if (!ar->ab->hw_params.rxdma1_enable)
+-		return 0;
+-
+-	rx_ring = &dp->rx_mon_status_refill_ring[0];
+-
+-	spin_lock_bh(&rx_ring->idr_lock);
+-	idr_for_each_entry(&rx_ring->bufs_idr, skb, buf_id) {
+-		idr_remove(&rx_ring->bufs_idr, buf_id);
+-		/* XXX: Understand where internal driver does this dma_unmap
+-		 * of rxdma_buffer.
+-		 */
+-		dma_unmap_single(ar->ab->dev, ATH11K_SKB_RXCB(skb)->paddr,
+-				 skb->len + skb_tailroom(skb), DMA_BIDIRECTIONAL);
+-		dev_kfree_skb_any(skb);
+-	}
+-
+-	idr_destroy(&rx_ring->bufs_idr);
+-	spin_unlock_bh(&rx_ring->idr_lock);
+-
+ 	return 0;
+ }
+ 
+@@ -3029,39 +3006,51 @@ static int ath11k_dp_rx_reap_mon_status_
+ 
+ 			spin_lock_bh(&rx_ring->idr_lock);
+ 			skb = idr_find(&rx_ring->bufs_idr, buf_id);
++			spin_unlock_bh(&rx_ring->idr_lock);
++
+ 			if (!skb) {
+ 				ath11k_warn(ab, "rx monitor status with invalid buf_id %d\n",
+ 					    buf_id);
+-				spin_unlock_bh(&rx_ring->idr_lock);
+ 				pmon->buf_state = DP_MON_STATUS_REPLINISH;
+ 				goto move_next;
+ 			}
+ 
+-			idr_remove(&rx_ring->bufs_idr, buf_id);
+-			spin_unlock_bh(&rx_ring->idr_lock);
+-
+ 			rxcb = ATH11K_SKB_RXCB(skb);
+ 
+-			dma_unmap_single(ab->dev, rxcb->paddr,
+-					 skb->len + skb_tailroom(skb),
+-					 DMA_FROM_DEVICE);
++			dma_sync_single_for_cpu(ab->dev, rxcb->paddr,
++						skb->len + skb_tailroom(skb),
++						DMA_FROM_DEVICE);
+ 
+ 			tlv = (struct hal_tlv_hdr *)skb->data;
+ 			if (FIELD_GET(HAL_TLV_HDR_TAG, tlv->tl) !=
+ 					HAL_RX_STATUS_BUFFER_DONE) {
+-				ath11k_warn(ab, "mon status DONE not set %lx\n",
++				ath11k_warn(ab, "mon status DONE not set %lx, buf_id %d\n",
+ 					    FIELD_GET(HAL_TLV_HDR_TAG,
+-						      tlv->tl));
+-				dev_kfree_skb_any(skb);
++						      tlv->tl), buf_id);
++				/* If done status is missing, hold onto status
++				 * ring until status is done for this status
++				 * ring buffer.
++				 * Keep HP in mon_status_ring unchanged,
++				 * and break from here.
++				 * Check status for same buffer for next time
++				 */
+ 				pmon->buf_state = DP_MON_STATUS_NO_DMA;
+-				goto move_next;
++				break;
+ 			}
+ 
++			spin_lock_bh(&rx_ring->idr_lock);
++			idr_remove(&rx_ring->bufs_idr, buf_id);
++			spin_unlock_bh(&rx_ring->idr_lock);
+ 			if (ab->hw_params.full_monitor_mode) {
+ 				ath11k_dp_rx_mon_update_status_buf_state(pmon, tlv);
+ 				if (paddr == pmon->mon_status_paddr)
+ 					pmon->buf_state = DP_MON_STATUS_MATCH;
+ 			}
++
++			dma_unmap_single(ab->dev, rxcb->paddr,
++					 skb->len + skb_tailroom(skb),
++					 DMA_FROM_DEVICE);
++
+ 			__skb_queue_tail(skb_list, skb);
+ 		} else {
+ 			pmon->buf_state = DP_MON_STATUS_REPLINISH;

package/kernel/mac80211/patches/ath11k/0049-wifi-ath11k-Optimize-6-GHz-scan-time.patch

@@ -0,0 +1,101 @@
+From 8b4d2f080afbd4280ecca0f4b3ceea943a7a86d0 Mon Sep 17 00:00:00 2001
+From: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
+Date: Thu, 23 Mar 2023 11:39:13 +0530
+Subject: [PATCH] wifi: ath11k: Optimize 6 GHz scan time
+
+Currently, time taken to scan all supported channels on WCN6750
+is ~8 seconds and connection time is almost 10 seconds. WCN6750
+supports three Wi-Fi bands (i.e., 2.4/5/6 GHz) and the numbers of
+channels for scan come around ~100 channels (default case).
+Since the chip doesn't have support for DBS (Dual Band Simultaneous),
+scans cannot be parallelized resulting in longer scan times.
+
+Among the 100 odd channels, ~60 channels are in 6 GHz band. Therefore,
+optimizing the scan for 6 GHz channels will bring down the overall
+scan time.
+
+WCN6750 firmware has support to scan a 6 GHz channel based on co-located
+AP information i.e., RNR IE which is found in the legacy 2.4/5 GHz scan
+results. When a scan request with all supported channel list is enqueued
+to the firmware, then based on WMI_SCAN_CHAN_FLAG_SCAN_ONLY_IF_RNR_FOUND
+scan channel flag, firmware will scan only those 6 GHz channels for which
+RNR IEs are found in the legacy scan results.
+
+In the proposed design, based on NL80211_SCAN_FLAG_COLOCATED_6GHZ scan
+flag, driver will set the WMI_SCAN_CHAN_FLAG_SCAN_ONLY_IF_RNR_FOUND flag
+for non-PSC channels. Since there is high probability to find 6 GHz APs
+on PSC channels, these channels are always scanned. Only non-PSC channels
+are selectively scanned based on cached RNR information from the legacy
+scan results.
+
+If NL80211_SCAN_FLAG_COLOCATED_6GHZ is not set in the scan flags,
+then scan will happen on all supported channels (default behavior).
+
+With these optimizations, scan time is improved by 1.5-1.8 seconds on
+WCN6750. Similar savings have been observed on WCN6855.
+
+Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
+Tested-on: WCN6855 hw2.1 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.16
+
+Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
+Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+Link: https://lore.kernel.org/r/20230323060913.10097-1-quic_mpubbise@quicinc.com
+---
+ drivers/net/wireless/ath/ath11k/mac.c | 25 +++++++++++++++++++++++--
+ drivers/net/wireless/ath/ath11k/wmi.h |  4 ++++
+ 2 files changed, 27 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath11k/mac.c
++++ b/drivers/net/wireless/ath/ath11k/mac.c
+@@ -3819,8 +3819,29 @@ static int ath11k_mac_op_hw_scan(struct
+ 			goto exit;
+ 		}
+ 
+-		for (i = 0; i < arg->num_chan; i++)
+-			arg->chan_list[i] = req->channels[i]->center_freq;
++		for (i = 0; i < arg->num_chan; i++) {
++			if (test_bit(WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL,
++				     ar->ab->wmi_ab.svc_map)) {
++				arg->chan_list[i] =
++					u32_encode_bits(req->channels[i]->center_freq,
++							WMI_SCAN_CONFIG_PER_CHANNEL_MASK);
++
++				/* If NL80211_SCAN_FLAG_COLOCATED_6GHZ is set in scan
++				 * flags, then scan all PSC channels in 6 GHz band and
++				 * those non-PSC channels where RNR IE is found during
++				 * the legacy 2.4/5 GHz scan.
++				 * If NL80211_SCAN_FLAG_COLOCATED_6GHZ is not set,
++				 * then all channels in 6 GHz will be scanned.
++				 */
++				if (req->channels[i]->band == NL80211_BAND_6GHZ &&
++				    req->flags & NL80211_SCAN_FLAG_COLOCATED_6GHZ &&
++				    !cfg80211_channel_is_psc(req->channels[i]))
++					arg->chan_list[i] |=
++						WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND;
++			} else {
++				arg->chan_list[i] = req->channels[i]->center_freq;
++			}
++		}
+ 	}
+ 
+ 	if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
+--- a/drivers/net/wireless/ath/ath11k/wmi.h
++++ b/drivers/net/wireless/ath/ath11k/wmi.h
+@@ -2100,6 +2100,7 @@ enum wmi_tlv_service {
+ 
+ 	/* The second 128 bits */
+ 	WMI_MAX_EXT_SERVICE = 256,
++	WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265,
+ 	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
+ 	WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
+ 
+@@ -3249,6 +3250,9 @@ struct  wmi_start_scan_cmd {
+ #define WMI_SCAN_DWELL_MODE_SHIFT        21
+ #define WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE   0x00000800
+ 
++#define WMI_SCAN_CONFIG_PER_CHANNEL_MASK	GENMASK(19, 0)
++#define WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND	BIT(20)
++
+ enum {
+ 	WMI_SCAN_DWELL_MODE_DEFAULT      = 0,
+ 	WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,

package/kernel/mac80211/patches/ath11k/0050-wifi-ath11k-Configure-the-FTM-responder-role-using-f.patch

@@ -0,0 +1,117 @@
+From 813968c24126cc5c8320cd5db0e262069a535063 Mon Sep 17 00:00:00 2001
+From: Ganesh Babu Jothiram <quic_gjothira@quicinc.com>
+Date: Fri, 24 Mar 2023 16:57:00 +0200
+Subject: [PATCH] wifi: ath11k: Configure the FTM responder role using firmware
+ capability flag
+
+Fine Time Measurement(FTM) is offloaded feature to firmware.
+Hence, the configuration of FTM responder role is done using
+firmware capability flag instead of hw param.
+
+Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+
+Signed-off-by: Ganesh Babu Jothiram <quic_gjothira@quicinc.com>
+Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+Link: https://lore.kernel.org/r/20230317072034.8217-1-quic_gjothira@quicinc.com
+---
+ drivers/net/wireless/ath/ath11k/core.c | 8 --------
+ drivers/net/wireless/ath/ath11k/hw.h   | 1 -
+ drivers/net/wireless/ath/ath11k/mac.c  | 4 ++--
+ 3 files changed, 2 insertions(+), 11 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath11k/core.c
++++ b/drivers/net/wireless/ath/ath11k/core.c
+@@ -116,7 +116,6 @@ static const struct ath11k_hw_params ath
+ 		.tcl_ring_retry = true,
+ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+ 		.smp2p_wow_exit = false,
+-		.ftm_responder = true,
+ 	},
+ 	{
+ 		.hw_rev = ATH11K_HW_IPQ6018_HW10,
+@@ -199,7 +198,6 @@ static const struct ath11k_hw_params ath
+ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+ 		.smp2p_wow_exit = false,
+ 		.support_fw_mac_sequence = false,
+-		.ftm_responder = true,
+ 	},
+ 	{
+ 		.name = "qca6390 hw2.0",
+@@ -284,7 +282,6 @@ static const struct ath11k_hw_params ath
+ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+ 		.smp2p_wow_exit = false,
+ 		.support_fw_mac_sequence = true,
+-		.ftm_responder = false,
+ 	},
+ 	{
+ 		.name = "qcn9074 hw1.0",
+@@ -366,7 +363,6 @@ static const struct ath11k_hw_params ath
+ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+ 		.smp2p_wow_exit = false,
+ 		.support_fw_mac_sequence = false,
+-		.ftm_responder = true,
+ 	},
+ 	{
+ 		.name = "wcn6855 hw2.0",
+@@ -451,7 +447,6 @@ static const struct ath11k_hw_params ath
+ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+ 		.smp2p_wow_exit = false,
+ 		.support_fw_mac_sequence = true,
+-		.ftm_responder = false,
+ 	},
+ 	{
+ 		.name = "wcn6855 hw2.1",
+@@ -534,7 +529,6 @@ static const struct ath11k_hw_params ath
+ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+ 		.smp2p_wow_exit = false,
+ 		.support_fw_mac_sequence = true,
+-		.ftm_responder = false,
+ 	},
+ 	{
+ 		.name = "wcn6750 hw1.0",
+@@ -615,7 +609,6 @@ static const struct ath11k_hw_params ath
+ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
+ 		.smp2p_wow_exit = true,
+ 		.support_fw_mac_sequence = true,
+-		.ftm_responder = false,
+ 	},
+ 	{
+ 		.hw_rev = ATH11K_HW_IPQ5018_HW10,
+@@ -695,7 +688,6 @@ static const struct ath11k_hw_params ath
+ 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,
+ 		.smp2p_wow_exit = false,
+ 		.support_fw_mac_sequence = false,
+-		.ftm_responder = true,
+ 	},
+ };
+ 
+--- a/drivers/net/wireless/ath/ath11k/hw.h
++++ b/drivers/net/wireless/ath/ath11k/hw.h
+@@ -224,7 +224,6 @@ struct ath11k_hw_params {
+ 	u32 tx_ring_size;
+ 	bool smp2p_wow_exit;
+ 	bool support_fw_mac_sequence;
+-	bool ftm_responder;
+ };
+ 
+ struct ath11k_hw_ops {
+--- a/drivers/net/wireless/ath/ath11k/mac.c
++++ b/drivers/net/wireless/ath/ath11k/mac.c
+@@ -3538,7 +3538,7 @@ static void ath11k_mac_op_bss_info_chang
+ 
+ 	if (changed & BSS_CHANGED_FTM_RESPONDER &&
+ 	    arvif->ftm_responder != info->ftm_responder &&
+-	    ar->ab->hw_params.ftm_responder &&
++	    test_bit(WMI_TLV_SERVICE_RTT, ar->ab->wmi_ab.svc_map) &&
+ 	    (vif->type == NL80211_IFTYPE_AP ||
+ 	     vif->type == NL80211_IFTYPE_MESH_POINT)) {
+ 		arvif->ftm_responder = info->ftm_responder;
+@@ -9234,7 +9234,7 @@ static int __ath11k_mac_register(struct
+ 	wiphy_ext_feature_set(ar->hw->wiphy,
+ 			      NL80211_EXT_FEATURE_SET_SCAN_DWELL);
+ 
+-	if (ab->hw_params.ftm_responder)
++	if (test_bit(WMI_TLV_SERVICE_RTT, ar->ab->wmi_ab.svc_map))
+ 		wiphy_ext_feature_set(ar->hw->wiphy,
+ 				      NL80211_EXT_FEATURE_ENABLE_FTM_RESPONDER);
+ 

package/kernel/mac80211/patches/ath11k/0051-wifi-ath11k-fix-rssi-station-dump-not-updated-in-QCN.patch

@@ -0,0 +1,158 @@
+From 031ffa6c2cd305a57ccc6d610f2decd956b2e7f6 Mon Sep 17 00:00:00 2001
+From: P Praneesh <quic_ppranees@quicinc.com>
+Date: Fri, 24 Mar 2023 16:57:00 +0200
+Subject: [PATCH] wifi: ath11k: fix rssi station dump not updated in QCN9074
+
+In QCN9074, station dump signal values display default value which
+is -95 dbm, since there is firmware header change for HAL_RX_MPDU_START
+between QCN9074 and IPQ8074 which cause wrong peer_id fetch from msdu.
+Fix this by updating hal_rx_mpdu_info with corresponding QCN9074 tlv
+format.
+
+Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01695-QCAHKSWPL_SILICONZ-1
+
+Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
+Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+Link: https://lore.kernel.org/r/20230320110312.20639-1-quic_ppranees@quicinc.com
+---
+ drivers/net/wireless/ath/ath11k/hal_rx.c | 10 ++++++++-
+ drivers/net/wireless/ath/ath11k/hal_rx.h | 18 +++++++++++++++-
+ drivers/net/wireless/ath/ath11k/hw.c     | 27 ++++++++++++++++--------
+ drivers/net/wireless/ath/ath11k/hw.h     |  2 +-
+ 4 files changed, 45 insertions(+), 12 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath11k/hal_rx.c
++++ b/drivers/net/wireless/ath/ath11k/hal_rx.c
+@@ -865,6 +865,12 @@ ath11k_hal_rx_populate_mu_user_info(void
+ 	ath11k_hal_rx_populate_byte_count(rx_tlv, ppdu_info, rx_user_status);
+ }
+ 
++static u16 ath11k_hal_rx_mpduinfo_get_peerid(struct ath11k_base *ab,
++					     struct hal_rx_mpdu_info *mpdu_info)
++{
++	return ab->hw_params.hw_ops->mpdu_info_get_peerid(mpdu_info);
++}
++
+ static enum hal_rx_mon_status
+ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab,
+ 				   struct hal_rx_mon_ppdu_info *ppdu_info,
+@@ -1459,9 +1465,11 @@ ath11k_hal_rx_parse_mon_status_tlv(struc
+ 		break;
+ 	}
+ 	case HAL_RX_MPDU_START: {
++		struct hal_rx_mpdu_info *mpdu_info =
++				(struct hal_rx_mpdu_info *)tlv_data;
+ 		u16 peer_id;
+ 
+-		peer_id = ab->hw_params.hw_ops->mpdu_info_get_peerid(tlv_data);
++		peer_id = ath11k_hal_rx_mpduinfo_get_peerid(ab, mpdu_info);
+ 		if (peer_id)
+ 			ppdu_info->peer_id = peer_id;
+ 		break;
+--- a/drivers/net/wireless/ath/ath11k/hal_rx.h
++++ b/drivers/net/wireless/ath/ath11k/hal_rx.h
+@@ -405,7 +405,7 @@ struct hal_rx_phyrx_rssi_legacy_info {
+ #define HAL_RX_MPDU_INFO_INFO0_PEERID_WCN6855	GENMASK(15, 0)
+ #define HAL_RX_MPDU_INFO_INFO1_MPDU_LEN		GENMASK(13, 0)
+ 
+-struct hal_rx_mpdu_info {
++struct hal_rx_mpdu_info_ipq8074 {
+ 	__le32 rsvd0;
+ 	__le32 info0;
+ 	__le32 rsvd1[11];
+@@ -413,12 +413,28 @@ struct hal_rx_mpdu_info {
+ 	__le32 rsvd2[9];
+ } __packed;
+ 
++struct hal_rx_mpdu_info_qcn9074 {
++	__le32 rsvd0[10];
++	__le32 info0;
++	__le32 rsvd1[2];
++	__le32 info1;
++	__le32 rsvd2[9];
++} __packed;
++
+ struct hal_rx_mpdu_info_wcn6855 {
+ 	__le32 rsvd0[8];
+ 	__le32 info0;
+ 	__le32 rsvd1[14];
+ } __packed;
+ 
++struct hal_rx_mpdu_info {
++	union {
++		struct hal_rx_mpdu_info_ipq8074 ipq8074;
++		struct hal_rx_mpdu_info_qcn9074 qcn9074;
++		struct hal_rx_mpdu_info_wcn6855 wcn6855;
++	} u;
++} __packed;
++
+ #define HAL_RX_PPDU_END_DURATION	GENMASK(23, 0)
+ struct hal_rx_ppdu_end_duration {
+ 	__le32 rsvd0[9];
+--- a/drivers/net/wireless/ath/ath11k/hw.c
++++ b/drivers/net/wireless/ath/ath11k/hw.c
+@@ -835,26 +835,35 @@ static void ath11k_hw_ipq5018_reo_setup(
+ 			   ring_hash_map);
+ }
+ 
+-static u16 ath11k_hw_ipq8074_mpdu_info_get_peerid(u8 *tlv_data)
++static u16
++ath11k_hw_ipq8074_mpdu_info_get_peerid(struct hal_rx_mpdu_info *mpdu_info)
+ {
+ 	u16 peer_id = 0;
+-	struct hal_rx_mpdu_info *mpdu_info =
+-		(struct hal_rx_mpdu_info *)tlv_data;
+ 
+ 	peer_id = FIELD_GET(HAL_RX_MPDU_INFO_INFO0_PEERID,
+-			    __le32_to_cpu(mpdu_info->info0));
++			    __le32_to_cpu(mpdu_info->u.ipq8074.info0));
+ 
+ 	return peer_id;
+ }
+ 
+-static u16 ath11k_hw_wcn6855_mpdu_info_get_peerid(u8 *tlv_data)
++static u16
++ath11k_hw_qcn9074_mpdu_info_get_peerid(struct hal_rx_mpdu_info *mpdu_info)
++{
++	u16 peer_id = 0;
++
++	peer_id = FIELD_GET(HAL_RX_MPDU_INFO_INFO0_PEERID,
++			    __le32_to_cpu(mpdu_info->u.qcn9074.info0));
++
++	return peer_id;
++}
++
++static u16
++ath11k_hw_wcn6855_mpdu_info_get_peerid(struct hal_rx_mpdu_info *mpdu_info)
+ {
+ 	u16 peer_id = 0;
+-	struct hal_rx_mpdu_info_wcn6855 *mpdu_info =
+-		(struct hal_rx_mpdu_info_wcn6855 *)tlv_data;
+ 
+ 	peer_id = FIELD_GET(HAL_RX_MPDU_INFO_INFO0_PEERID_WCN6855,
+-			    __le32_to_cpu(mpdu_info->info0));
++			    __le32_to_cpu(mpdu_info->u.wcn6855.info0));
+ 	return peer_id;
+ }
+ 
+@@ -1042,7 +1051,7 @@ const struct ath11k_hw_ops qcn9074_ops =
+ 	.rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
+ 	.rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
+ 	.reo_setup = ath11k_hw_ipq8074_reo_setup,
+-	.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
++	.mpdu_info_get_peerid = ath11k_hw_qcn9074_mpdu_info_get_peerid,
+ 	.rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
+ 	.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2,
+ 	.get_ring_selector = ath11k_hw_ipq8074_get_tcl_ring_selector,
+--- a/drivers/net/wireless/ath/ath11k/hw.h
++++ b/drivers/net/wireless/ath/ath11k/hw.h
+@@ -263,7 +263,7 @@ struct ath11k_hw_ops {
+ 	struct rx_attention *(*rx_desc_get_attention)(struct hal_rx_desc *desc);
+ 	u8 *(*rx_desc_get_msdu_payload)(struct hal_rx_desc *desc);
+ 	void (*reo_setup)(struct ath11k_base *ab);
+-	u16 (*mpdu_info_get_peerid)(u8 *tlv_data);
++	u16 (*mpdu_info_get_peerid)(struct hal_rx_mpdu_info *mpdu_info);
+ 	bool (*rx_desc_mac_addr2_valid)(struct hal_rx_desc *desc);
+ 	u8* (*rx_desc_mpdu_start_addr2)(struct hal_rx_desc *desc);
+ 	u32 (*get_ring_selector)(struct sk_buff *skb);

package/kernel/mac80211/patches/ath11k/0052-wifi-ath11k-Fix-invalid-management-rx-frame-length-i.patch

@@ -0,0 +1,115 @@
+From 447b0398a9cd41ca343dfd43e555af92d6214487 Mon Sep 17 00:00:00 2001
+From: Bhagavathi Perumal S <quic_bperumal@quicinc.com>
+Date: Fri, 24 Mar 2023 16:57:00 +0200
+Subject: [PATCH] wifi: ath11k: Fix invalid management rx frame length issue
+
+The WMI management rx event has multiple arrays of TLVs, however the common
+WMI TLV parser won't handle multiple TLV tags of same type.
+So the multiple array tags of WMI management rx TLV is parsed incorrectly
+and the length calculated becomes wrong when the target sends multiple
+array tags.
+
+Add separate TLV parser to handle multiple arrays for WMI management rx
+TLV. This fixes invalid length issue when the target sends multiple array
+tags.
+
+Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
+
+Signed-off-by: Bhagavathi Perumal S <quic_bperumal@quicinc.com>
+Co-developed-by: Nagarajan Maran <quic_nmaran@quicinc.com>
+Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
+Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+Link: https://lore.kernel.org/r/20230320133840.30162-1-quic_nmaran@quicinc.com
+---
+ drivers/net/wireless/ath/ath11k/wmi.c | 45 +++++++++++++++++++++------
+ 1 file changed, 35 insertions(+), 10 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath11k/wmi.c
++++ b/drivers/net/wireless/ath/ath11k/wmi.c
+@@ -82,6 +82,12 @@ struct wmi_tlv_fw_stats_parse {
+ 	bool chain_rssi_done;
+ };
+ 
++struct wmi_tlv_mgmt_rx_parse {
++	const struct wmi_mgmt_rx_hdr *fixed;
++	const u8 *frame_buf;
++	bool frame_buf_done;
++};
++
+ static const struct wmi_tlv_policy wmi_tlv_policies[] = {
+ 	[WMI_TAG_ARRAY_BYTE]
+ 		= { .min_len = 0 },
+@@ -5633,28 +5639,49 @@ static int ath11k_pull_vdev_stopped_para
+ 	return 0;
+ }
+ 
++static int ath11k_wmi_tlv_mgmt_rx_parse(struct ath11k_base *ab,
++					u16 tag, u16 len,
++					const void *ptr, void *data)
++{
++	struct wmi_tlv_mgmt_rx_parse *parse = data;
++
++	switch (tag) {
++	case WMI_TAG_MGMT_RX_HDR:
++		parse->fixed = ptr;
++		break;
++	case WMI_TAG_ARRAY_BYTE:
++		if (!parse->frame_buf_done) {
++			parse->frame_buf = ptr;
++			parse->frame_buf_done = true;
++		}
++		break;
++	}
++	return 0;
++}
++
+ static int ath11k_pull_mgmt_rx_params_tlv(struct ath11k_base *ab,
+ 					  struct sk_buff *skb,
+ 					  struct mgmt_rx_event_params *hdr)
+ {
+-	const void **tb;
++	struct wmi_tlv_mgmt_rx_parse parse = { };
+ 	const struct wmi_mgmt_rx_hdr *ev;
+ 	const u8 *frame;
+ 	int ret;
+ 
+-	tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
+-	if (IS_ERR(tb)) {
+-		ret = PTR_ERR(tb);
+-		ath11k_warn(ab, "failed to parse tlv: %d\n", ret);
++	ret = ath11k_wmi_tlv_iter(ab, skb->data, skb->len,
++				  ath11k_wmi_tlv_mgmt_rx_parse,
++				  &parse);
++	if (ret) {
++		ath11k_warn(ab, "failed to parse mgmt rx tlv %d\n",
++			    ret);
+ 		return ret;
+ 	}
+ 
+-	ev = tb[WMI_TAG_MGMT_RX_HDR];
+-	frame = tb[WMI_TAG_ARRAY_BYTE];
++	ev = parse.fixed;
++	frame = parse.frame_buf;
+ 
+ 	if (!ev || !frame) {
+ 		ath11k_warn(ab, "failed to fetch mgmt rx hdr");
+-		kfree(tb);
+ 		return -EPROTO;
+ 	}
+ 
+@@ -5673,7 +5700,6 @@ static int ath11k_pull_mgmt_rx_params_tl
+ 
+ 	if (skb->len < (frame - skb->data) + hdr->buf_len) {
+ 		ath11k_warn(ab, "invalid length in mgmt rx hdr ev");
+-		kfree(tb);
+ 		return -EPROTO;
+ 	}
+ 
+@@ -5685,7 +5711,6 @@ static int ath11k_pull_mgmt_rx_params_tl
+ 
+ 	ath11k_ce_byte_swap(skb->data, hdr->buf_len);
+ 
+-	kfree(tb);
+ 	return 0;
+ }
+ 

package/kernel/mac80211/patches/ath11k/0053-wifi-ath11k-fix-writing-to-unintended-memory-region.patch

@@ -0,0 +1,43 @@
+From 756a7f90878f0866fd2fe167ef37e90b47326b96 Mon Sep 17 00:00:00 2001
+From: P Praneesh <quic_ppranees@quicinc.com>
+Date: Fri, 24 Mar 2023 16:57:01 +0200
+Subject: [PATCH] wifi: ath11k: fix writing to unintended memory region
+
+While initializing spectral, the magic value is getting written to the
+invalid memory address leading to random boot-up crash. This occurs
+due to the incorrect index increment in ath11k_dbring_fill_magic_value
+function. Fix it by replacing the existing logic with memset32 to ensure
+there is no invalid memory access.
+
+Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1-01838-QCAHKSWPL_SILICONZ-1
+
+Fixes: d3d358efc553 ("ath11k: add spectral/CFR buffer validation support")
+Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
+Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+Link: https://lore.kernel.org/r/20230321052900.16895-1-quic_ppranees@quicinc.com
+---
+ drivers/net/wireless/ath/ath11k/dbring.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath11k/dbring.c
++++ b/drivers/net/wireless/ath/ath11k/dbring.c
+@@ -26,13 +26,13 @@ int ath11k_dbring_validate_buffer(struct
+ static void ath11k_dbring_fill_magic_value(struct ath11k *ar,
+ 					   void *buffer, u32 size)
+ {
+-	u32 *temp;
+-	int idx;
++	/* memset32 function fills buffer payload with the ATH11K_DB_MAGIC_VALUE
++	 * and the variable size is expected to be the number of u32 values
++	 * to be stored, not the number of bytes.
++	 */
++	size = size / sizeof(u32);
+ 
+-	size = size >> 2;
+-
+-	for (idx = 0, temp = buffer; idx < size; idx++, temp++)
+-		*temp++ = ATH11K_DB_MAGIC_VALUE;
++	memset32(buffer, ATH11K_DB_MAGIC_VALUE, size);
+ }
+ 
+ static int ath11k_dbring_bufs_replenish(struct ath11k *ar,

package/kernel/mac80211/patches/ath11k/0054-wifi-ath11k-Send-11d-scan-start-before-WMI_START_SCA.patch

@@ -0,0 +1,61 @@
+From e89a51aedf380bc60219dc9afa96c36507060fb3 Mon Sep 17 00:00:00 2001
+From: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
+Date: Wed, 15 Mar 2023 21:48:17 +0530
+Subject: [PATCH] wifi: ath11k: Send 11d scan start before WMI_START_SCAN_CMDID
+
+Firmwares advertising the support of triggering 11d algorithm on the
+scan results of a regular scan expects driver to send
+WMI_11D_SCAN_START_CMDID before sending WMI_START_SCAN_CMDID.
+Triggering 11d algorithm on the scan results of a normal scan helps
+in completely avoiding a separate 11d scan for determining regdomain.
+This indirectly helps in speeding up connections on station
+interfaces on the chipsets supporting 11D scan.
+
+To enable this feature, send WMI_11D_SCAN_START_CMDID just before
+sending WMI_START_SCAN_CMDID if the firmware advertises
+WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN service flag.
+
+WCN6750 & WCN6855 supports this feature.
+
+Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-01160-QCAMSLSWPLZ-1
+Tested-on: WCN6855 hw2.1 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.23
+
+Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
+Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+Link: https://lore.kernel.org/r/20230315161817.29627-1-quic_mpubbise@quicinc.com
+---
+ drivers/net/wireless/ath/ath11k/mac.c | 12 ++++++++++++
+ drivers/net/wireless/ath/ath11k/wmi.h |  1 +
+ 2 files changed, 13 insertions(+)
+
+--- a/drivers/net/wireless/ath/ath11k/mac.c
++++ b/drivers/net/wireless/ath/ath11k/mac.c
+@@ -3755,6 +3755,18 @@ static int ath11k_mac_op_hw_scan(struct
+ 	int i;
+ 	u32 scan_timeout;
+ 
++	/* Firmwares advertising the support of triggering 11D algorithm
++	 * on the scan results of a regular scan expects driver to send
++	 * WMI_11D_SCAN_START_CMDID before sending WMI_START_SCAN_CMDID.
++	 * With this feature, separate 11D scan can be avoided since
++	 * regdomain can be determined with the scan results of the
++	 * regular scan.
++	 */
++	if (ar->state_11d == ATH11K_11D_PREPARING &&
++	    test_bit(WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN,
++		     ar->ab->wmi_ab.svc_map))
++		ath11k_mac_11d_scan_start(ar, arvif->vdev_id);
++
+ 	mutex_lock(&ar->conf_mutex);
+ 
+ 	spin_lock_bh(&ar->data_lock);
+--- a/drivers/net/wireless/ath/ath11k/wmi.h
++++ b/drivers/net/wireless/ath/ath11k/wmi.h
+@@ -2103,6 +2103,7 @@ enum wmi_tlv_service {
+ 	WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265,
+ 	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
+ 	WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
++	WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN = 357,
+ 
+ 	/* The third 128 bits */
+ 	WMI_MAX_EXT2_SERVICE = 384

package/kernel/mac80211/patches/ath11k/101-Fix-invalid-management-rx-frame-length-issue.patch

@@ -1,202 +0,0 @@
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-From: Nagarajan Maran <quic_nmaran@quicinc.com>
-To: <ath11k@lists.infradead.org>
-CC: <linux-wireless@vger.kernel.org>,
-        Bhagavathi Perumal S <quic_bperumal@quicinc.com>,
-        Nagarajan Maran <quic_nmaran@quicinc.com>
-Subject: [PATCH] wifi: ath11k: Fix invalid management rx frame length issue
-Date: Mon, 20 Mar 2023 19:08:40 +0530
-Message-ID: <20230320133840.30162-1-quic_nmaran@quicinc.com>
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-
-From: Bhagavathi Perumal S <quic_bperumal@quicinc.com>
-
-The WMI management rx event has multiple arrays of TLVs, however the common
-WMI TLV parser won't handle multiple TLV tags of same type.
-So the multiple array tags of WMI management rx TLV is parsed incorrectly
-and the length calculated becomes wrong when the target sends multiple
-array tags.
-
-Add separate TLV parser to handle multiple arrays for WMI management rx
-TLV. This fixes invalid length issue when the target sends multiple array
-tags.
-
-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
-
-Signed-off-by: Bhagavathi Perumal S <quic_bperumal@quicinc.com>
-Co-developed-by: Nagarajan Maran <quic_nmaran@quicinc.com>
-Signed-off-by: Nagarajan Maran <quic_nmaran@quicinc.com>
----
- drivers/net/wireless/ath/ath11k/wmi.c | 45 +++++++++++++++++++++------
- 1 file changed, 35 insertions(+), 10 deletions(-)
-
-
-base-commit: 3df3715e556027e94246b2cb30986563362a65f4
-
---- a/drivers/net/wireless/ath/ath11k/wmi.c
-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
-@@ -82,6 +82,12 @@ struct wmi_tlv_fw_stats_parse {
- 	bool chain_rssi_done;
- };
- 
-+struct wmi_tlv_mgmt_rx_parse {
-+	const struct wmi_mgmt_rx_hdr *fixed;
-+	const u8 *frame_buf;
-+	bool frame_buf_done;
-+};
-+
- static const struct wmi_tlv_policy wmi_tlv_policies[] = {
- 	[WMI_TAG_ARRAY_BYTE]
- 		= { .min_len = 0 },
-@@ -5633,28 +5639,49 @@ static int ath11k_pull_vdev_stopped_para
- 	return 0;
- }
- 
-+static int ath11k_wmi_tlv_mgmt_rx_parse(struct ath11k_base *ab,
-+					u16 tag, u16 len,
-+					const void *ptr, void *data)
-+{
-+	struct wmi_tlv_mgmt_rx_parse *parse = data;
-+
-+	switch (tag) {
-+	case WMI_TAG_MGMT_RX_HDR:
-+		parse->fixed = ptr;
-+		break;
-+	case WMI_TAG_ARRAY_BYTE:
-+		if (!parse->frame_buf_done) {
-+			parse->frame_buf = ptr;
-+			parse->frame_buf_done = true;
-+		}
-+		break;
-+	}
-+	return 0;
-+}
-+
- static int ath11k_pull_mgmt_rx_params_tlv(struct ath11k_base *ab,
- 					  struct sk_buff *skb,
- 					  struct mgmt_rx_event_params *hdr)
- {
--	const void **tb;
-+	struct wmi_tlv_mgmt_rx_parse parse = { };
- 	const struct wmi_mgmt_rx_hdr *ev;
- 	const u8 *frame;
- 	int ret;
- 
--	tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
--	if (IS_ERR(tb)) {
--		ret = PTR_ERR(tb);
--		ath11k_warn(ab, "failed to parse tlv: %d\n", ret);
-+	ret = ath11k_wmi_tlv_iter(ab, skb->data, skb->len,
-+				  ath11k_wmi_tlv_mgmt_rx_parse,
-+				  &parse);
-+	if (ret) {
-+		ath11k_warn(ab, "failed to parse mgmt rx tlv %d\n",
-+			    ret);
- 		return ret;
- 	}
- 
--	ev = tb[WMI_TAG_MGMT_RX_HDR];
--	frame = tb[WMI_TAG_ARRAY_BYTE];
-+	ev = parse.fixed;
-+	frame = parse.frame_buf;
- 
- 	if (!ev || !frame) {
- 		ath11k_warn(ab, "failed to fetch mgmt rx hdr");
--		kfree(tb);
- 		return -EPROTO;
- 	}
- 
-@@ -5673,7 +5700,6 @@ static int ath11k_pull_mgmt_rx_params_tl
- 
- 	if (skb->len < (frame - skb->data) + hdr->buf_len) {
- 		ath11k_warn(ab, "invalid length in mgmt rx hdr ev");
--		kfree(tb);
- 		return -EPROTO;
- 	}
- 
-@@ -5685,7 +5711,6 @@ static int ath11k_pull_mgmt_rx_params_tl
- 
- 	ath11k_ce_byte_swap(skb->data, hdr->buf_len);
- 
--	kfree(tb);
- 	return 0;
- }
- 

package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch

@@ -31,7 +31,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  	{
  		.hw_rev = ATH11K_HW_IPQ8074,
  		.name = "ipq8074 hw2.0",
-@@ -1919,7 +1919,8 @@ static void ath11k_core_reset(struct wor
+@@ -1911,7 +1911,8 @@ static void ath11k_core_reset(struct wor
  static int ath11k_init_hw_params(struct ath11k_base *ab)
  {
  	const struct ath11k_hw_params *hw_params = NULL;
@@ -41,7 +41,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  
  	for (i = 0; i < ARRAY_SIZE(ath11k_hw_params); i++) {
  		hw_params = &ath11k_hw_params[i];
-@@ -1935,7 +1936,30 @@ static int ath11k_init_hw_params(struct
+@@ -1927,7 +1928,30 @@ static int ath11k_init_hw_params(struct
  
  	ab->hw_params = *hw_params;
  

package/kernel/mac80211/patches/ath11k/904-wifi-ath11k-restore-160MHz-support.patch

@@ -16,7 +16,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
 
 --- a/drivers/net/wireless/ath/ath11k/mac.c
 +++ b/drivers/net/wireless/ath/ath11k/mac.c
-@@ -5552,10 +5552,6 @@ static int ath11k_mac_copy_he_cap(struct
+@@ -5585,10 +5585,6 @@ static int ath11k_mac_copy_he_cap(struct
  
  		he_cap_elem->mac_cap_info[1] &=
  			IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_MASK;

package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch

@@ -0,0 +1,317 @@
+From abdd0985a36189ef2cc0e393b027276e86137ace Mon Sep 17 00:00:00 2001
+From: Aditya Kumar Singh <quic_adisi@quicinc.com>
+Date: Tue, 11 Apr 2023 20:08:49 +0200
+Subject: [PATCH] ath11k: remove intersection support for regulatory rules
+
+Currently, regulatory rules from new country settings is intersected with
+rules from default country settings(during initialisation) in order to prevent
+users to bypass their default country settings such as power limits, channel
+flags, etc.
+
+However, the country setting in the BDF will take higher higher precendence
+and FW will protect it. Therefore, there is no need to handle intersection
+on the driver side now.
+
+Remove regulatory rules intersection logic support.
+
+Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
+---
+ drivers/net/wireless/ath/ath11k/reg.c | 168 +++-----------------------
+ drivers/net/wireless/ath/ath11k/reg.h |   2 +-
+ drivers/net/wireless/ath/ath11k/wmi.c |  24 +---
+ 3 files changed, 16 insertions(+), 178 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath11k/reg.c
++++ b/drivers/net/wireless/ath/ath11k/reg.c
+@@ -352,129 +352,6 @@ static u32 ath11k_map_fw_reg_flags(u16 r
+ 	return flags;
+ }
+ 
+-static bool
+-ath11k_reg_can_intersect(struct ieee80211_reg_rule *rule1,
+-			 struct ieee80211_reg_rule *rule2)
+-{
+-	u32 start_freq1, end_freq1;
+-	u32 start_freq2, end_freq2;
+-
+-	start_freq1 = rule1->freq_range.start_freq_khz;
+-	start_freq2 = rule2->freq_range.start_freq_khz;
+-
+-	end_freq1 = rule1->freq_range.end_freq_khz;
+-	end_freq2 = rule2->freq_range.end_freq_khz;
+-
+-	if ((start_freq1 >= start_freq2 &&
+-	     start_freq1 < end_freq2) ||
+-	    (start_freq2 > start_freq1 &&
+-	     start_freq2 < end_freq1))
+-		return true;
+-
+-	/* TODO: Should we restrict intersection feasibility
+-	 *  based on min bandwidth of the intersected region also,
+-	 *  say the intersected rule should have a  min bandwidth
+-	 * of 20MHz?
+-	 */
+-
+-	return false;
+-}
+-
+-static void ath11k_reg_intersect_rules(struct ieee80211_reg_rule *rule1,
+-				       struct ieee80211_reg_rule *rule2,
+-				       struct ieee80211_reg_rule *new_rule)
+-{
+-	u32 start_freq1, end_freq1;
+-	u32 start_freq2, end_freq2;
+-	u32 freq_diff, max_bw;
+-
+-	start_freq1 = rule1->freq_range.start_freq_khz;
+-	start_freq2 = rule2->freq_range.start_freq_khz;
+-
+-	end_freq1 = rule1->freq_range.end_freq_khz;
+-	end_freq2 = rule2->freq_range.end_freq_khz;
+-
+-	new_rule->freq_range.start_freq_khz = max_t(u32, start_freq1,
+-						    start_freq2);
+-	new_rule->freq_range.end_freq_khz = min_t(u32, end_freq1, end_freq2);
+-
+-	freq_diff = new_rule->freq_range.end_freq_khz -
+-			new_rule->freq_range.start_freq_khz;
+-	max_bw = min_t(u32, rule1->freq_range.max_bandwidth_khz,
+-		       rule2->freq_range.max_bandwidth_khz);
+-	new_rule->freq_range.max_bandwidth_khz = min_t(u32, max_bw, freq_diff);
+-
+-	new_rule->power_rule.max_antenna_gain =
+-		min_t(u32, rule1->power_rule.max_antenna_gain,
+-		      rule2->power_rule.max_antenna_gain);
+-
+-	new_rule->power_rule.max_eirp = min_t(u32, rule1->power_rule.max_eirp,
+-					      rule2->power_rule.max_eirp);
+-
+-	/* Use the flags of both the rules */
+-	new_rule->flags = rule1->flags | rule2->flags;
+-
+-	/* To be safe, lts use the max cac timeout of both rules */
+-	new_rule->dfs_cac_ms = max_t(u32, rule1->dfs_cac_ms,
+-				     rule2->dfs_cac_ms);
+-}
+-
+-static struct ieee80211_regdomain *
+-ath11k_regd_intersect(struct ieee80211_regdomain *default_regd,
+-		      struct ieee80211_regdomain *curr_regd)
+-{
+-	u8 num_old_regd_rules, num_curr_regd_rules, num_new_regd_rules;
+-	struct ieee80211_reg_rule *old_rule, *curr_rule, *new_rule;
+-	struct ieee80211_regdomain *new_regd = NULL;
+-	u8 i, j, k;
+-
+-	num_old_regd_rules = default_regd->n_reg_rules;
+-	num_curr_regd_rules = curr_regd->n_reg_rules;
+-	num_new_regd_rules = 0;
+-
+-	/* Find the number of intersecting rules to allocate new regd memory */
+-	for (i = 0; i < num_old_regd_rules; i++) {
+-		old_rule = default_regd->reg_rules + i;
+-		for (j = 0; j < num_curr_regd_rules; j++) {
+-			curr_rule = curr_regd->reg_rules + j;
+-
+-			if (ath11k_reg_can_intersect(old_rule, curr_rule))
+-				num_new_regd_rules++;
+-		}
+-	}
+-
+-	if (!num_new_regd_rules)
+-		return NULL;
+-
+-	new_regd = kzalloc(sizeof(*new_regd) + (num_new_regd_rules *
+-			sizeof(struct ieee80211_reg_rule)),
+-			GFP_ATOMIC);
+-
+-	if (!new_regd)
+-		return NULL;
+-
+-	/* We set the new country and dfs region directly and only trim
+-	 * the freq, power, antenna gain by intersecting with the
+-	 * default regdomain. Also MAX of the dfs cac timeout is selected.
+-	 */
+-	new_regd->n_reg_rules = num_new_regd_rules;
+-	memcpy(new_regd->alpha2, curr_regd->alpha2, sizeof(new_regd->alpha2));
+-	new_regd->dfs_region = curr_regd->dfs_region;
+-	new_rule = new_regd->reg_rules;
+-
+-	for (i = 0, k = 0; i < num_old_regd_rules; i++) {
+-		old_rule = default_regd->reg_rules + i;
+-		for (j = 0; j < num_curr_regd_rules; j++) {
+-			curr_rule = curr_regd->reg_rules + j;
+-
+-			if (ath11k_reg_can_intersect(old_rule, curr_rule))
+-				ath11k_reg_intersect_rules(old_rule, curr_rule,
+-							   (new_rule + k++));
+-		}
+-	}
+-	return new_regd;
+-}
+-
+ static const char *
+ ath11k_reg_get_regdom_str(enum nl80211_dfs_regions dfs_region)
+ {
+@@ -609,9 +486,9 @@ ath11k_reg_update_weather_radar_band(str
+ 
+ struct ieee80211_regdomain *
+ ath11k_reg_build_regd(struct ath11k_base *ab,
+-		      struct cur_regulatory_info *reg_info, bool intersect)
++		      struct cur_regulatory_info *reg_info)
+ {
+-	struct ieee80211_regdomain *tmp_regd, *default_regd, *new_regd = NULL;
++	struct ieee80211_regdomain *new_regd = NULL;
+ 	struct cur_reg_rule *reg_rule;
+ 	u8 i = 0, j = 0, k = 0;
+ 	u8 num_rules;
+@@ -628,26 +505,26 @@ ath11k_reg_build_regd(struct ath11k_base
+ 		num_rules += reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP];
+ 
+ 	if (!num_rules)
+-		goto ret;
++		return new_regd;
+ 
+ 	/* Add max additional rules to accommodate weather radar band */
+ 	if (reg_info->dfs_region == ATH11K_DFS_REG_ETSI)
+ 		num_rules += 2;
+ 
+-	tmp_regd =  kzalloc(sizeof(*tmp_regd) +
++	new_regd =  kzalloc(sizeof(*new_regd) +
+ 			(num_rules * sizeof(struct ieee80211_reg_rule)),
+ 			GFP_ATOMIC);
+-	if (!tmp_regd)
+-		goto ret;
++	if (!new_regd)
++		return new_regd;
+ 
+-	memcpy(tmp_regd->alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1);
++	memcpy(new_regd->alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1);
+ 	memcpy(alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1);
+ 	alpha2[2] = '\0';
+-	tmp_regd->dfs_region = ath11k_map_fw_dfs_region(reg_info->dfs_region);
++	new_regd->dfs_region = ath11k_map_fw_dfs_region(reg_info->dfs_region);
+ 
+ 	ath11k_dbg(ab, ATH11K_DBG_REG,
+ 		   "Country %s, CFG Regdomain %s FW Regdomain %d, num_reg_rules %d\n",
+-		   alpha2, ath11k_reg_get_regdom_str(tmp_regd->dfs_region),
++		   alpha2, ath11k_reg_get_regdom_str(new_regd->dfs_region),
+ 		   reg_info->dfs_region, num_rules);
+ 	/* Update reg_rules[] below. Firmware is expected to
+ 	 * send these rules in order(2 GHz rules first and then 5 GHz)
+@@ -686,7 +563,7 @@ ath11k_reg_build_regd(struct ath11k_base
+ 
+ 		flags |= ath11k_map_fw_reg_flags(reg_rule->flags);
+ 
+-		ath11k_reg_update_rule(tmp_regd->reg_rules + i,
++		ath11k_reg_update_rule(new_regd->reg_rules + i,
+ 				       reg_rule->start_freq,
+ 				       reg_rule->end_freq, max_bw,
+ 				       reg_rule->ant_gain, reg_rule->reg_power,
+@@ -701,7 +578,7 @@ ath11k_reg_build_regd(struct ath11k_base
+ 		    reg_info->dfs_region == ATH11K_DFS_REG_ETSI &&
+ 		    (reg_rule->end_freq > ETSI_WEATHER_RADAR_BAND_LOW &&
+ 		    reg_rule->start_freq < ETSI_WEATHER_RADAR_BAND_HIGH)){
+-			ath11k_reg_update_weather_radar_band(ab, tmp_regd,
++			ath11k_reg_update_weather_radar_band(ab, new_regd,
+ 							     reg_rule, &i,
+ 							     flags, max_bw);
+ 			continue;
+@@ -712,37 +589,20 @@ ath11k_reg_build_regd(struct ath11k_base
+ 				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d) (%d, %d)\n",
+ 				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
+ 				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
+-				   tmp_regd->reg_rules[i].dfs_cac_ms, flags,
++				   new_regd->reg_rules[i].dfs_cac_ms, flags,
+ 				   reg_rule->psd_flag, reg_rule->psd_eirp);
+ 		} else {
+ 			ath11k_dbg(ab, ATH11K_DBG_REG,
+ 				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n",
+ 				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
+ 				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
+-				   tmp_regd->reg_rules[i].dfs_cac_ms,
++				   new_regd->reg_rules[i].dfs_cac_ms,
+ 				   flags);
+ 		}
+ 	}
+ 
+-	tmp_regd->n_reg_rules = i;
+-
+-	if (intersect) {
+-		default_regd = ab->default_regd[reg_info->phy_id];
+-
+-		/* Get a new regd by intersecting the received regd with
+-		 * our default regd.
+-		 */
+-		new_regd = ath11k_regd_intersect(default_regd, tmp_regd);
+-		kfree(tmp_regd);
+-		if (!new_regd) {
+-			ath11k_warn(ab, "Unable to create intersected regdomain\n");
+-			goto ret;
+-		}
+-	} else {
+-		new_regd = tmp_regd;
+-	}
++	new_regd->n_reg_rules = i;
+ 
+-ret:
+ 	return new_regd;
+ }
+ 
+--- a/drivers/net/wireless/ath/ath11k/reg.h
++++ b/drivers/net/wireless/ath/ath11k/reg.h
+@@ -30,7 +30,7 @@ void ath11k_reg_free(struct ath11k_base
+ void ath11k_regd_update_work(struct work_struct *work);
+ struct ieee80211_regdomain *
+ ath11k_reg_build_regd(struct ath11k_base *ab,
+-		      struct cur_regulatory_info *reg_info, bool intersect);
++		      struct cur_regulatory_info *reg_info);
+ int ath11k_regd_update(struct ath11k *ar);
+ int ath11k_reg_update_chan_list(struct ath11k *ar, bool wait);
+ #endif
+--- a/drivers/net/wireless/ath/ath11k/wmi.c
++++ b/drivers/net/wireless/ath/ath11k/wmi.c
+@@ -6979,24 +6979,12 @@ static void ath11k_wmi_htc_tx_complete(s
+ 		wake_up(&wmi->tx_ce_desc_wq);
+ }
+ 
+-static bool ath11k_reg_is_world_alpha(char *alpha)
+-{
+-	if (alpha[0] == '0' && alpha[1] == '0')
+-		return true;
+-
+-	if (alpha[0] == 'n' && alpha[1] == 'a')
+-		return true;
+-
+-	return false;
+-}
+-
+ static int ath11k_reg_chan_list_event(struct ath11k_base *ab,
+ 				      struct sk_buff *skb,
+ 				      enum wmi_reg_chan_list_cmd_type id)
+ {
+ 	struct cur_regulatory_info *reg_info = NULL;
+ 	struct ieee80211_regdomain *regd = NULL;
+-	bool intersect = false;
+ 	int ret = 0, pdev_idx, i, j;
+ 	struct ath11k *ar;
+ 
+@@ -7058,17 +7046,7 @@ static int ath11k_reg_chan_list_event(st
+ 		    (char *)reg_info->alpha2, 2))
+ 		goto mem_free;
+ 
+-	/* Intersect new rules with default regd if a new country setting was
+-	 * requested, i.e a default regd was already set during initialization
+-	 * and the regd coming from this event has a valid country info.
+-	 */
+-	if (ab->default_regd[pdev_idx] &&
+-	    !ath11k_reg_is_world_alpha((char *)
+-		ab->default_regd[pdev_idx]->alpha2) &&
+-	    !ath11k_reg_is_world_alpha((char *)reg_info->alpha2))
+-		intersect = true;
+-
+-	regd = ath11k_reg_build_regd(ab, reg_info, intersect);
++	regd = ath11k_reg_build_regd(ab, reg_info);
+ 	if (!regd) {
+ 		ath11k_warn(ab, "failed to build regd from reg_info\n");
+ 		goto fallback;

package/libs/uclient/Makefile

@@ -5,9 +5,9 @@ PKG_RELEASE=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/uclient.git
-PKG_MIRROR_HASH:=7c443cac02a734dd312c65618f4de17248d188317f30a9fac192c1503b3d5c05
+PKG_MIRROR_HASH:=16c6c97f45d9737fb40628ea22ae347541a1e37d8d1576e04ffbaa5fc92f3b6d
-PKG_SOURCE_DATE:=2021-05-14
+PKG_SOURCE_DATE:=2023-04-13
-PKG_SOURCE_VERSION:=6a6011df3429ffa5958d12b1327eeda4fd9daa47
+PKG_SOURCE_VERSION:=007d945467499f43656b141171d31f5643b83a6c
 CMAKE_INSTALL:=1
 
 PKG_BUILD_DEPENDS:=ustream-ssl

target/linux/generic/backport-5.15/789-v6.3-net-sfp-add-quirk-enabling-2500Base-x-for-HG-MXPD-48.patch

@@ -0,0 +1,37 @@
+From ad651d68cee75e9ac20002254c4e5d09ee67a84b Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Sun, 2 Apr 2023 12:44:37 +0100
+Subject: [PATCH] net: sfp: add quirk enabling 2500Base-x for HG MXPD-483II
+
+The HG MXPD-483II 1310nm SFP module is meant to operate with 2500Base-X,
+however, in their EEPROM they incorrectly specify:
+    Transceiver type                          : Ethernet: 1000BASE-LX
+    ...
+    BR, Nominal                               : 2600MBd
+
+Use sfp_quirk_2500basex for this module to allow 2500Base-X mode anyway.
+
+https://forum.banana-pi.org/t/bpi-r3-sfp-module-compatibility/14573/60
+
+Reported-by: chowtom <chowtom@gmail.com>
+Tested-by: chowtom <chowtom@gmail.com>
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/sfp.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/phy/sfp.c
++++ b/drivers/net/phy/sfp.c
+@@ -366,6 +366,10 @@ static const struct sfp_quirk sfp_quirks
+ 		.part = "HL-GSFP",
+ 		.fixup = sfp_fixup_halny_gsfp,
+ 	}, {
++		.vendor = "HG GENUINE",
++		.part = "MXPD-483II",
++		.modes = sfp_quirk_2500basex,
++	}, {
+ 		// Huawei MA5671A can operate at 2500base-X, but report 1.2GBd
+ 		// NRZ in their EEPROM
+ 		.vendor = "HUAWEI",

target/linux/generic/pending-5.15/701-net-sfp-add-quirk-for-MXPD-483II.patch

@@ -1,13 +0,0 @@
---- a/drivers/net/phy/sfp.c
-+++ b/drivers/net/phy/sfp.c
-@@ -366,6 +366,10 @@ static const struct sfp_quirk sfp_quirks
- 		.part = "HL-GSFP",
- 		.fixup = sfp_fixup_halny_gsfp,
- 	}, {
-+		.vendor = "HG GENUINE",
-+		.part = "MXPD-483II",
-+		.modes = sfp_quirk_2500basex,
-+	}, {
- 		// Huawei MA5671A can operate at 2500base-X, but report 1.2GBd
- 		// NRZ in their EEPROM
- 		.vendor = "HUAWEI",

target/linux/mediatek/files-5.15/drivers/pinctrl/mediatek/pinctrl-mt7981.c

@@ -436,6 +436,60 @@ static const struct mtk_pin_field_calc mt7981_pin_r1_range[] = {
 	PIN_FIELD_BASE(39, 39, 3, 0x40, 0x10, 1, 1),
 };
 
+static const unsigned int mt7981_pull_type[] = {
+	MTK_PULL_PUPD_R1R0_TYPE,/*0*/ MTK_PULL_PUPD_R1R0_TYPE,/*1*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*2*/ MTK_PULL_PUPD_R1R0_TYPE,/*3*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*4*/ MTK_PULL_PUPD_R1R0_TYPE,/*5*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*6*/ MTK_PULL_PUPD_R1R0_TYPE,/*7*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*8*/ MTK_PULL_PUPD_R1R0_TYPE,/*9*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*10*/ MTK_PULL_PUPD_R1R0_TYPE,/*11*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*12*/ MTK_PULL_PUPD_R1R0_TYPE,/*13*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*14*/ MTK_PULL_PUPD_R1R0_TYPE,/*15*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*16*/ MTK_PULL_PUPD_R1R0_TYPE,/*17*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*18*/ MTK_PULL_PUPD_R1R0_TYPE,/*19*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*20*/ MTK_PULL_PUPD_R1R0_TYPE,/*21*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*22*/ MTK_PULL_PUPD_R1R0_TYPE,/*23*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*24*/ MTK_PULL_PUPD_R1R0_TYPE,/*25*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*26*/ MTK_PULL_PUPD_R1R0_TYPE,/*27*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*28*/ MTK_PULL_PUPD_R1R0_TYPE,/*29*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*30*/ MTK_PULL_PUPD_R1R0_TYPE,/*31*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*32*/ MTK_PULL_PUPD_R1R0_TYPE,/*33*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*34*/ MTK_PULL_PUPD_R1R0_TYPE,/*35*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*36*/ MTK_PULL_PUPD_R1R0_TYPE,/*37*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*38*/ MTK_PULL_PUPD_R1R0_TYPE,/*39*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*40*/ MTK_PULL_PUPD_R1R0_TYPE,/*41*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*42*/ MTK_PULL_PUPD_R1R0_TYPE,/*43*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*44*/ MTK_PULL_PUPD_R1R0_TYPE,/*45*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*46*/ MTK_PULL_PUPD_R1R0_TYPE,/*47*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*48*/ MTK_PULL_PUPD_R1R0_TYPE,/*49*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*50*/ MTK_PULL_PUPD_R1R0_TYPE,/*51*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*52*/ MTK_PULL_PUPD_R1R0_TYPE,/*53*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*54*/ MTK_PULL_PUPD_R1R0_TYPE,/*55*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*56*/ MTK_PULL_PUPD_R1R0_TYPE,/*57*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*58*/ MTK_PULL_PUPD_R1R0_TYPE,/*59*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*60*/ MTK_PULL_PUPD_R1R0_TYPE,/*61*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*62*/ MTK_PULL_PUPD_R1R0_TYPE,/*63*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*64*/ MTK_PULL_PUPD_R1R0_TYPE,/*65*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*66*/ MTK_PULL_PUPD_R1R0_TYPE,/*67*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*68*/ MTK_PULL_PU_PD_TYPE,/*69*/
+	MTK_PULL_PU_PD_TYPE,/*70*/ MTK_PULL_PU_PD_TYPE,/*71*/
+	MTK_PULL_PU_PD_TYPE,/*72*/ MTK_PULL_PU_PD_TYPE,/*73*/
+	MTK_PULL_PU_PD_TYPE,/*74*/ MTK_PULL_PU_PD_TYPE,/*75*/
+	MTK_PULL_PU_PD_TYPE,/*76*/ MTK_PULL_PU_PD_TYPE,/*77*/
+	MTK_PULL_PU_PD_TYPE,/*78*/ MTK_PULL_PU_PD_TYPE,/*79*/
+	MTK_PULL_PU_PD_TYPE,/*80*/ MTK_PULL_PU_PD_TYPE,/*81*/
+	MTK_PULL_PU_PD_TYPE,/*82*/ MTK_PULL_PU_PD_TYPE,/*83*/
+	MTK_PULL_PU_PD_TYPE,/*84*/ MTK_PULL_PU_PD_TYPE,/*85*/
+	MTK_PULL_PU_PD_TYPE,/*86*/ MTK_PULL_PU_PD_TYPE,/*87*/
+	MTK_PULL_PU_PD_TYPE,/*88*/ MTK_PULL_PU_PD_TYPE,/*89*/
+	MTK_PULL_PU_PD_TYPE,/*90*/ MTK_PULL_PU_PD_TYPE,/*91*/
+	MTK_PULL_PU_PD_TYPE,/*92*/ MTK_PULL_PU_PD_TYPE,/*93*/
+	MTK_PULL_PU_PD_TYPE,/*94*/ MTK_PULL_PU_PD_TYPE,/*95*/
+	MTK_PULL_PU_PD_TYPE,/*96*/ MTK_PULL_PU_PD_TYPE,/*97*/
+	MTK_PULL_PU_PD_TYPE,/*98*/ MTK_PULL_PU_PD_TYPE,/*99*/
+	MTK_PULL_PU_PD_TYPE,/*100*/
+};
+
 static const struct mtk_pin_reg_calc mt7981_reg_cals[] = {
 	[PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7981_pin_mode_range),
 	[PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7981_pin_dir_range),
@@ -960,6 +1014,7 @@ static struct mtk_pin_soc mt7981_data = {
 	.ies_present = false,
 	.base_names = mt7981_pinctrl_register_base_names,
 	.nbase_names = ARRAY_SIZE(mt7981_pinctrl_register_base_names),
+	.pull_type = mt7981_pull_type,
 	.bias_set_combo = mtk_pinconf_bias_set_combo,
 	.bias_get_combo = mtk_pinconf_bias_get_combo,
 	.drive_set = mtk_pinconf_drive_set_rev1,

target/linux/mediatek/files-5.15/drivers/pinctrl/mediatek/pinctrl-mt7986.c

@@ -316,10 +316,10 @@ static const struct mtk_pin_field_calc mt7986_pin_pupd_range[] = {
 	PIN_FIELD_BASE(38, 38, IOCFG_LT_BASE, 0x30, 0x10, 9, 1),
 	PIN_FIELD_BASE(39, 40, IOCFG_RB_BASE, 0x60, 0x10, 18, 1),
 	PIN_FIELD_BASE(41, 41, IOCFG_RB_BASE, 0x60, 0x10, 12, 1),
-	PIN_FIELD_BASE(42, 43, IOCFG_RB_BASE, 0x60, 0x10, 22, 1),
+	PIN_FIELD_BASE(42, 43, IOCFG_RB_BASE, 0x60, 0x10, 23, 1),
-	PIN_FIELD_BASE(44, 45, IOCFG_RB_BASE, 0x60, 0x10, 20, 1),
+	PIN_FIELD_BASE(44, 45, IOCFG_RB_BASE, 0x60, 0x10, 21, 1),
-	PIN_FIELD_BASE(46, 47, IOCFG_RB_BASE, 0x60, 0x10, 26, 1),
+	PIN_FIELD_BASE(46, 47, IOCFG_RB_BASE, 0x60, 0x10, 27, 1),
-	PIN_FIELD_BASE(48, 49, IOCFG_RB_BASE, 0x60, 0x10, 24, 1),
+	PIN_FIELD_BASE(48, 49, IOCFG_RB_BASE, 0x60, 0x10, 25, 1),
 	PIN_FIELD_BASE(50, 57, IOCFG_RT_BASE, 0x40, 0x10, 2, 1),
 	PIN_FIELD_BASE(58, 58, IOCFG_RT_BASE, 0x40, 0x10, 1, 1),
 	PIN_FIELD_BASE(59, 59, IOCFG_RT_BASE, 0x40, 0x10, 0, 1),
@@ -354,10 +354,10 @@ static const struct mtk_pin_field_calc mt7986_pin_r0_range[] = {
 	PIN_FIELD_BASE(38, 38, IOCFG_LT_BASE, 0x40, 0x10, 9, 1),
 	PIN_FIELD_BASE(39, 40, IOCFG_RB_BASE, 0x70, 0x10, 18, 1),
 	PIN_FIELD_BASE(41, 41, IOCFG_RB_BASE, 0x70, 0x10, 12, 1),
-	PIN_FIELD_BASE(42, 43, IOCFG_RB_BASE, 0x70, 0x10, 22, 1),
+	PIN_FIELD_BASE(42, 43, IOCFG_RB_BASE, 0x70, 0x10, 23, 1),
-	PIN_FIELD_BASE(44, 45, IOCFG_RB_BASE, 0x70, 0x10, 20, 1),
+	PIN_FIELD_BASE(44, 45, IOCFG_RB_BASE, 0x70, 0x10, 21, 1),
-	PIN_FIELD_BASE(46, 47, IOCFG_RB_BASE, 0x70, 0x10, 26, 1),
+	PIN_FIELD_BASE(46, 47, IOCFG_RB_BASE, 0x70, 0x10, 27, 1),
-	PIN_FIELD_BASE(48, 49, IOCFG_RB_BASE, 0x70, 0x10, 24, 1),
+	PIN_FIELD_BASE(48, 49, IOCFG_RB_BASE, 0x70, 0x10, 25, 1),
 	PIN_FIELD_BASE(50, 57, IOCFG_RT_BASE, 0x50, 0x10, 2, 1),
 	PIN_FIELD_BASE(58, 58, IOCFG_RT_BASE, 0x50, 0x10, 1, 1),
 	PIN_FIELD_BASE(59, 59, IOCFG_RT_BASE, 0x50, 0x10, 0, 1),
@@ -392,10 +392,10 @@ static const struct mtk_pin_field_calc mt7986_pin_r1_range[] = {
 	PIN_FIELD_BASE(38, 38, IOCFG_LT_BASE, 0x50, 0x10, 9, 1),
 	PIN_FIELD_BASE(39, 40, IOCFG_RB_BASE, 0x80, 0x10, 18, 1),
 	PIN_FIELD_BASE(41, 41, IOCFG_RB_BASE, 0x80, 0x10, 12, 1),
-	PIN_FIELD_BASE(42, 43, IOCFG_RB_BASE, 0x80, 0x10, 22, 1),
+	PIN_FIELD_BASE(42, 43, IOCFG_RB_BASE, 0x80, 0x10, 23, 1),
-	PIN_FIELD_BASE(44, 45, IOCFG_RB_BASE, 0x80, 0x10, 20, 1),
+	PIN_FIELD_BASE(44, 45, IOCFG_RB_BASE, 0x80, 0x10, 21, 1),
-	PIN_FIELD_BASE(46, 47, IOCFG_RB_BASE, 0x80, 0x10, 26, 1),
+	PIN_FIELD_BASE(46, 47, IOCFG_RB_BASE, 0x80, 0x10, 27, 1),
-	PIN_FIELD_BASE(48, 49, IOCFG_RB_BASE, 0x80, 0x10, 24, 1),
+	PIN_FIELD_BASE(48, 49, IOCFG_RB_BASE, 0x80, 0x10, 25, 1),
 	PIN_FIELD_BASE(50, 57, IOCFG_RT_BASE, 0x60, 0x10, 2, 1),
 	PIN_FIELD_BASE(58, 58, IOCFG_RT_BASE, 0x60, 0x10, 1, 1),
 	PIN_FIELD_BASE(59, 59, IOCFG_RT_BASE, 0x60, 0x10, 0, 1),
@@ -407,6 +407,60 @@ static const struct mtk_pin_field_calc mt7986_pin_r1_range[] = {
 	PIN_FIELD_BASE(66, 68, IOCFG_LB_BASE, 0x60, 0x10, 2, 1),
 };
 
+static const unsigned int mt7986_pull_type[] = {
+	MTK_PULL_PUPD_R1R0_TYPE,/*0*/ MTK_PULL_PUPD_R1R0_TYPE,/*1*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*2*/ MTK_PULL_PUPD_R1R0_TYPE,/*3*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*4*/ MTK_PULL_PUPD_R1R0_TYPE,/*5*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*6*/ MTK_PULL_PUPD_R1R0_TYPE,/*7*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*8*/ MTK_PULL_PUPD_R1R0_TYPE,/*9*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*10*/ MTK_PULL_PUPD_R1R0_TYPE,/*11*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*12*/ MTK_PULL_PUPD_R1R0_TYPE,/*13*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*14*/ MTK_PULL_PUPD_R1R0_TYPE,/*15*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*16*/ MTK_PULL_PUPD_R1R0_TYPE,/*17*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*18*/ MTK_PULL_PUPD_R1R0_TYPE,/*19*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*20*/ MTK_PULL_PUPD_R1R0_TYPE,/*21*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*22*/ MTK_PULL_PUPD_R1R0_TYPE,/*23*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*24*/ MTK_PULL_PUPD_R1R0_TYPE,/*25*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*26*/ MTK_PULL_PUPD_R1R0_TYPE,/*27*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*28*/ MTK_PULL_PUPD_R1R0_TYPE,/*29*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*30*/ MTK_PULL_PUPD_R1R0_TYPE,/*31*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*32*/ MTK_PULL_PUPD_R1R0_TYPE,/*33*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*34*/ MTK_PULL_PUPD_R1R0_TYPE,/*35*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*36*/ MTK_PULL_PUPD_R1R0_TYPE,/*37*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*38*/ MTK_PULL_PUPD_R1R0_TYPE,/*39*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*40*/ MTK_PULL_PUPD_R1R0_TYPE,/*41*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*42*/ MTK_PULL_PUPD_R1R0_TYPE,/*43*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*44*/ MTK_PULL_PUPD_R1R0_TYPE,/*45*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*46*/ MTK_PULL_PUPD_R1R0_TYPE,/*47*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*48*/ MTK_PULL_PUPD_R1R0_TYPE,/*49*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*50*/ MTK_PULL_PUPD_R1R0_TYPE,/*51*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*52*/ MTK_PULL_PUPD_R1R0_TYPE,/*53*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*54*/ MTK_PULL_PUPD_R1R0_TYPE,/*55*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*56*/ MTK_PULL_PUPD_R1R0_TYPE,/*57*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*58*/ MTK_PULL_PUPD_R1R0_TYPE,/*59*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*60*/ MTK_PULL_PUPD_R1R0_TYPE,/*61*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*62*/ MTK_PULL_PUPD_R1R0_TYPE,/*63*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*64*/ MTK_PULL_PUPD_R1R0_TYPE,/*65*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*66*/ MTK_PULL_PUPD_R1R0_TYPE,/*67*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*68*/ MTK_PULL_PU_PD_TYPE,/*69*/
+	MTK_PULL_PU_PD_TYPE,/*70*/ MTK_PULL_PU_PD_TYPE,/*71*/
+	MTK_PULL_PU_PD_TYPE,/*72*/ MTK_PULL_PU_PD_TYPE,/*73*/
+	MTK_PULL_PU_PD_TYPE,/*74*/ MTK_PULL_PU_PD_TYPE,/*75*/
+	MTK_PULL_PU_PD_TYPE,/*76*/ MTK_PULL_PU_PD_TYPE,/*77*/
+	MTK_PULL_PU_PD_TYPE,/*78*/ MTK_PULL_PU_PD_TYPE,/*79*/
+	MTK_PULL_PU_PD_TYPE,/*80*/ MTK_PULL_PU_PD_TYPE,/*81*/
+	MTK_PULL_PU_PD_TYPE,/*82*/ MTK_PULL_PU_PD_TYPE,/*83*/
+	MTK_PULL_PU_PD_TYPE,/*84*/ MTK_PULL_PU_PD_TYPE,/*85*/
+	MTK_PULL_PU_PD_TYPE,/*86*/ MTK_PULL_PU_PD_TYPE,/*87*/
+	MTK_PULL_PU_PD_TYPE,/*88*/ MTK_PULL_PU_PD_TYPE,/*89*/
+	MTK_PULL_PU_PD_TYPE,/*90*/ MTK_PULL_PU_PD_TYPE,/*91*/
+	MTK_PULL_PU_PD_TYPE,/*92*/ MTK_PULL_PU_PD_TYPE,/*93*/
+	MTK_PULL_PU_PD_TYPE,/*94*/ MTK_PULL_PU_PD_TYPE,/*95*/
+	MTK_PULL_PU_PD_TYPE,/*96*/ MTK_PULL_PU_PD_TYPE,/*97*/
+	MTK_PULL_PU_PD_TYPE,/*98*/ MTK_PULL_PU_PD_TYPE,/*99*/
+	MTK_PULL_PU_PD_TYPE,/*100*/
+};
+
 static const struct mtk_pin_reg_calc mt7986_reg_cals[] = {
 	[PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7986_pin_mode_range),
 	[PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7986_pin_dir_range),
@@ -675,11 +729,17 @@ static int mt7986_uart1_1_funcs[] = { 4, 4, 4, 4, };
 static int mt7986_spi1_2_pins[] = { 29, 30, 31, 32, };
 static int mt7986_spi1_2_funcs[] = { 1, 1, 1, 1, };
 
-static int mt7986_uart1_2_pins[] = { 29, 30, 31, 32, };
+static int mt7986_uart1_2_rx_tx_pins[] = { 29, 30, };
-static int mt7986_uart1_2_funcs[] = { 3, 3, 3, 3, };
+static int mt7986_uart1_2_rx_tx_funcs[] = { 3, 3, };
 
-static int mt7986_uart2_0_pins[] = { 29, 30, 31, 32, };
+static int mt7986_uart1_2_cts_rts_pins[] = { 31, 32, };
-static int mt7986_uart2_0_funcs[] = { 4, 4, 4, 4, };
+static int mt7986_uart1_2_cts_rts_funcs[] = { 3, 3, };
+
+static int mt7986_uart2_0_rx_tx_pins[] = { 29, 30, };
+static int mt7986_uart2_0_rx_tx_funcs[] = { 4, 4, };
+
+static int mt7986_uart2_0_cts_rts_pins[] = { 31, 32, };
+static int mt7986_uart2_0_cts_rts_funcs[] = { 4, 4, };
 
 static int mt7986_spi0_pins[] = { 33, 34, 35, 36, };
 static int mt7986_spi0_funcs[] = { 1, 1, 1, 1, };
@@ -708,6 +768,12 @@ static int mt7986_pcie_reset_funcs[] = { 1, };
 static int mt7986_uart1_pins[] = { 42, 43, 44, 45, };
 static int mt7986_uart1_funcs[] = { 1, 1, 1, 1, };
 
+static int mt7986_uart1_rx_tx_pins[] = { 42, 43, };
+static int mt7986_uart1_rx_tx_funcs[] = { 1, 1, };
+
+static int mt7986_uart1_cts_rts_pins[] = { 44, 45, };
+static int mt7986_uart1_cts_rts_funcs[] = { 1, 1, };
+
 static int mt7986_uart2_pins[] = { 46, 47, 48, 49, };
 static int mt7986_uart2_funcs[] = { 1, 1, 1, 1, };
 
@@ -744,14 +810,13 @@ static int mt7986_pcie_clk_funcs[] = { 1, };
 static int mt7986_pcie_wake_pins[] = { 10, };
 static int mt7986_pcie_wake_funcs[] = { 1, };
 
-static int mt7986_jtag_pins[] = { 11, 12, 13, 14, 15};
-static int mt7986_jtag_funcs[] = { 1, 1, 1, 1, 1};
-
 static const struct group_desc mt7986_groups[] = {
 	PINCTRL_PIN_GROUP("watchdog", mt7986_watchdog),
 	PINCTRL_PIN_GROUP("wifi_led", mt7986_wifi_led),
 	PINCTRL_PIN_GROUP("i2c", mt7986_i2c),
 	PINCTRL_PIN_GROUP("uart1_0", mt7986_uart1_0),
+	PINCTRL_PIN_GROUP("uart1_rx_tx", mt7986_uart1_rx_tx),
+	PINCTRL_PIN_GROUP("uart1_cts_rts", mt7986_uart1_cts_rts),
 	PINCTRL_PIN_GROUP("pcie_clk", mt7986_pcie_clk),
 	PINCTRL_PIN_GROUP("pcie_wake", mt7986_pcie_wake),
 	PINCTRL_PIN_GROUP("spi1_0", mt7986_spi1_0),
@@ -763,8 +828,10 @@ static const struct group_desc mt7986_groups[] = {
 	PINCTRL_PIN_GROUP("spi1_1", mt7986_spi1_1),
 	PINCTRL_PIN_GROUP("uart1_1", mt7986_uart1_1),
 	PINCTRL_PIN_GROUP("spi1_2", mt7986_spi1_2),
-	PINCTRL_PIN_GROUP("uart1_2", mt7986_uart1_2),
+	PINCTRL_PIN_GROUP("uart1_2_rx_tx", mt7986_uart1_2_rx_tx),
-	PINCTRL_PIN_GROUP("uart2_0", mt7986_uart2_0),
+	PINCTRL_PIN_GROUP("uart1_2_cts_rts", mt7986_uart1_2_cts_rts),
+	PINCTRL_PIN_GROUP("uart2_0_rx_tx", mt7986_uart2_0_rx_tx),
+	PINCTRL_PIN_GROUP("uart2_0_cts_rts", mt7986_uart2_0_cts_rts),
 	PINCTRL_PIN_GROUP("spi0", mt7986_spi0),
 	PINCTRL_PIN_GROUP("spi0_wp_hold", mt7986_spi0_wp_hold),
 	PINCTRL_PIN_GROUP("uart2_1", mt7986_uart2_1),
@@ -783,7 +850,6 @@ static const struct group_desc mt7986_groups[] = {
 	PINCTRL_PIN_GROUP("wf_2g", mt7986_wf_2g),
 	PINCTRL_PIN_GROUP("wf_5g", mt7986_wf_5g),
 	PINCTRL_PIN_GROUP("wf_dbdc", mt7986_wf_dbdc),
-	PINCTRL_PIN_GROUP("jtag", mt7986_jtag),
 };
 
 /* Joint those groups owning the same capability in user point of view which
@@ -804,12 +870,13 @@ static const char *mt7986_pwm_groups[] = { "pwm0", "pwm1_0", "pwm1_1", };
 static const char *mt7986_spi_groups[] = {
 	"spi0", "spi0_wp_hold", "spi1_0", "spi1_1", "spi1_2", "spi1_3", };
 static const char *mt7986_uart_groups[] = {
-	"uart1_0", "uart1_1", "uart1_2", "uart1_3_rx_tx", "uart1_3_cts_rts",
+	"uart1_0", "uart1_1", "uart1_rx_tx", "uart1_cts_rts",
+	"uart1_2_rx_tx", "uart1_2_cts_rts",
+	"uart1_3_rx_tx", "uart1_3_cts_rts", "uart2_0_rx_tx", "uart2_0_cts_rts",
 	"uart2_0", "uart2_1", "uart0", "uart1", "uart2",
 };
 static const char *mt7986_wdt_groups[] = { "watchdog", };
 static const char *mt7986_wf_groups[] = { "wf_2g", "wf_5g", "wf_dbdc", };
-static const char *mt7986_jtag_groups[] = { "jtag", };
 
 static const struct function_desc mt7986_functions[] = {
 	{"audio", mt7986_audio_groups, ARRAY_SIZE(mt7986_audio_groups)},
@@ -824,7 +891,6 @@ static const struct function_desc mt7986_functions[] = {
 	{"uart", mt7986_uart_groups, ARRAY_SIZE(mt7986_uart_groups)},
 	{"watchdog", mt7986_wdt_groups, ARRAY_SIZE(mt7986_wdt_groups)},
 	{"wifi", mt7986_wf_groups, ARRAY_SIZE(mt7986_wf_groups)},
-	{"jtag", mt7986_jtag_groups, ARRAY_SIZE(mt7986_jtag_groups)},
 };
 
 static const struct mtk_eint_hw mt7986a_eint_hw = {
@@ -832,6 +898,7 @@ static const struct mtk_eint_hw mt7986a_eint_hw = {
 	.ports = 7,
 	.ap_num = ARRAY_SIZE(mt7986a_pins),
 	.db_cnt = 16,
+	.db_time = debounce_time_mt6765,
 };
 
 static const struct mtk_eint_hw mt7986b_eint_hw = {
@@ -839,6 +906,7 @@ static const struct mtk_eint_hw mt7986b_eint_hw = {
 	.ports = 7,
 	.ap_num = ARRAY_SIZE(mt7986b_pins),
 	.db_cnt = 16,
+	.db_time = debounce_time_mt6765,
 };
 
 static struct mtk_pin_soc mt7986a_data = {
@@ -854,6 +922,7 @@ static struct mtk_pin_soc mt7986a_data = {
 	.ies_present = false,
 	.base_names = mt7986_pinctrl_register_base_names,
 	.nbase_names = ARRAY_SIZE(mt7986_pinctrl_register_base_names),
+	.pull_type = mt7986_pull_type,
 	.bias_set_combo = mtk_pinconf_bias_set_combo,
 	.bias_get_combo = mtk_pinconf_bias_get_combo,
 	.drive_set = mtk_pinconf_drive_set_rev1,
@@ -875,6 +944,7 @@ static struct mtk_pin_soc mt7986b_data = {
 	.ies_present = false,
 	.base_names = mt7986_pinctrl_register_base_names,
 	.nbase_names = ARRAY_SIZE(mt7986_pinctrl_register_base_names),
+	.pull_type = mt7986_pull_type,
 	.bias_set_combo = mtk_pinconf_bias_set_combo,
 	.bias_get_combo = mtk_pinconf_bias_get_combo,
 	.drive_set = mtk_pinconf_drive_set_rev1,

target/linux/mediatek/patches-5.15/820-v5.16-dt-bindings-pinctrl-mt8195-add-rsel-define.patch

@@ -0,0 +1,33 @@
+From 26564c44357e19d03c124550bbd0b5851e6638c2 Mon Sep 17 00:00:00 2001
+From: Zhiyong Tao <zhiyong.tao@mediatek.com>
+Date: Fri, 24 Sep 2021 16:06:28 +0800
+Subject: [PATCH] dt-bindings: pinctrl: mt8195: add rsel define
+
+This patch adds rsel define for mt8195.
+
+Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Link: https://lore.kernel.org/r/20210924080632.28410-2-zhiyong.tao@mediatek.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/include/dt-bindings/pinctrl/mt65xx.h
++++ b/include/dt-bindings/pinctrl/mt65xx.h
+@@ -16,6 +16,15 @@
+ #define MTK_PUPD_SET_R1R0_10 102
+ #define MTK_PUPD_SET_R1R0_11 103
+ 
++#define MTK_PULL_SET_RSEL_000  200
++#define MTK_PULL_SET_RSEL_001  201
++#define MTK_PULL_SET_RSEL_010  202
++#define MTK_PULL_SET_RSEL_011  203
++#define MTK_PULL_SET_RSEL_100  204
++#define MTK_PULL_SET_RSEL_101  205
++#define MTK_PULL_SET_RSEL_110  206
++#define MTK_PULL_SET_RSEL_111  207
++
+ #define MTK_DRIVE_2mA  2
+ #define MTK_DRIVE_4mA  4
+ #define MTK_DRIVE_6mA  6

target/linux/mediatek/patches-5.15/821-v5.16-pinctrl-mediatek-moore-check-if-pin_desc-is-valid-be.patch

@@ -0,0 +1,93 @@
+From d8b94c9ff96c2024a527086d850eb0b314337ff9 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Tue, 14 Sep 2021 16:51:32 +0800
+Subject: [PATCH] pinctrl: mediatek: moore: check if pin_desc is valid before
+ use
+
+Certain SoC are missing the middle part gpios in consecutive pins,
+it's better to check if mtk_pin_desc is a valid pin for the extensibility
+
+Signed-off-by: Sam Shih <sam.shih@mediatek.com>
+Acked-by: Sean Wang <sean.wang@mediatek.com>
+Link: https://lore.kernel.org/r/20210914085137.31761-5-sam.shih@mediatek.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ drivers/pinctrl/mediatek/pinctrl-moore.c | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+--- a/drivers/pinctrl/mediatek/pinctrl-moore.c
++++ b/drivers/pinctrl/mediatek/pinctrl-moore.c
+@@ -60,6 +60,8 @@ static int mtk_pinmux_set_mux(struct pin
+ 		int pin = grp->pins[i];
+ 
+ 		desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
++		if (!desc->name)
++			return -ENOTSUPP;
+ 
+ 		mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
+ 				 pin_modes[i]);
+@@ -76,6 +78,8 @@ static int mtk_pinmux_gpio_request_enabl
+ 	const struct mtk_pin_desc *desc;
+ 
+ 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
++	if (!desc->name)
++		return -ENOTSUPP;
+ 
+ 	return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
+ 				hw->soc->gpio_m);
+@@ -89,6 +93,8 @@ static int mtk_pinmux_gpio_set_direction
+ 	const struct mtk_pin_desc *desc;
+ 
+ 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
++	if (!desc->name)
++		return -ENOTSUPP;
+ 
+ 	/* hardware would take 0 as input direction */
+ 	return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
+@@ -103,6 +109,8 @@ static int mtk_pinconf_get(struct pinctr
+ 	const struct mtk_pin_desc *desc;
+ 
+ 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
++	if (!desc->name)
++		return -ENOTSUPP;
+ 
+ 	switch (param) {
+ 	case PIN_CONFIG_BIAS_DISABLE:
+@@ -218,6 +226,8 @@ static int mtk_pinconf_set(struct pinctr
+ 	int cfg, err = 0;
+ 
+ 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
++	if (!desc->name)
++		return -ENOTSUPP;
+ 
+ 	for (cfg = 0; cfg < num_configs; cfg++) {
+ 		param = pinconf_to_config_param(configs[cfg]);
+@@ -435,6 +445,8 @@ static int mtk_gpio_get(struct gpio_chip
+ 	int value, err;
+ 
+ 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
++	if (!desc->name)
++		return -ENOTSUPP;
+ 
+ 	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
+ 	if (err)
+@@ -449,6 +461,10 @@ static void mtk_gpio_set(struct gpio_chi
+ 	const struct mtk_pin_desc *desc;
+ 
+ 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
++	if (!desc->name) {
++		dev_err(hw->dev, "Failed to set gpio %d\n", gpio);
++		return;
++	}
+ 
+ 	mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
+ }
+@@ -490,6 +506,8 @@ static int mtk_gpio_set_config(struct gp
+ 	u32 debounce;
+ 
+ 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
++	if (!desc->name)
++		return -ENOTSUPP;
+ 
+ 	if (!hw->eint ||
+ 	    pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||

target/linux/mediatek/patches-5.15/822-v5.16-pinctrl-mediatek-support-rsel-feature.patch

@@ -0,0 +1,457 @@
+From fb34a9ae383ae26326d4889fd2513e49f1019b88 Mon Sep 17 00:00:00 2001
+From: Zhiyong Tao <zhiyong.tao@mediatek.com>
+Date: Fri, 24 Sep 2021 16:06:31 +0800
+Subject: [PATCH] pinctrl: mediatek: support rsel feature
+
+This patch supports rsel(resistance selection) feature for I2C pins.
+It provides more resistance selection solution in different ICs.
+It provides rsel define and si unit solution by identifying
+"mediatek,rsel_resistance_in_si_unit" property in pio dtsi node.
+
+Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
+Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
+Link: https://lore.kernel.org/r/20210924080632.28410-5-zhiyong.tao@mediatek.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 231 +++++++++++++++---
+ .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  |  46 ++++
+ drivers/pinctrl/mediatek/pinctrl-paris.c      |  60 +++--
+ 3 files changed, 289 insertions(+), 48 deletions(-)
+
+--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+@@ -665,6 +665,181 @@ out:
+ 	return err;
+ }
+ 
++static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw,
++				  const struct mtk_pin_desc *desc,
++				  u32 pullup, u32 arg, u32 *rsel_val)
++{
++	const struct mtk_pin_rsel *rsel;
++	int check;
++	bool found = false;
++
++	rsel = hw->soc->pin_rsel;
++
++	for (check = 0; check <= hw->soc->npin_rsel - 1; check++) {
++		if (desc->number >= rsel[check].s_pin &&
++		    desc->number <= rsel[check].e_pin) {
++			if (pullup) {
++				if (rsel[check].up_rsel == arg) {
++					found = true;
++					*rsel_val = rsel[check].rsel_index;
++					break;
++				}
++			} else {
++				if (rsel[check].down_rsel == arg) {
++					found = true;
++					*rsel_val = rsel[check].rsel_index;
++					break;
++				}
++			}
++		}
++	}
++
++	if (!found) {
++		dev_err(hw->dev, "Not support rsel value %d Ohm for pin = %d (%s)\n",
++			arg, desc->number, desc->name);
++		return -ENOTSUPP;
++	}
++
++	return 0;
++}
++
++static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw,
++				     const struct mtk_pin_desc *desc,
++				     u32 pullup, u32 arg)
++{
++	int err, rsel_val;
++
++	if (hw->rsel_si_unit) {
++		/* find pin rsel_index from pin_rsel array*/
++		err = mtk_hw_pin_rsel_lookup(hw, desc, pullup, arg, &rsel_val);
++		if (err)
++			goto out;
++	} else {
++		if (arg < MTK_PULL_SET_RSEL_000 ||
++		    arg > MTK_PULL_SET_RSEL_111) {
++			err = -EINVAL;
++			goto out;
++		}
++
++		rsel_val = arg - MTK_PULL_SET_RSEL_000;
++	}
++
++	err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL, rsel_val);
++	if (err)
++		goto out;
++
++	err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, MTK_ENABLE);
++
++out:
++	return err;
++}
++
++int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
++			       const struct mtk_pin_desc *desc,
++			       u32 pullup, u32 arg)
++{
++	int err = -ENOTSUPP;
++	u32 try_all_type;
++
++	if (hw->soc->pull_type)
++		try_all_type = hw->soc->pull_type[desc->number];
++	else
++		try_all_type = MTK_PULL_TYPE_MASK;
++
++	if (try_all_type & MTK_PULL_RSEL_TYPE) {
++		err = mtk_pinconf_bias_set_rsel(hw, desc, pullup, arg);
++		if (!err)
++			return err;
++	}
++
++	if (try_all_type & MTK_PULL_PU_PD_TYPE) {
++		err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg);
++		if (!err)
++			return err;
++	}
++
++	if (try_all_type & MTK_PULL_PULLSEL_TYPE) {
++		err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc,
++							  pullup, arg);
++		if (!err)
++			return err;
++	}
++
++	if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE)
++		err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg);
++
++	if (err)
++		dev_err(hw->dev, "Invalid pull argument\n");
++
++	return err;
++}
++EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);
++
++static int mtk_rsel_get_si_unit(struct mtk_pinctrl *hw,
++				const struct mtk_pin_desc *desc,
++				u32 pullup, u32 rsel_val, u32 *si_unit)
++{
++	const struct mtk_pin_rsel *rsel;
++	int check;
++
++	rsel = hw->soc->pin_rsel;
++
++	for (check = 0; check <= hw->soc->npin_rsel - 1; check++) {
++		if (desc->number >= rsel[check].s_pin &&
++		    desc->number <= rsel[check].e_pin) {
++			if (rsel_val == rsel[check].rsel_index) {
++				if (pullup)
++					*si_unit = rsel[check].up_rsel;
++				else
++					*si_unit = rsel[check].down_rsel;
++				break;
++			}
++		}
++	}
++
++	return 0;
++}
++
++static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw,
++				     const struct mtk_pin_desc *desc,
++				     u32 *pullup, u32 *enable)
++{
++	int pu, pd, rsel, err;
++
++	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL, &rsel);
++	if (err)
++		goto out;
++
++	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu);
++	if (err)
++		goto out;
++
++	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd);
++
++	if (pu == 0 && pd == 0) {
++		*pullup = 0;
++		*enable = MTK_DISABLE;
++	} else if (pu == 1 && pd == 0) {
++		*pullup = 1;
++		if (hw->rsel_si_unit)
++			mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable);
++		else
++			*enable = rsel + MTK_PULL_SET_RSEL_000;
++	} else if (pu == 0 && pd == 1) {
++		*pullup = 0;
++		if (hw->rsel_si_unit)
++			mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable);
++		else
++			*enable = rsel + MTK_PULL_SET_RSEL_000;
++	} else {
++		err = -EINVAL;
++		goto out;
++	}
++
++out:
++	return err;
++}
++
+ static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw,
+ 				const struct mtk_pin_desc *desc,
+ 				u32 *pullup, u32 *enable)
+@@ -746,44 +921,40 @@ out:
+ 	return err;
+ }
+ 
+-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
+-				const struct mtk_pin_desc *desc,
+-				u32 pullup, u32 arg)
+-{
+-	int err;
+-
+-	err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg);
+-	if (!err)
+-		goto out;
+-
+-	err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, pullup, arg);
+-	if (!err)
+-		goto out;
+-
+-	err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg);
+-
+-out:
+-	return err;
+-}
+-EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);
+-
+ int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw,
+ 			      const struct mtk_pin_desc *desc,
+ 			      u32 *pullup, u32 *enable)
+ {
+-	int err;
++	int err = -ENOTSUPP;
++	u32 try_all_type;
+ 
+-	err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable);
+-	if (!err)
+-		goto out;
++	if (hw->soc->pull_type)
++		try_all_type = hw->soc->pull_type[desc->number];
++	else
++		try_all_type = MTK_PULL_TYPE_MASK;
+ 
+-	err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, pullup, enable);
+-	if (!err)
+-		goto out;
++	if (try_all_type & MTK_PULL_RSEL_TYPE) {
++		err = mtk_pinconf_bias_get_rsel(hw, desc, pullup, enable);
++		if (!err)
++			return err;
++	}
++
++	if (try_all_type & MTK_PULL_PU_PD_TYPE) {
++		err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable);
++		if (!err)
++			return err;
++	}
++
++	if (try_all_type & MTK_PULL_PULLSEL_TYPE) {
++		err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc,
++							  pullup, enable);
++		if (!err)
++			return err;
++	}
+ 
+-	err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable);
++	if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE)
++		err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable);
+ 
+-out:
+ 	return err;
+ }
+ EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo);
+--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
++++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+@@ -17,6 +17,22 @@
+ #define MTK_ENABLE     1
+ #define MTK_PULLDOWN   0
+ #define MTK_PULLUP     1
++#define MTK_PULL_PU_PD_TYPE		BIT(0)
++#define MTK_PULL_PULLSEL_TYPE		BIT(1)
++#define MTK_PULL_PUPD_R1R0_TYPE		BIT(2)
++/* MTK_PULL_RSEL_TYPE can select resistance and can be
++ * turned on/off itself. But it can't be selected pull up/down
++ */
++#define MTK_PULL_RSEL_TYPE		BIT(3)
++/* MTK_PULL_PU_PD_RSEL_TYPE is a type which is controlled by
++ * MTK_PULL_PU_PD_TYPE and MTK_PULL_RSEL_TYPE.
++ */
++#define MTK_PULL_PU_PD_RSEL_TYPE	(MTK_PULL_PU_PD_TYPE \
++					| MTK_PULL_RSEL_TYPE)
++#define MTK_PULL_TYPE_MASK	(MTK_PULL_PU_PD_TYPE |\
++				 MTK_PULL_PULLSEL_TYPE |\
++				 MTK_PULL_PUPD_R1R0_TYPE |\
++				 MTK_PULL_RSEL_TYPE)
+ 
+ #define EINT_NA	U16_MAX
+ #define NO_EINT_SUPPORT	EINT_NA
+@@ -42,6 +58,14 @@
+ 	PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit,	\
+ 		       _x_bits, 32, 1)
+ 
++#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl, _down_rsel) {	\
++		.s_pin = _s_pin,					\
++		.e_pin = _e_pin,					\
++		.rsel_index = _rsel_index,				\
++		.up_rsel = _up_resl,					\
++		.down_rsel = _down_rsel,				\
++	}
++
+ /* List these attributes which could be modified for the pin */
+ enum {
+ 	PINCTRL_PIN_REG_MODE,
+@@ -67,6 +91,7 @@ enum {
+ 	PINCTRL_PIN_REG_DRV_E0,
+ 	PINCTRL_PIN_REG_DRV_E1,
+ 	PINCTRL_PIN_REG_DRV_ADV,
++	PINCTRL_PIN_REG_RSEL,
+ 	PINCTRL_PIN_REG_MAX,
+ };
+ 
+@@ -129,6 +154,22 @@ struct mtk_pin_field_calc {
+ 	u8  fixed;
+ };
+ 
++/**
++ * struct mtk_pin_rsel - the structure that provides bias resistance selection.
++ * @s_pin:		the start pin within the rsel range
++ * @e_pin:		the end pin within the rsel range
++ * @rsel_index:	the rsel bias resistance index
++ * @up_rsel:	the pullup rsel bias resistance value
++ * @down_rsel:	the pulldown rsel bias resistance value
++ */
++struct mtk_pin_rsel {
++	u16 s_pin;
++	u16 e_pin;
++	u16 rsel_index;
++	u32 up_rsel;
++	u32 down_rsel;
++};
++
+ /* struct mtk_pin_reg_calc - the structure that holds all ranges used to
+  *			     determine which register the pin would make use of
+  *			     for certain pin attribute.
+@@ -206,6 +247,9 @@ struct mtk_pin_soc {
+ 	bool				ies_present;
+ 	const char * const		*base_names;
+ 	unsigned int			nbase_names;
++	const unsigned int		*pull_type;
++	const struct mtk_pin_rsel	*pin_rsel;
++	unsigned int			npin_rsel;
+ 
+ 	/* Specific pinconfig operations */
+ 	int (*bias_disable_set)(struct mtk_pinctrl *hw,
+@@ -254,6 +298,8 @@ struct mtk_pinctrl {
+ 	const char          **grp_names;
+ 	/* lock pin's register resource to avoid multiple threads issue*/
+ 	spinlock_t lock;
++	/* identify rsel setting by si unit or rsel define in dts node */
++	bool rsel_si_unit;
+ };
+ 
+ void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set);
+--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
++++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
+@@ -574,8 +574,9 @@ static int mtk_hw_get_value_wrap(struct
+ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
+ 	unsigned int gpio, char *buf, unsigned int buf_len)
+ {
+-	int pinmux, pullup = 0, pullen = 0, len = 0, r1 = -1, r0 = -1;
++	int pinmux, pullup = 0, pullen = 0, len = 0, r1 = -1, r0 = -1, rsel = -1;
+ 	const struct mtk_pin_desc *desc;
++	u32 try_all_type;
+ 
+ 	if (gpio >= hw->soc->npins)
+ 		return -EINVAL;
+@@ -589,24 +590,39 @@ ssize_t mtk_pctrl_show_one_pin(struct mt
+ 		pinmux -= hw->soc->nfuncs;
+ 
+ 	mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
+-	if (pullen == MTK_PUPD_SET_R1R0_00) {
+-		pullen = 0;
+-		r1 = 0;
+-		r0 = 0;
+-	} else if (pullen == MTK_PUPD_SET_R1R0_01) {
+-		pullen = 1;
+-		r1 = 0;
+-		r0 = 1;
+-	} else if (pullen == MTK_PUPD_SET_R1R0_10) {
+-		pullen = 1;
+-		r1 = 1;
+-		r0 = 0;
+-	} else if (pullen == MTK_PUPD_SET_R1R0_11) {
++
++	if (hw->soc->pull_type)
++		try_all_type = hw->soc->pull_type[desc->number];
++
++	if (hw->rsel_si_unit && (try_all_type & MTK_PULL_RSEL_TYPE)) {
++		rsel = pullen;
+ 		pullen = 1;
+-		r1 = 1;
+-		r0 = 1;
+-	} else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
+-		pullen = 0;
++	} else {
++		/* Case for: R1R0 */
++		if (pullen == MTK_PUPD_SET_R1R0_00) {
++			pullen = 0;
++			r1 = 0;
++			r0 = 0;
++		} else if (pullen == MTK_PUPD_SET_R1R0_01) {
++			pullen = 1;
++			r1 = 0;
++			r0 = 1;
++		} else if (pullen == MTK_PUPD_SET_R1R0_10) {
++			pullen = 1;
++			r1 = 1;
++			r0 = 0;
++		} else if (pullen == MTK_PUPD_SET_R1R0_11) {
++			pullen = 1;
++			r1 = 1;
++			r0 = 1;
++		}
++
++		/* Case for: RSEL */
++		if (pullen >= MTK_PULL_SET_RSEL_000 &&
++		    pullen <= MTK_PULL_SET_RSEL_111) {
++			rsel = pullen - MTK_PULL_SET_RSEL_000;
++			pullen = 1;
++		}
+ 	}
+ 	len += scnprintf(buf + len, buf_len - len,
+ 			"%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
+@@ -624,6 +640,8 @@ ssize_t mtk_pctrl_show_one_pin(struct mt
+ 	if (r1 != -1) {
+ 		len += scnprintf(buf + len, buf_len - len, " (%1d %1d)\n",
+ 			r1, r0);
++	} else if (rsel != -1) {
++		len += scnprintf(buf + len, buf_len - len, " (%1d)\n", rsel);
+ 	} else {
+ 		len += scnprintf(buf + len, buf_len - len, "\n");
+ 	}
+@@ -966,6 +984,12 @@ int mtk_paris_pinctrl_probe(struct platf
+ 
+ 	hw->nbase = hw->soc->nbase_names;
+ 
++	if (of_find_property(hw->dev->of_node,
++			     "mediatek,rsel_resistance_in_si_unit", NULL))
++		hw->rsel_si_unit = true;
++	else
++		hw->rsel_si_unit = false;
++
+ 	spin_lock_init(&hw->lock);
+ 
+ 	err = mtk_pctrl_build_state(pdev);

target/linux/mediatek/patches-5.15/823-v5.17-pinctrl-mediatek-add-a-check-for-error-in-mtk_pincon.patch

@@ -0,0 +1,31 @@
+From 9f9d17c228c89e38ed612500126daf626270be9a Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Sat, 27 Nov 2021 17:08:36 +0300
+Subject: [PATCH] pinctrl: mediatek: add a check for error in
+ mtk_pinconf_bias_get_rsel()
+
+All the other mtk_hw_get_value() calls have a check for "if (err)" so
+we can add one here as well.  This silences a Smatch warning:
+
+    drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c:819 mtk_pinconf_bias_get_rsel()
+    error: uninitialized symbol 'pd'.
+
+Fixes: fb34a9ae383a ("pinctrl: mediatek: support rsel feature")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Link: https://lore.kernel.org/r/20211127140836.GB24002@kili
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+@@ -815,6 +815,8 @@ static int mtk_pinconf_bias_get_rsel(str
+ 		goto out;
+ 
+ 	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd);
++	if (err)
++		goto out;
+ 
+ 	if (pu == 0 && pd == 0) {
+ 		*pullup = 0;

target/linux/mediatek/patches-5.15/824-v6.1-pinctrl-mediatek-Fix-EINT-pins-input-debounce-time-c.patch

@@ -0,0 +1,297 @@
+From e1ff91f9d2303cd4e706cc908bfca21cd17b9927 Mon Sep 17 00:00:00 2001
+From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+Date: Fri, 11 Nov 2022 10:41:06 +0100
+Subject: [PATCH] pinctrl: mediatek: Fix EINT pins input debounce time
+ configuration
+
+The External Interrupt Controller (EINTC) on all of the supported
+MediaTek SoCs does support input debouncing, but not all of them
+index the debounce time values (DBNC_SETTING registers) the same way.
+
+Before this change, in some cases, as an example, requesting a debounce
+time of 16 milliseconds would mistakenly set the relative DBNC_SETTING
+register to 0x2, resulting in a way shorter debounce time of 500uS.
+
+To fix the aforementioned issue, define three different debounce_time
+arrays, reflecting the correct register index for each value and for
+each register index variant, and make sure that each SoC pinctrl
+driver uses the right one.
+
+Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+Link: https://lore.kernel.org/r/20221111094106.18486-1-angelogioacchino.delregno@collabora.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ drivers/pinctrl/mediatek/mtk-eint.c       | 31 +++++++++++++++++++----
+ drivers/pinctrl/mediatek/mtk-eint.h       |  6 +++++
+ drivers/pinctrl/mediatek/pinctrl-mt2701.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt2712.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt6765.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt6779.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt7622.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt7623.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt7629.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt8127.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt8135.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt8167.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt8173.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt8183.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt8192.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt8195.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt8365.c |  1 +
+ drivers/pinctrl/mediatek/pinctrl-mt8516.c |  1 +
+ 22 files changed, 53 insertions(+), 5 deletions(-)
+
+--- a/drivers/pinctrl/mediatek/mtk-eint.c
++++ b/drivers/pinctrl/mediatek/mtk-eint.c
+@@ -24,6 +24,7 @@
+ #define MTK_EINT_EDGE_SENSITIVE           0
+ #define MTK_EINT_LEVEL_SENSITIVE          1
+ #define MTK_EINT_DBNC_SET_DBNC_BITS	  4
++#define MTK_EINT_DBNC_MAX		  16
+ #define MTK_EINT_DBNC_RST_BIT		  (0x1 << 1)
+ #define MTK_EINT_DBNC_SET_EN		  (0x1 << 0)
+ 
+@@ -48,6 +49,18 @@ static const struct mtk_eint_regs mtk_ge
+ 	.dbnc_clr  = 0x700,
+ };
+ 
++const unsigned int debounce_time_mt2701[] = {
++	500, 1000, 16000, 32000, 64000, 128000, 256000, 0
++};
++
++const unsigned int debounce_time_mt6765[] = {
++	125, 250, 500, 1000, 16000, 32000, 64000, 128000, 256000, 512000, 0
++};
++
++const unsigned int debounce_time_mt6795[] = {
++	500, 1000, 16000, 32000, 64000, 128000, 256000, 512000, 0
++};
++
+ static void __iomem *mtk_eint_get_offset(struct mtk_eint *eint,
+ 					 unsigned int eint_num,
+ 					 unsigned int offset)
+@@ -407,10 +420,11 @@ int mtk_eint_set_debounce(struct mtk_ein
+ 	int virq, eint_offset;
+ 	unsigned int set_offset, bit, clr_bit, clr_offset, rst, i, unmask,
+ 		     dbnc;
+-	static const unsigned int debounce_time[] = {500, 1000, 16000, 32000,
+-						     64000, 128000, 256000};
+ 	struct irq_data *d;
+ 
++	if (!eint->hw->db_time)
++		return -EOPNOTSUPP;
++
+ 	virq = irq_find_mapping(eint->domain, eint_num);
+ 	eint_offset = (eint_num % 4) * 8;
+ 	d = irq_get_irq_data(virq);
+@@ -421,9 +435,9 @@ int mtk_eint_set_debounce(struct mtk_ein
+ 	if (!mtk_eint_can_en_debounce(eint, eint_num))
+ 		return -EINVAL;
+ 
+-	dbnc = ARRAY_SIZE(debounce_time);
+-	for (i = 0; i < ARRAY_SIZE(debounce_time); i++) {
+-		if (debounce <= debounce_time[i]) {
++	dbnc = eint->num_db_time;
++	for (i = 0; i < eint->num_db_time; i++) {
++		if (debounce <= eint->hw->db_time[i]) {
+ 			dbnc = i;
+ 			break;
+ 		}
+@@ -497,6 +511,13 @@ int mtk_eint_do_init(struct mtk_eint *ei
+ 	if (!eint->domain)
+ 		return -ENOMEM;
+ 
++	if (eint->hw->db_time) {
++		for (i = 0; i < MTK_EINT_DBNC_MAX; i++)
++			if (eint->hw->db_time[i] == 0)
++				break;
++		eint->num_db_time = i;
++	}
++
+ 	mtk_eint_hw_init(eint);
+ 	for (i = 0; i < eint->hw->ap_num; i++) {
+ 		int virq = irq_create_mapping(eint->domain, i);
+--- a/drivers/pinctrl/mediatek/mtk-eint.h
++++ b/drivers/pinctrl/mediatek/mtk-eint.h
+@@ -37,8 +37,13 @@ struct mtk_eint_hw {
+ 	u8		ports;
+ 	unsigned int	ap_num;
+ 	unsigned int	db_cnt;
++	const unsigned int *db_time;
+ };
+ 
++extern const unsigned int debounce_time_mt2701[];
++extern const unsigned int debounce_time_mt6765[];
++extern const unsigned int debounce_time_mt6795[];
++
+ struct mtk_eint;
+ 
+ struct mtk_eint_xt {
+@@ -62,6 +67,7 @@ struct mtk_eint {
+ 	/* Used to fit into various EINT device */
+ 	const struct mtk_eint_hw *hw;
+ 	const struct mtk_eint_regs *regs;
++	u16 num_db_time;
+ 
+ 	/* Used to fit into various pinctrl device */
+ 	void *pctl;
+--- a/drivers/pinctrl/mediatek/pinctrl-mt2701.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt2701.c
+@@ -531,6 +531,7 @@ static const struct mtk_pinctrl_devdata
+ 		.ports     = 6,
+ 		.ap_num    = 169,
+ 		.db_cnt    = 16,
++		.db_time   = debounce_time_mt2701,
+ 	},
+ };
+ 
+--- a/drivers/pinctrl/mediatek/pinctrl-mt2712.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt2712.c
+@@ -584,6 +584,7 @@ static const struct mtk_pinctrl_devdata
+ 		.ports     = 8,
+ 		.ap_num    = 229,
+ 		.db_cnt    = 40,
++		.db_time   = debounce_time_mt2701,
+ 	},
+ };
+ 
+--- a/drivers/pinctrl/mediatek/pinctrl-mt6765.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt6765.c
+@@ -1062,6 +1062,7 @@ static const struct mtk_eint_hw mt6765_e
+ 	.ports     = 6,
+ 	.ap_num    = 160,
+ 	.db_cnt    = 13,
++	.db_time   = debounce_time_mt6765,
+ };
+ 
+ static const struct mtk_pin_soc mt6765_data = {
+--- a/drivers/pinctrl/mediatek/pinctrl-mt6779.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt6779.c
+@@ -737,6 +737,7 @@ static const struct mtk_eint_hw mt6779_e
+ 	.ports     = 6,
+ 	.ap_num    = 195,
+ 	.db_cnt    = 13,
++	.db_time   = debounce_time_mt2701,
+ };
+ 
+ static const struct mtk_pin_soc mt6779_data = {
+--- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c
+@@ -846,6 +846,7 @@ static const struct mtk_eint_hw mt7622_e
+ 	.ports     = 7,
+ 	.ap_num    = ARRAY_SIZE(mt7622_pins),
+ 	.db_cnt    = 20,
++	.db_time   = debounce_time_mt6765,
+ };
+ 
+ static const struct mtk_pin_soc mt7622_data = {
+--- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c
+@@ -1369,6 +1369,7 @@ static const struct mtk_eint_hw mt7623_e
+ 	.ports     = 6,
+ 	.ap_num    = 169,
+ 	.db_cnt    = 20,
++	.db_time   = debounce_time_mt2701,
+ };
+ 
+ static struct mtk_pin_soc mt7623_data = {
+--- a/drivers/pinctrl/mediatek/pinctrl-mt7629.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt7629.c
+@@ -402,6 +402,7 @@ static const struct mtk_eint_hw mt7629_e
+ 	.ports     = 7,
+ 	.ap_num    = ARRAY_SIZE(mt7629_pins),
+ 	.db_cnt    = 16,
++	.db_time   = debounce_time_mt2701,
+ };
+ 
+ static struct mtk_pin_soc mt7629_data = {
+--- a/drivers/pinctrl/mediatek/pinctrl-mt8127.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt8127.c
+@@ -300,6 +300,7 @@ static const struct mtk_pinctrl_devdata
+ 		.ports     = 6,
+ 		.ap_num    = 143,
+ 		.db_cnt    = 16,
++		.db_time = debounce_time_mt2701,
+ 	},
+ };
+ 
+--- a/drivers/pinctrl/mediatek/pinctrl-mt8135.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt8135.c
+@@ -313,6 +313,7 @@ static const struct mtk_pinctrl_devdata
+ 		.ports     = 6,
+ 		.ap_num    = 192,
+ 		.db_cnt    = 16,
++		.db_time = debounce_time_mt2701,
+ 	},
+ };
+ 
+--- a/drivers/pinctrl/mediatek/pinctrl-mt8167.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt8167.c
+@@ -332,6 +332,7 @@ static const struct mtk_pinctrl_devdata
+ 		.ports     = 6,
+ 		.ap_num    = 169,
+ 		.db_cnt    = 64,
++		.db_time = debounce_time_mt6795,
+ 	},
+ };
+ 
+--- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c
+@@ -340,6 +340,7 @@ static const struct mtk_pinctrl_devdata
+ 		.ports     = 6,
+ 		.ap_num    = 224,
+ 		.db_cnt    = 16,
++		.db_time   = debounce_time_mt2701,
+ 	},
+ };
+ 
+--- a/drivers/pinctrl/mediatek/pinctrl-mt8183.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt8183.c
+@@ -545,6 +545,7 @@ static const struct mtk_eint_hw mt8183_e
+ 	.ports     = 6,
+ 	.ap_num    = 212,
+ 	.db_cnt    = 13,
++	.db_time   = debounce_time_mt6765,
+ };
+ 
+ static const struct mtk_pin_soc mt8183_data = {
+--- a/drivers/pinctrl/mediatek/pinctrl-mt8192.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt8192.c
+@@ -1339,6 +1339,7 @@ static const struct mtk_eint_hw mt8192_e
+ 	.ports     = 7,
+ 	.ap_num    = 224,
+ 	.db_cnt    = 32,
++	.db_time   = debounce_time_mt6765,
+ };
+ 
+ static const struct mtk_pin_reg_calc mt8192_reg_cals[PINCTRL_PIN_REG_MAX] = {
+--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+@@ -805,6 +805,7 @@ static const struct mtk_eint_hw mt8195_e
+ 	.ports     = 7,
+ 	.ap_num    = 225,
+ 	.db_cnt    = 32,
++	.db_time   = debounce_time_mt6765,
+ };
+ 
+ static const struct mtk_pin_soc mt8195_data = {
+--- a/drivers/pinctrl/mediatek/pinctrl-mt8365.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt8365.c
+@@ -466,6 +466,7 @@ static const struct mtk_pinctrl_devdata
+ 		.ports     = 5,
+ 		.ap_num = 160,
+ 		.db_cnt = 160,
++		.db_time   = debounce_time_mt6765,
+ 	},
+ };
+ 
+--- a/drivers/pinctrl/mediatek/pinctrl-mt8516.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt8516.c
+@@ -332,6 +332,7 @@ static const struct mtk_pinctrl_devdata
+ 		.ports     = 6,
+ 		.ap_num    = 169,
+ 		.db_cnt    = 64,
++		.db_time   = debounce_time_mt6795,
+ 	},
+ };
+ 

target/linux/mediatek/patches-5.15/825-v6.1-pinctrl-mediatek-Export-debounce-time-tables.patch

@@ -0,0 +1,37 @@
+From 2e35b25dd8e666b8619355fc3defb1b246a5dc02 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Tue, 15 Nov 2022 09:11:07 +0100
+Subject: [PATCH] pinctrl: mediatek: Export debounce time tables
+
+The kernel test robot complains that in certain combinations
+when building the Mediatek drivers as modules we lack some
+debounce table symbols, so export them.
+
+Reported-by: kernel test robot <lkp@intel.com>
+Fixes: e1ff91f9d230 ("pinctrl: mediatek: Fix EINT pins input debounce time configuration")
+Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ drivers/pinctrl/mediatek/mtk-eint.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/pinctrl/mediatek/mtk-eint.c
++++ b/drivers/pinctrl/mediatek/mtk-eint.c
+@@ -52,14 +52,17 @@ static const struct mtk_eint_regs mtk_ge
+ const unsigned int debounce_time_mt2701[] = {
+ 	500, 1000, 16000, 32000, 64000, 128000, 256000, 0
+ };
++EXPORT_SYMBOL_GPL(debounce_time_mt2701);
+ 
+ const unsigned int debounce_time_mt6765[] = {
+ 	125, 250, 500, 1000, 16000, 32000, 64000, 128000, 256000, 512000, 0
+ };
++EXPORT_SYMBOL_GPL(debounce_time_mt6765);
+ 
+ const unsigned int debounce_time_mt6795[] = {
+ 	500, 1000, 16000, 32000, 64000, 128000, 256000, 512000, 0
+ };
++EXPORT_SYMBOL_GPL(debounce_time_mt6795);
+ 
+ static void __iomem *mtk_eint_get_offset(struct mtk_eint *eint,
+ 					 unsigned int eint_num,

target/linux/mediatek/patches-5.15/826-v6.2-pinctrl-mediatek-extend-pinctrl-moore-to-support-new.patch

@@ -0,0 +1,129 @@
+From fae82621ac33e2a4a96220c56e90d1ec6237d394 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Sun, 6 Nov 2022 09:01:12 +0100
+Subject: [PATCH] pinctrl: mediatek: extend pinctrl-moore to support new bias
+ functions
+
+Commit fb34a9ae383a ("pinctrl: mediatek: support rsel feature")
+introduced SoC specify 'pull_type' attribute to mtk_pinconf_bias_set_combo
+and mtk_pinconf_bias_get_combo, and make the functions able to support
+almost all Mediatek SoCs that use pinctrl-mtk-common-v2.c.
+
+This patch enables pinctrl_moore to support these functions.
+
+Signed-off-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+Link: https://lore.kernel.org/r/20221106080114.7426-6-linux@fw-web.de
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ drivers/pinctrl/mediatek/pinctrl-moore.c | 49 ++++++++++++++++++++----
+ 1 file changed, 42 insertions(+), 7 deletions(-)
+
+--- a/drivers/pinctrl/mediatek/pinctrl-moore.c
++++ b/drivers/pinctrl/mediatek/pinctrl-moore.c
+@@ -8,6 +8,7 @@
+  *
+  */
+ 
++#include <dt-bindings/pinctrl/mt65xx.h>
+ #include <linux/gpio/driver.h>
+ #include "pinctrl-moore.h"
+ 
+@@ -105,7 +106,7 @@ static int mtk_pinconf_get(struct pinctr
+ {
+ 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
+ 	u32 param = pinconf_to_config_param(*config);
+-	int val, val2, err, reg, ret = 1;
++	int val, val2, err, pullup, reg, ret = 1;
+ 	const struct mtk_pin_desc *desc;
+ 
+ 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
+@@ -114,7 +115,13 @@ static int mtk_pinconf_get(struct pinctr
+ 
+ 	switch (param) {
+ 	case PIN_CONFIG_BIAS_DISABLE:
+-		if (hw->soc->bias_disable_get) {
++		if (hw->soc->bias_get_combo) {
++			err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
++			if (err)
++				return err;
++			if (ret != MTK_PUPD_SET_R1R0_00 && ret != MTK_DISABLE)
++				return -EINVAL;
++		} else if (hw->soc->bias_disable_get) {
+ 			err = hw->soc->bias_disable_get(hw, desc, &ret);
+ 			if (err)
+ 				return err;
+@@ -123,7 +130,15 @@ static int mtk_pinconf_get(struct pinctr
+ 		}
+ 		break;
+ 	case PIN_CONFIG_BIAS_PULL_UP:
+-		if (hw->soc->bias_get) {
++		if (hw->soc->bias_get_combo) {
++			err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
++			if (err)
++				return err;
++			if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE)
++				return -EINVAL;
++			if (!pullup)
++				return -EINVAL;
++		} else if (hw->soc->bias_get) {
+ 			err = hw->soc->bias_get(hw, desc, 1, &ret);
+ 			if (err)
+ 				return err;
+@@ -132,7 +147,15 @@ static int mtk_pinconf_get(struct pinctr
+ 		}
+ 		break;
+ 	case PIN_CONFIG_BIAS_PULL_DOWN:
+-		if (hw->soc->bias_get) {
++		if (hw->soc->bias_get_combo) {
++			err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
++			if (err)
++				return err;
++			if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE)
++				return -EINVAL;
++			if (pullup)
++				return -EINVAL;
++		} else if (hw->soc->bias_get) {
+ 			err = hw->soc->bias_get(hw, desc, 0, &ret);
+ 			if (err)
+ 				return err;
+@@ -235,7 +258,11 @@ static int mtk_pinconf_set(struct pinctr
+ 
+ 		switch (param) {
+ 		case PIN_CONFIG_BIAS_DISABLE:
+-			if (hw->soc->bias_disable_set) {
++			if (hw->soc->bias_set_combo) {
++				err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE);
++				if (err)
++					return err;
++			} else if (hw->soc->bias_disable_set) {
+ 				err = hw->soc->bias_disable_set(hw, desc);
+ 				if (err)
+ 					return err;
+@@ -244,7 +271,11 @@ static int mtk_pinconf_set(struct pinctr
+ 			}
+ 			break;
+ 		case PIN_CONFIG_BIAS_PULL_UP:
+-			if (hw->soc->bias_set) {
++			if (hw->soc->bias_set_combo) {
++				err = hw->soc->bias_set_combo(hw, desc, 1, arg);
++				if (err)
++					return err;
++			} else if (hw->soc->bias_set) {
+ 				err = hw->soc->bias_set(hw, desc, 1);
+ 				if (err)
+ 					return err;
+@@ -253,7 +284,11 @@ static int mtk_pinconf_set(struct pinctr
+ 			}
+ 			break;
+ 		case PIN_CONFIG_BIAS_PULL_DOWN:
+-			if (hw->soc->bias_set) {
++			if (hw->soc->bias_set_combo) {
++				err = hw->soc->bias_set_combo(hw, desc, 0, arg);
++				if (err)
++					return err;
++			} else if (hw->soc->bias_set) {
+ 				err = hw->soc->bias_set(hw, desc, 0);
+ 				if (err)
+ 					return err;

target/linux/mvebu/patches-5.10/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch

@@ -0,0 +1,63 @@
+--- a/drivers/mfd/iei-wt61p803-puzzle.c
++++ b/drivers/mfd/iei-wt61p803-puzzle.c
+@@ -241,6 +241,7 @@ int iei_wt61p803_puzzle_write_command(st
+ {
+ 	struct device *dev = &mcu->serdev->dev;
+ 	int ret;
++	int retries;
+ 
+ 	if (size <= 1 || size > IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH)
+ 		return -EINVAL;
+@@ -252,24 +253,36 @@ int iei_wt61p803_puzzle_write_command(st
+ 	print_hex_dump_debug("puzzle-mcu tx: ", DUMP_PREFIX_NONE,
+ 			     16, 1, cmd, size, false);
+ 
++	retries = 3;
+ 	/* Initialize reply struct */
+-	reinit_completion(&mcu->reply->received);
+-	mcu->reply->size = 0;
+-	usleep_range(2000, 10000);
+-	serdev_device_write_flush(mcu->serdev);
+-	ret = serdev_device_write_buf(mcu->serdev, cmd, size);
+-	if (ret < 0)
+-		goto exit;
+-
+-	serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT);
+-	ret = wait_for_completion_timeout(&mcu->reply->received,
+-					  IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT);
+-	if (ret == 0) {
+-		dev_err(dev, "Command reply receive timeout\n");
+-		ret = -ETIMEDOUT;
+-		goto exit;
++	while (retries) {
++		reinit_completion(&mcu->reply->received);
++		mcu->reply->size = 0;
++		usleep_range(2000, 10000);
++		serdev_device_write_flush(mcu->serdev);
++		ret = serdev_device_write_buf(mcu->serdev, cmd, size);
++		if (ret < 0)
++			goto exit;
++
++		serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT);
++		ret = wait_for_completion_timeout(&mcu->reply->received,
++						  IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT);
++		retries--;
++		if (ret == 0) {
++			if (retries == 0) {
++				dev_err(dev, "Command reply receive timeout\n");
++				ret = -ETIMEDOUT;
++				goto exit;
++			}
++		}
++		else {
++			if (mcu->reply->data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START &&
++				mcu->reply->data[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK &&
++				mcu->reply->data[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK) {
++				break;
++			}
++		}
+ 	}
+-
+ 	*reply_size = mcu->reply->size;
+ 	/* Copy the received data, as it will not be available after a new frame is received */
+ 	memcpy(reply_data, mcu->reply->data, mcu->reply->size);

target/linux/mvebu/patches-5.15/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch

@@ -0,0 +1,63 @@
+--- a/drivers/mfd/iei-wt61p803-puzzle.c
++++ b/drivers/mfd/iei-wt61p803-puzzle.c
+@@ -241,6 +241,7 @@ int iei_wt61p803_puzzle_write_command(st
+ {
+ 	struct device *dev = &mcu->serdev->dev;
+ 	int ret;
++	int retries;
+ 
+ 	if (size <= 1 || size > IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH)
+ 		return -EINVAL;
+@@ -252,24 +253,36 @@ int iei_wt61p803_puzzle_write_command(st
+ 	print_hex_dump_debug("puzzle-mcu tx: ", DUMP_PREFIX_NONE,
+ 			     16, 1, cmd, size, false);
+ 
++	retries = 3;
+ 	/* Initialize reply struct */
+-	reinit_completion(&mcu->reply->received);
+-	mcu->reply->size = 0;
+-	usleep_range(2000, 10000);
+-	serdev_device_write_flush(mcu->serdev);
+-	ret = serdev_device_write_buf(mcu->serdev, cmd, size);
+-	if (ret < 0)
+-		goto exit;
+-
+-	serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT);
+-	ret = wait_for_completion_timeout(&mcu->reply->received,
+-					  IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT);
+-	if (ret == 0) {
+-		dev_err(dev, "Command reply receive timeout\n");
+-		ret = -ETIMEDOUT;
+-		goto exit;
++	while (retries) {
++		reinit_completion(&mcu->reply->received);
++		mcu->reply->size = 0;
++		usleep_range(2000, 10000);
++		serdev_device_write_flush(mcu->serdev);
++		ret = serdev_device_write_buf(mcu->serdev, cmd, size);
++		if (ret < 0)
++			goto exit;
++
++		serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT);
++		ret = wait_for_completion_timeout(&mcu->reply->received,
++						  IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT);
++		retries--;
++		if (ret == 0) {
++			if (retries == 0) {
++				dev_err(dev, "Command reply receive timeout\n");
++				ret = -ETIMEDOUT;
++				goto exit;
++			}
++		}
++		else {
++			if (mcu->reply->data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START &&
++				mcu->reply->data[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK &&
++				mcu->reply->data[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK) {
++				break;
++			}
++		}
+ 	}
+-
+ 	*reply_size = mcu->reply->size;
+ 	/* Copy the received data, as it will not be available after a new frame is received */
+ 	memcpy(reply_data, mcu->reply->data, mcu->reply->size);

tools/firmware-utils/Makefile

@@ -11,9 +11,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git
-PKG_SOURCE_DATE:=2023-03-14
+PKG_SOURCE_DATE:=2023-04-09
-PKG_SOURCE_VERSION:=a2c80c586b81efc1662fec23202b88e2790e305e
+PKG_SOURCE_VERSION:=6a58f456109008620dd15267a7ff0594095e0d77
-PKG_MIRROR_HASH:=86d528f5c5e5571d2e3d36da8557913185c252dba9cc18f24d9450a2dcadf744
+PKG_MIRROR_HASH:=ce2df83e2ef548f5ffab972dd6f78ce274a382543284aecf09b88237566120e4
 
 include $(INCLUDE_DIR)/host-build.mk
 include $(INCLUDE_DIR)/cmake.mk

tools/squashfs4/Makefile

@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 PKG_NAME:=squashfs4
 PKG_CPE_ID:=cpe:/a:phillip_lougher:squashfs
 PKG_VERSION:=4.6.1
-PKG_RELEASE=1
+PKG_RELEASE=2
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL:=https://github.com/plougher/squashfs-tools

tools/squashfs4/patches/100-xz_wrapper-support-multiple-lzma-configuration-optio.patch

@@ -1,22 +1,24 @@
-From f49793cfbd72fdc40ab75dbffef42dca774701d1 Mon Sep 17 00:00:00 2001
+From dcb976fe4ee40e4bac8ae0dcc836629c625a6fd4 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth@gmail.com>
 Date: Fri, 14 Oct 2022 15:59:16 +0200
 Subject: [PATCH] xz_wrapper: support multiple lzma configuration options
 
 Add option to configure preset, lc, lp and pb lzma parameters.
--Xpreset can be both a level or set to 'extreme' to use the lzma extreme
+-Xpreset can be used to set the compression level.
-compression options.
+-Xe can be used to set the 'EXTREME' flag to use the lzma compression
+options tweaking additional settings on top of the compression level set.
 
 New option added:
  -Xpreset
+ -Xe
  -Xlc
  -Xlp
  -Xpb
 
 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 ---
- squashfs-tools/xz_wrapper.c | 112 +++++++++++++++++++++++++++++++++++-
+ squashfs-tools/xz_wrapper.c | 119 ++++++++++++++++++++++++++++++++++--
- 1 file changed, 109 insertions(+), 3 deletions(-)
+ 1 file changed, 115 insertions(+), 4 deletions(-)
 
 --- a/squashfs-tools/xz_wrapper.c
 +++ b/squashfs-tools/xz_wrapper.c
@@ -53,26 +55,26 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 +		long val;
 +
 +		if(argc < 2) {
-+			fprintf(stderr, "xz: -Xpreset missing preset-level\n");
++			fprintf(stderr, "xz: -Xpreset missing preset-level "
++				"(valid value 0-9)\n");
 +			goto failed;
 +		}
 +
-+		if (strcmp(argv[1], "extreme") == 0) {
-+			preset = LZMA_PRESET_EXTREME;
-+
-+			return 1;
-+		}
-+
 +		val = strtol(argv[1], &b, 10);
-+		if ((int) val < 0 || (int) val & ~LZMA_PRESET_LEVEL_MASK) {
++		if (*b != '\0' || (int) val < 0 || (int) val & ~LZMA_PRESET_LEVEL_MASK) {
 +			fprintf(stderr, "xz: -Xpreset can't be "
 +				"negative or more than the max preset\n");
 +			goto failed;
 +		}
 +
-+		preset = (int) val;
++		preset &= ~LZMA_PRESET_LEVEL_MASK;
++		preset |= (int) val;
 +
 +		return 1;
++	} else if(strcmp(argv[0], "-Xe") == 0) {
++		preset |= LZMA_PRESET_EXTREME;
++
++		return 0;
 +	} else if(strcmp(argv[0], "-Xlc") == 0) {
 +		char *b;
 +		long val;
@@ -83,7 +85,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 +		}
 +
 +		val = strtol(argv[1], &b, 10);
-+		if ((int) val < LZMA_LCLP_MIN || (int) val > LZMA_LCLP_MAX) {
++		if (*b != '\0' || (int) val < LZMA_LCLP_MIN || (int) val > LZMA_LCLP_MAX) {
 +			fprintf(stderr, "xz: -Xlc invalid value\n");
 +			goto failed;
 +		}
@@ -101,8 +103,8 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 +		}
 +
 +		val = strtol(argv[1], &b, 10);
-+		if ((int) val < LZMA_LCLP_MIN || (int) val > LZMA_LCLP_MAX) {
++		if (*b != '\0' || (int) val < LZMA_LCLP_MIN || (int) val > LZMA_LCLP_MAX) {
-+			fprintf(stderr, "xz: -Xlc invalid value\n");
++			fprintf(stderr, "xz: -Xlp invalid value\n");
 +			goto failed;
 +		}
 +
@@ -119,8 +121,8 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 +		}
 +
 +		val = strtol(argv[1], &b, 10);
-+		if ((int) val < LZMA_PB_MIN || (int) val > LZMA_PB_MAX) {
++		if (*b != '\0' || (int) val < LZMA_PB_MIN || (int) val > LZMA_PB_MAX) {
-+			fprintf(stderr, "xz: -Xlc invalid value\n");
++			fprintf(stderr, "xz: -Xpb invalid value\n");
 +			goto failed;
 +		}
 +
@@ -135,8 +137,9 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  		struct filter *filter = &stream->filter[i];
  
 -        	if(lzma_lzma_preset(&stream->opt, LZMA_PRESET_DEFAULT))
+-                	goto failed;
 +		if(lzma_lzma_preset(&stream->opt, preset))
-                 	goto failed;
++			goto failed;
  
  		stream->opt.dict_size = stream->dictionary_size;
  
@@ -152,16 +155,33 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  		filter->length = 0;
  		res = lzma_stream_buffer_encode(filter->filter,
  			LZMA_CHECK_CRC32, NULL, src, size, filter->buffer,
-@@ -521,6 +617,12 @@ static void xz_usage(FILE *stream)
+@@ -521,13 +617,28 @@ static void xz_usage(FILE *stream)
  	fprintf(stream, " header as either 2^n or as 2^n+2^(n+1).\n\t\t");
  	fprintf(stream, "Example dict-sizes are 75%%, 50%%, 37.5%%, 25%%, or");
  	fprintf(stream, " 32K, 16K, 8K\n\t\tetc.\n");
-+	fprintf(stream, "\t  -Xpreset <preset-level or extreme>\n");
++	fprintf(stream, "\t  -Xpreset <preset-level>\n");
 +	fprintf(stream, "\t\tUse <preset-value> as the custom preset to use");
-+	fprintf(stream, "  on compress. Can be a level number or extreme.\n");
++	fprintf(stream, " on compress.\n\t\t<preset-level> should be 0 .. 9");
++	fprintf(stream, " (default 6)\n");
++	fprintf(stream, "\t  -Xe\n");
++	fprintf(stream, "\t\tEnable additional compression settings by passing");
++	fprintf(stream, " the EXTREME\n\t\tflag to the compression flags.\n");
 +	fprintf(stream, "\t  -Xlc <value>\n");
 +	fprintf(stream, "\t  -Xlp <value>\n");
 +	fprintf(stream, "\t  -Xpb <value>\n");
  }
  
  
+ static int option_args(char *option)
+ {
+ 	if(strcmp(option, "-Xbcj") == 0 ||
+-				strcmp(option, "-Xdict-size") == 0)
++	   strcmp(option, "-Xdict-size") == 0 ||
++	   strcmp(option, "-Xpreset") == 0 ||
++	   strcmp(option, "-Xe") == 0 ||
++	   strcmp(option, "-Xlc") == 0 ||
++	   strcmp(option, "-Xlp") == 0 ||
++	   strcmp(option, "-Xpb") == 0)
+ 		return 1;
+ 
+ 	return 0;