qualcommax: import pending fix for multiple conf
Importing upstream multiple conf patches broke UNIPHY2 TX clock parenting
and thus no traffic could pass via it.
Import pending fix by Christian that fixes this[1].
[1] https://patchwork.kernel.org/project/linux-arm-msm/patch/20250522202600.4028-1-ansuelsmth@gmail.com/
Fixes: cc50cac8a0 ("qualcommax: use upstreamed multiple conf clock patches")
Signed-off-by: Robert Marko <robimarko@gmail.com>
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From: Christian Marangi <ansuelsmth@gmail.com>
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To: Bjorn Andersson <andersson@kernel.org>,
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Cc: stable@vger.kernel.org
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Subject: [PATCH] clk: qcom: gcc-ipq8074: fix broken freq table for
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nss_port6_tx_clk_src
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Date: Thu, 22 May 2025 22:25:55 +0200
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With the conversion done by commit e88f03230dc0 ("clk: qcom: gcc-ipq8074:
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rework nss_port5/6 clock to multiple conf") a Copy-Paste error was made
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for the nss_port6_tx_clk_src frequency table.
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This was caused by the wrong setting of the parent in
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ftbl_nss_port6_tx_clk_src that was wrongly set to P_UNIPHY1_RX instead
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of P_UNIPHY2_TX.
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This cause the UNIPHY2 port to malfunction when it needs to be scaled to
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higher clock. The malfunction was observed with the example scenario
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with an Aquantia 10G PHY connected and a speed higher than 1G (example
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2.5G)
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Fix the broken frequency table to restore original functionality.
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Cc: stable@vger.kernel.org
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Fixes: e88f03230dc0 ("clk: qcom: gcc-ipq8074: rework nss_port5/6 clock to multiple conf")
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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drivers/clk/qcom/gcc-ipq8074.c | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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--- a/drivers/clk/qcom/gcc-ipq8074.c
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+++ b/drivers/clk/qcom/gcc-ipq8074.c
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@@ -1895,10 +1895,10 @@ static const struct freq_conf ftbl_nss_p
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static const struct freq_multi_tbl ftbl_nss_port6_tx_clk_src[] = {
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FMS(19200000, P_XO, 1, 0, 0),
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FM(25000000, ftbl_nss_port6_tx_clk_src_25),
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- FMS(78125000, P_UNIPHY1_RX, 4, 0, 0),
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+ FMS(78125000, P_UNIPHY2_TX, 4, 0, 0),
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FM(125000000, ftbl_nss_port6_tx_clk_src_125),
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- FMS(156250000, P_UNIPHY1_RX, 2, 0, 0),
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- FMS(312500000, P_UNIPHY1_RX, 1, 0, 0),
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+ FMS(156250000, P_UNIPHY2_TX, 2, 0, 0),
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+ FMS(312500000, P_UNIPHY2_TX, 1, 0, 0),
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{ }
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};
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