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qualcommax: ipq50xx: fix uniphy soft reset issue

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The resets in the GCC of the uniphy found in the IPQ5018 SoC are
incorrect which broke the ability to shift between 1G and 2.5G link
speeds. So let's correct the resets based on below two downstream
commits.

In a seperate and prequisite PR to the QCA-SSDK repo, logic has been
implemented to select the right reset based on the link setup so fixed
link scenarios don't break.

Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18774
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
George Moussalem 2025-05-30 09:19:29 +04:00 committed by Robert Marko
parent c3b1c780ad
commit 480268596f
1 changed files with 22 additions and 0 deletions
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target/linux/qualcommax/patches-6.12/0723-clk-qcom-gcc-ipq5018-fix-uniphy-soft-reset-issue.patch Normal file
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@ -0,0 +1,22 @@
From: George Moussalem <george.moussalem@outlook.com>
Date: Fri, 30 May 2025 09:12:23 +0400
Subject: [PATCH] clk: qcom: gcc-ipq5018: fix UNIPHY soft reset issue
The SOFT reset is supposed to trigger a resets across the SYS, RX, and
TX lines of the IPQ5018 UNIPHY. So let's set the bitmask of the reset
definition accordingly in the GCC as per the downstream driver.
Link: https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/036bdc62aca561e8ff94a29c447fc400de2b7304
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
--- a/drivers/clk/qcom/gcc-ipq5018.c
+++ b/drivers/clk/qcom/gcc-ipq5018.c
@@ -3647,7 +3647,7 @@ static const struct qcom_reset_map gcc_i
[GCC_UNIPHY_SYS_ARES] = { 0x56104, 1 },
[GCC_UNIPHY_RX_ARES] = { 0x56104, 4 },
[GCC_UNIPHY_TX_ARES] = { 0x56104, 5 },
- [GCC_UNIPHY_SOFT_RESET] = {0x56104, 0 },
+ [GCC_UNIPHY_SOFT_RESET] = {0x56104, .bitmask = 0x32 },
[GCC_USB0_BCR] = { 0x3e070, 0 },
[GCC_USB0_PHY_BCR] = { 0x3e034, 0 },
[GCC_WCSS_BCR] = { 0x18000, 0 },