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Merge branch 'openwrt:master' into master

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Hayzam Sherif 2023-11-19 17:57:51 +05:30 committed by GitHub
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84 changed files with 2940 additions and 943 deletions
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9
.github/ISSUE_TEMPLATE/bug-report.yml vendored
View file

@ -19,6 +19,15 @@ body:
```. /etc/openwrt_release && echo $DISTRIB_REVISION```
validations:
required: true
- type: input
id: release
attributes:
label: OpenWrt release
description: |
The OpenWrt release or commit hash where this bug occurs (use command below).
```. /etc/openwrt_release && echo $DISTRIB_RELEASE```
validations:
required: true
- type: input
id: target
attributes:

11
.github/workflows/issue-labeller.yml vendored Normal file
View file

@ -0,0 +1,11 @@
name: Issue Labeller
on:
issues:
types: [ opened ]
jobs:
label-component:
name: Validate and Tag Bug Report
permissions:
issues: write
uses: openwrt/actions-shared-workflows/.github/workflows/issue-labeller.yml@main

5
include/image-commands.mk
View file

@ -226,6 +226,11 @@ define Build/copy-file
cat "$(1)" > "$@"
endef
define Build/dlink-sge-image
$(STAGING_DIR_HOST)/bin/dlink-sge-image $(1) $@ $@.enc
mv $@.enc $@
endef
define Build/edimax-header
$(STAGING_DIR_HOST)/bin/mkedimaximg -i $@ -o $@.new $(1)
@mv $@.new $@

4
include/image.mk
View file

@ -40,8 +40,10 @@ IMG_PREFIX_VERCODE:=$(if $(CONFIG_VERSION_CODE_FILENAMES),$(call sanitize,$(VERS
IMG_PREFIX:=$(VERSION_DIST_SANITIZED)-$(IMG_PREFIX_VERNUM)$(IMG_PREFIX_VERCODE)$(IMG_PREFIX_EXTRA)$(BOARD)$(if $(SUBTARGET),-$(SUBTARGET))
IMG_ROOTFS:=$(IMG_PREFIX)-rootfs
IMG_COMBINED:=$(IMG_PREFIX)-combined
ifeq ($(DUMP),)
IMG_PART_SIGNATURE:=$(shell echo $(SOURCE_DATE_EPOCH)$(LINUX_VERMAGIC) | $(MKHASH) md5 | cut -b1-8)
IMG_PART_DISKGUID:=$(shell echo $(SOURCE_DATE_EPOCH)$(LINUX_VERMAGIC) | $(MKHASH) md5 | sed -E 's/(.{8})(.{4})(.{4})(.{4})(.{10})../\1-\2-\3-\4-\500/')
endif
MKFS_DEVTABLE_OPT := -D $(INCLUDE_DIR)/device_table.txt
@ -167,7 +169,9 @@ define Image/pad-to
mv $(1).new $(1)
endef
ifeq ($(DUMP),)
ROOTFS_PARTSIZE=$(shell echo $$(($(CONFIG_TARGET_ROOTFS_PARTSIZE)*1024*1024)))
endif
define Image/pad-root-squashfs
$(call Image/pad-to,$(KDIR)/root.squashfs,$(if $(1),$(1),$(ROOTFS_PARTSIZE)))

3
include/scan.mk
View file

@ -50,7 +50,8 @@ define PackageDir
$$(call progress,Collecting $(SCAN_NAME) info: $(SCAN_DIR)/$(2)) \
echo Source-Makefile: $(SCAN_DIR)/$(2)/Makefile; \
$(if $(3),echo Override: $(3),true); \
$(NO_TRACE_MAKE) --no-print-dir -r DUMP=1 FEED="$(call feedname,$(2))" -C $(SCAN_DIR)/$(2) $(SCAN_MAKEOPTS) 2>/dev/null || { \
$(if $(findstring c,$(OPENWRT_VERBOSE)),$(MAKE),$(NO_TRACE_MAKE) --no-print-dir) -r DUMP=1 FEED="$(call feedname,$(2))" -C $(SCAN_DIR)/$(2) $(SCAN_MAKEOPTS) \
$(if $(findstring c,$(OPENWRT_VERBOSE)),,2>/dev/null) || { \
mkdir -p "$(TOPDIR)/logs/$(SCAN_DIR)/$(2)"; \
$(NO_TRACE_MAKE) --no-print-dir -r DUMP=1 FEED="$(call feedname,$(2))" -C $(SCAN_DIR)/$(2) $(SCAN_MAKEOPTS) > $(TOPDIR)/logs/$(SCAN_DIR)/$(2)/dump.txt 2>&1; \
$$(call progress,ERROR: please fix $(SCAN_DIR)/$(2)/Makefile - see logs/$(SCAN_DIR)/$(2)/dump.txt for details\n) \

3
package/base-files/Makefile
View file

@ -199,7 +199,8 @@ define Package/base-files/install
$(1)/usr/lib \
$(1)/usr/bin \
$(1)/sys \
$(1)/www \
$(1)/www
mkdir -p -m 750 \
$(1)/root
$(LN) /proc/mounts $(1)/etc/mtab

3
package/devel/gdb/Makefile
View file

@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=gdb
PKG_VERSION:=13.2
PKG_RELEASE:=1
PKG_RELEASE:=2
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@GNU/gdb
@ -58,6 +58,7 @@ CONFIGURE_ARGS+= \
--with-system-zlib \
--without-expat \
--without-lzma \
--without-zstd \
--disable-unit-tests \
--disable-ubsan \
--disable-sim \

43
package/firmware/linux-firmware/realtek.mk
View file

@ -86,6 +86,13 @@ define Package/rtl8723bu-firmware/install
endef
$(eval $(call BuildPackage,rtl8723bu-firmware))
Package/rtl8723de-firmware = $(call Package/firmware-default,RealTek RTL8723DE firmware)
define Package/rtl8723de-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/rtw88
$(INSTALL_DATA) $(PKG_BUILD_DIR)/rtw88/rtw8723d_fw.bin $(1)/lib/firmware/rtw88
endef
$(eval $(call BuildPackage,rtl8723de-firmware))
Package/rtl8761a-firmware = $(call Package/firmware-default,RealTek RTL8761A firmware)
define Package/rtl8761a-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/rtl_bt
@ -117,6 +124,13 @@ define Package/rtl8821ae-firmware/install
endef
$(eval $(call BuildPackage,rtl8821ae-firmware))
Package/rtl8821ce-firmware = $(call Package/firmware-default,RealTek RTL8821CE firmware)
define Package/rtl8821ce-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/rtw88
$(INSTALL_DATA) $(PKG_BUILD_DIR)/rtw88/rtw8821c_fw.bin $(1)/lib/firmware/rtw88
endef
$(eval $(call BuildPackage,rtl8821ce-firmware))
Package/rtl8822be-firmware = $(call Package/firmware-default,RealTek RTL8822BE firmware)
define Package/rtl8822be-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/rtw88
@ -131,3 +145,32 @@ define Package/rtl8822ce-firmware/install
$(INSTALL_DATA) $(PKG_BUILD_DIR)/rtw88/rtw8822c_wow_fw.bin $(1)/lib/firmware/rtw88
endef
$(eval $(call BuildPackage,rtl8822ce-firmware))
Package/rtl8851be-firmware = $(call Package/firmware-default,RealTek RTL8851BE firmware)
define Package/rtl8851be-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/rtw89
$(INSTALL_DATA) $(PKG_BUILD_DIR)/rtw89/rtw8851b_fw.bin $(1)/lib/firmware/rtw89
endef
$(eval $(call BuildPackage,rtl8851be-firmware))
Package/rtl8852ae-firmware = $(call Package/firmware-default,RealTek RTL8852AE firmware)
define Package/rtl8852ae-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/rtw89
$(INSTALL_DATA) $(PKG_BUILD_DIR)/rtw89/rtw8852a_fw.bin $(1)/lib/firmware/rtw89
endef
$(eval $(call BuildPackage,rtl8852ae-firmware))
Package/rtl8852be-firmware = $(call Package/firmware-default,RealTek RTL8852BE firmware)
define Package/rtl8852be-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/rtw89
$(INSTALL_DATA) $(PKG_BUILD_DIR)/rtw89/rtw8852b_fw.bin $(1)/lib/firmware/rtw89
$(INSTALL_DATA) $(PKG_BUILD_DIR)/rtw89/rtw8852b_fw-1.bin $(1)/lib/firmware/rtw89
endef
$(eval $(call BuildPackage,rtl8852be-firmware))
Package/rtl8852ce-firmware = $(call Package/firmware-default,RealTek RTL8852CE firmware)
define Package/rtl8852ce-firmware/install
$(INSTALL_DIR) $(1)/lib/firmware/rtw89
$(INSTALL_DATA) $(PKG_BUILD_DIR)/rtw89/rtw8852c_fw.bin $(1)/lib/firmware/rtw89
endef
$(eval $(call BuildPackage,rtl8852ce-firmware))

4
package/kernel/ath10k-ct/patches/130-ath10k-read-qcom-coexist-support-as-a-u32.patch
View file

@ -39,8 +39,8 @@ that the feature is properly initialized:
Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev>
--- a/ath10k-6.2/core.c
+++ b/ath10k-6.2/core.c
--- a/ath10k-6.4/core.c
+++ b/ath10k-6.4/core.c
@@ -2869,14 +2869,14 @@ done:
static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
{

72
package/kernel/ath10k-ct/patches/201-ath10k-add-LED-and-GPIO-controlling-support-for-various-chipsets.patch
View file

@ -66,24 +66,24 @@ v13:
* cleanup includes
ath10k-6.2/Kconfig | 10 +++
ath10k-6.2/Makefile | 1 +
ath10k-6.2/core.c | 22 +++++++
ath10k-6.2/core.h | 9 ++-
ath10k-6.2/hw.h | 1 +
ath10k-6.2/leds.c | 103 ++++++++++++++++++++++++++++++
ath10k-6.2/leds.h | 45 +++++++++++++
ath10k-6.2/mac.c | 1 +
ath10k-6.2/wmi-ops.h | 32 ++++++++++
ath10k-6.2/wmi-tlv.c | 2 +
ath10k-6.2/wmi.c | 54 ++++++++++++++++
ath10k-6.2/wmi.h | 35 ++++++++++
ath10k-6.4/Kconfig | 10 +++
ath10k-6.4/Makefile | 1 +
ath10k-6.4/core.c | 22 +++++++
ath10k-6.4/core.h | 9 ++-
ath10k-6.4/hw.h | 1 +
ath10k-6.4/leds.c | 103 ++++++++++++++++++++++++++++++
ath10k-6.4/leds.h | 45 +++++++++++++
ath10k-6.4/mac.c | 1 +
ath10k-6.4/wmi-ops.h | 32 ++++++++++
ath10k-6.4/wmi-tlv.c | 2 +
ath10k-6.4/wmi.c | 54 ++++++++++++++++
ath10k-6.4/wmi.h | 35 ++++++++++
12 files changed, 314 insertions(+), 1 deletion(-)
create mode 100644 ath10k-6.2/leds.c
create mode 100644 ath10k-6.2/leds.h
create mode 100644 ath10k-6.4/leds.c
create mode 100644 ath10k-6.4/leds.h
--- a/ath10k-6.2/Kconfig
+++ b/ath10k-6.2/Kconfig
--- a/ath10k-6.4/Kconfig
+++ b/ath10k-6.4/Kconfig
@@ -67,6 +67,16 @@ config ATH10K_DEBUGFS
If unsure, say Y to make it easier to debug problems.
@ -101,8 +101,8 @@ v13:
config ATH10K_SPECTRAL
bool "Atheros ath10k spectral scan support"
depends on ATH10K_DEBUGFS
--- a/ath10k-6.2/Makefile
+++ b/ath10k-6.2/Makefile
--- a/ath10k-6.4/Makefile
+++ b/ath10k-6.4/Makefile
@@ -20,6 +20,7 @@ ath10k_core-$(CONFIG_ATH10K_SPECTRAL) +=
ath10k_core-$(CONFIG_NL80211_TESTMODE) += testmode.o
ath10k_core-$(CONFIG_ATH10K_TRACING) += trace.o
@ -111,8 +111,8 @@ v13:
ath10k_core-$(CONFIG_MAC80211_DEBUGFS) += debugfs_sta.o
ath10k_core-$(CONFIG_PM) += wow.o
ath10k_core-$(CONFIG_ATH10K_CE) += ce.o
--- a/ath10k-6.2/core.c
+++ b/ath10k-6.2/core.c
--- a/ath10k-6.4/core.c
+++ b/ath10k-6.4/core.c
@@ -28,6 +28,7 @@
#include "testmode.h"
#include "wmi-ops.h"
@ -200,8 +200,8 @@ v13:
ath10k_thermal_unregister(ar);
/* Stop spectral before unregistering from mac80211 to remove the
* relayfs debugfs file cleanly. Otherwise the parent debugfs tree
--- a/ath10k-6.2/core.h
+++ b/ath10k-6.2/core.h
--- a/ath10k-6.4/core.h
+++ b/ath10k-6.4/core.h
@@ -14,6 +14,7 @@
#include <linux/pci.h>
#include <linux/uuid.h>
@ -224,8 +224,8 @@ v13:
/* protected by data_lock */
u32 rx_crc_err_drop;
u32 fw_crash_counter;
--- a/ath10k-6.2/hw.h
+++ b/ath10k-6.2/hw.h
--- a/ath10k-6.4/hw.h
+++ b/ath10k-6.4/hw.h
@@ -523,6 +523,7 @@ struct ath10k_hw_params {
const char *name;
u32 patch_load_addr;
@ -235,7 +235,7 @@ v13:
/* Type of hw cycle counter wraparound logic, for more info
--- /dev/null
+++ b/ath10k-6.2/leds.c
+++ b/ath10k-6.4/leds.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2005-2011 Atheros Communications Inc.
@ -341,7 +341,7 @@ v13:
+}
+
--- /dev/null
+++ b/ath10k-6.2/leds.h
+++ b/ath10k-6.4/leds.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
@ -384,8 +384,8 @@ v13:
+
+#endif
+#endif /* _LEDS_H_ */
--- a/ath10k-6.2/mac.c
+++ b/ath10k-6.2/mac.c
--- a/ath10k-6.4/mac.c
+++ b/ath10k-6.4/mac.c
@@ -25,6 +25,7 @@
#include "wmi-tlv.h"
#include "wmi-ops.h"
@ -394,8 +394,8 @@ v13:
/*********/
/* Rates */
--- a/ath10k-6.2/wmi-ops.h
+++ b/ath10k-6.2/wmi-ops.h
--- a/ath10k-6.4/wmi-ops.h
+++ b/ath10k-6.4/wmi-ops.h
@@ -228,7 +228,10 @@ struct wmi_ops {
const struct wmi_bb_timing_cfg_arg *arg);
struct sk_buff *(*gen_per_peer_per_tid_cfg)(struct ath10k *ar,
@ -443,8 +443,8 @@ v13:
static inline int
ath10k_wmi_dbglog_cfg(struct ath10k *ar, u64 module_enable, u32 log_level)
{
--- a/ath10k-6.2/wmi-tlv.c
+++ b/ath10k-6.2/wmi-tlv.c
--- a/ath10k-6.4/wmi-tlv.c
+++ b/ath10k-6.4/wmi-tlv.c
@@ -4601,6 +4601,8 @@ static const struct wmi_ops wmi_tlv_ops
.gen_echo = ath10k_wmi_tlv_op_gen_echo,
.gen_vdev_spectral_conf = ath10k_wmi_tlv_op_gen_vdev_spectral_conf,
@ -454,8 +454,8 @@ v13:
};
static const struct wmi_peer_flags_map wmi_tlv_peer_flags_map = {
--- a/ath10k-6.2/wmi.c
+++ b/ath10k-6.2/wmi.c
--- a/ath10k-6.4/wmi.c
+++ b/ath10k-6.4/wmi.c
@@ -8438,6 +8438,49 @@ ath10k_wmi_op_gen_peer_set_param(struct
return skb;
}
@ -552,8 +552,8 @@ v13:
};
int ath10k_wmi_attach(struct ath10k *ar)
--- a/ath10k-6.2/wmi.h
+++ b/ath10k-6.2/wmi.h
--- a/ath10k-6.4/wmi.h
+++ b/ath10k-6.4/wmi.h
@@ -3133,6 +3133,41 @@ enum wmi_10_4_feature_mask {
};

20
package/kernel/ath10k-ct/patches/202-ath10k-use-tpt-trigger-by-default.patch
View file

@ -9,13 +9,13 @@ traffic.
Signed-off-by: Mathias Kresin <dev@kresin.me>
---
ath10k-6.2/core.h | 4 ++++
ath10k-6.2/leds.c | 4 +---
ath10k-6.2/mac.c | 2 +-
ath10k-6.4/core.h | 4 ++++
ath10k-6.4/leds.c | 4 +---
ath10k-6.4/mac.c | 2 +-
3 files changed, 6 insertions(+), 4 deletions(-)
--- a/ath10k-6.2/core.h
+++ b/ath10k-6.2/core.h
--- a/ath10k-6.4/core.h
+++ b/ath10k-6.4/core.h
@@ -1701,6 +1701,10 @@ struct ath10k {
u8 csi_data[4096];
u16 csi_data_len;
@ -27,8 +27,8 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>
/* must be last */
u8 drv_priv[] __aligned(sizeof(void *));
};
--- a/ath10k-6.2/leds.c
+++ b/ath10k-6.2/leds.c
--- a/ath10k-6.4/leds.c
+++ b/ath10k-6.4/leds.c
@@ -81,9 +81,7 @@ int ath10k_leds_register(struct ath10k *
ar->leds.cdev.name = ar->leds.label;
@ -40,9 +40,9 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>
ret = led_classdev_register(wiphy_dev(ar->hw->wiphy), &ar->leds.cdev);
if (ret)
--- a/ath10k-6.2/mac.c
+++ b/ath10k-6.2/mac.c
@@ -11617,7 +11617,7 @@ int ath10k_mac_register(struct ath10k *a
--- a/ath10k-6.4/mac.c
+++ b/ath10k-6.4/mac.c
@@ -11616,7 +11616,7 @@ int ath10k_mac_register(struct ath10k *a
ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
#ifdef CPTCFG_MAC80211_LEDS

4
package/kernel/ath10k-ct/patches/960-0010-ath10k-limit-htt-rx-ring-size.patch
View file

@ -1,5 +1,5 @@
--- a/ath10k-6.2/htt.h
+++ b/ath10k-6.2/htt.h
--- a/ath10k-6.4/htt.h
+++ b/ath10k-6.4/htt.h
@@ -237,7 +237,11 @@ enum htt_rx_ring_flags {
};

4
package/kernel/ath10k-ct/patches/960-0011-ath10k-limit-pci-buffer-size.patch
View file

@ -1,5 +1,5 @@
--- a/ath10k-6.2/pci.c
+++ b/ath10k-6.2/pci.c
--- a/ath10k-6.4/pci.c
+++ b/ath10k-6.4/pci.c
@@ -131,7 +131,11 @@ static const struct ce_attr pci_host_ce_
.flags = CE_ATTR_FLAGS,
.src_nentries = 0,

8
package/kernel/ath10k-ct/patches/988-ath10k-always-use-mac80211-loss-detection.patch
View file

@ -13,12 +13,12 @@ own loss detection mechanism.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
ath10k-6.2/mac.c | 1 -
ath10k-6.4/mac.c | 1 -
1 file changed, 1 deletion(-)
--- a/ath10k-6.2/mac.c
+++ b/ath10k-6.2/mac.c
@@ -11306,7 +11306,6 @@ int ath10k_mac_register(struct ath10k *a
--- a/ath10k-6.4/mac.c
+++ b/ath10k-6.4/mac.c
@@ -11305,7 +11305,6 @@ int ath10k_mac_register(struct ath10k *a
ieee80211_hw_set(ar->hw, CHANCTX_STA_CSA);
ieee80211_hw_set(ar->hw, QUEUE_CONTROL);
ieee80211_hw_set(ar->hw, SUPPORTS_TX_FRAG);

3
package/kernel/linux/modules/usb.mk
View file

@ -750,8 +750,9 @@ $(eval $(call KernelPackage,usb-serial-mct))
define KernelPackage/usb-serial-mos7720
TITLE:=Support for Moschip MOS7720 devices
KCONFIG:=CONFIG_USB_SERIAL_MOS7720
KCONFIG:=CONFIG_USB_SERIAL_MOS7720 CONFIG_USB_SERIAL_MOS7715_PARPORT=y
FILES:=$(LINUX_DIR)/drivers/usb/serial/mos7720.ko
DEPENDS:=+kmod-ppdev
AUTOLOAD:=$(call AutoProbe,mos7720)
$(call AddDepends/usb-serial)
endef

2
package/kernel/mac80211/patches/ath/400-ath_move_debug_code.patch
View file

@ -14,7 +14,7 @@
CFLAGS_trace.o := -I$(src)
--- a/drivers/net/wireless/ath/ath.h
+++ b/drivers/net/wireless/ath/ath.h
@@ -319,14 +319,7 @@ void _ath_dbg(struct ath_common *common,
@@ -321,14 +321,7 @@ void _ath_dbg(struct ath_common *common,
#endif /* CPTCFG_ATH_DEBUG */
/** Returns string describing opmode, or NULL if unknown mode. */

58
package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch
View file

@ -1,14 +1,24 @@
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -1413,6 +1413,54 @@ void ath9k_deinit_debug(struct ath_softc
ath9k_cmn_spectral_deinit_debug(&sc->spec_priv);
}
@@ -1471,6 +1471,7 @@ int ath9k_init_debug(struct ath_hw *ah)
ath9k_cmn_debug_base_eeprom(sc->debug.debugfs_phy, sc->sc_ah);
ath9k_cmn_debug_modal_eeprom(sc->debug.debugfs_phy, sc->sc_ah);
+ ath9k_cmn_debug_eeprom(sc->debug.debugfs_phy, sc->sc_ah);
debugfs_create_u32("gpio_mask", 0600,
sc->debug.debugfs_phy, &sc->sc_ah->gpio_mask);
--- a/drivers/net/wireless/ath/ath9k/common-debug.c
+++ b/drivers/net/wireless/ath/ath9k/common-debug.c
@@ -260,3 +260,58 @@ void ath9k_cmn_debug_phy_err(struct dent
&fops_phy_err);
}
EXPORT_SYMBOL(ath9k_cmn_debug_phy_err);
+
+static ssize_t read_file_eeprom(struct file *file, char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ struct ath_softc *sc = file->private_data;
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_hw *ah = file->private_data;
+ struct ath_common *common = ath9k_hw_common(ah);
+ int bytes = 0;
+ int pos = *ppos;
@ -52,15 +62,31 @@
+ .owner = THIS_MODULE
+};
+
int ath9k_init_debug(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);
@@ -1432,6 +1480,8 @@ int ath9k_init_debug(struct ath_hw *ah)
ath9k_tx99_init_debug(sc);
ath9k_cmn_spectral_init_debug(&sc->spec_priv, sc->debug.debugfs_phy);
+ debugfs_create_file("eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
+void ath9k_cmn_debug_eeprom(struct dentry *debugfs_phy,
+ struct ath_hw *ah)
+{
+ debugfs_create_file("eeprom", S_IRUSR, debugfs_phy, ah,
+ &fops_eeprom);
debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
read_file_dma);
debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
+}
+EXPORT_SYMBOL(ath9k_cmn_debug_eeprom);
--- a/drivers/net/wireless/ath/ath9k/common-debug.h
+++ b/drivers/net/wireless/ath/ath9k/common-debug.h
@@ -69,6 +69,8 @@ void ath9k_cmn_debug_modal_eeprom(struct
struct ath_hw *ah);
void ath9k_cmn_debug_base_eeprom(struct dentry *debugfs_phy,
struct ath_hw *ah);
+void ath9k_cmn_debug_eeprom(struct dentry *debugfs_phy,
+ struct ath_hw *ah);
void ath9k_cmn_debug_stat_rx(struct ath_rx_stats *rxstats,
struct ath_rx_status *rs);
void ath9k_cmn_debug_recv(struct dentry *debugfs_phy,
--- a/drivers/net/wireless/ath/ath9k/htc_drv_debug.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_debug.c
@@ -519,6 +519,7 @@ int ath9k_htc_init_debug(struct ath_hw *
ath9k_cmn_debug_base_eeprom(priv->debug.debugfs_phy, priv->ah);
ath9k_cmn_debug_modal_eeprom(priv->debug.debugfs_phy, priv->ah);
+ ath9k_cmn_debug_eeprom(priv->debug.debugfs_phy, priv->ah);
return 0;
}

190
package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
View file

@ -1,70 +1,16 @@
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -1461,6 +1461,52 @@ static const struct file_operations fops
.owner = THIS_MODULE
};
@@ -1472,6 +1472,7 @@ int ath9k_init_debug(struct ath_hw *ah)
ath9k_cmn_debug_base_eeprom(sc->debug.debugfs_phy, sc->sc_ah);
ath9k_cmn_debug_modal_eeprom(sc->debug.debugfs_phy, sc->sc_ah);
ath9k_cmn_debug_eeprom(sc->debug.debugfs_phy, sc->sc_ah);
+ ath9k_cmn_debug_chanbw(sc->debug.debugfs_phy, sc->sc_ah);
+
+static ssize_t read_file_chan_bw(struct file *file, char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ struct ath_softc *sc = file->private_data;
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+ char buf[32];
+ unsigned int len;
+
+ len = sprintf(buf, "0x%08x\n", common->chan_bw);
+ return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+}
+
+static ssize_t write_file_chan_bw(struct file *file, const char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ struct ath_softc *sc = file->private_data;
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+ unsigned long chan_bw;
+ char buf[32];
+ ssize_t len;
+
+ len = min(count, sizeof(buf) - 1);
+ if (copy_from_user(buf, user_buf, len))
+ return -EFAULT;
+
+ buf[len] = '\0';
+ if (kstrtoul(buf, 0, &chan_bw))
+ return -EINVAL;
+
+ common->chan_bw = chan_bw;
+ if (!test_bit(ATH_OP_INVALID, &common->op_flags))
+ ath9k_ops.config(sc->hw, IEEE80211_CONF_CHANGE_CHANNEL);
+
+ return count;
+}
+
+static const struct file_operations fops_chanbw = {
+ .read = read_file_chan_bw,
+ .write = write_file_chan_bw,
+ .open = simple_open,
+ .owner = THIS_MODULE,
+ .llseek = default_llseek,
+};
+
+
int ath9k_init_debug(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);
@@ -1482,6 +1528,8 @@ int ath9k_init_debug(struct ath_hw *ah)
debugfs_create_file("eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
&fops_eeprom);
+ debugfs_create_file("chanbw", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
+ sc, &fops_chanbw);
debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
read_file_dma);
debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
debugfs_create_u32("gpio_mask", 0600,
sc->debug.debugfs_phy, &sc->sc_ah->gpio_mask);
--- a/drivers/net/wireless/ath/ath.h
+++ b/drivers/net/wireless/ath/ath.h
@@ -151,6 +151,7 @@ struct ath_common {
@@ -153,6 +153,7 @@ struct ath_common {
int debug_mask;
enum ath_device_state state;
unsigned long op_flags;
@ -72,6 +18,14 @@
struct ath_ani ani;
@@ -181,6 +182,7 @@ struct ath_common {
const struct ath_ops *ops;
const struct ath_bus_ops *bus_ops;
const struct ath_ps_ops *ps_ops;
+ const struct ieee80211_ops *ieee_ops;
bool btcoex_enabled;
bool disable_ani;
--- a/drivers/net/wireless/ath/ath9k/common.c
+++ b/drivers/net/wireless/ath/ath9k/common.c
@@ -297,11 +297,13 @@ EXPORT_SYMBOL(ath9k_cmn_get_hw_crypto_ke
@ -123,3 +77,115 @@
return channel;
}
--- a/drivers/net/wireless/ath/ath9k/common-debug.c
+++ b/drivers/net/wireless/ath/ath9k/common-debug.c
@@ -316,3 +316,55 @@ void ath9k_cmn_debug_eeprom(struct dentr
&fops_eeprom);
}
EXPORT_SYMBOL(ath9k_cmn_debug_eeprom);
+
+static ssize_t read_file_chan_bw(struct file *file, char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ struct ath_hw *ah = file->private_data;
+ struct ath_common *common = ath9k_hw_common(ah);
+ char buf[32];
+ unsigned int len;
+
+ len = sprintf(buf, "0x%08x\n", common->chan_bw);
+ return simple_read_from_buffer(user_buf, count, ppos, buf, len);
+}
+
+static ssize_t write_file_chan_bw(struct file *file, const char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ struct ath_hw *ah = file->private_data;
+ struct ath_common *common = ath9k_hw_common(ah);
+ unsigned long chan_bw;
+ char buf[32];
+ ssize_t len;
+
+ len = min(count, sizeof(buf) - 1);
+ if (copy_from_user(buf, user_buf, len))
+ return -EFAULT;
+
+ buf[len] = '\0';
+ if (kstrtoul(buf, 0, &chan_bw))
+ return -EINVAL;
+
+ common->chan_bw = chan_bw;
+ if (!test_bit(ATH_OP_INVALID, &common->op_flags))
+ common->ieee_ops->config(ah->hw, IEEE80211_CONF_CHANGE_CHANNEL);
+
+ return count;
+}
+
+static const struct file_operations fops_chanbw = {
+ .read = read_file_chan_bw,
+ .write = write_file_chan_bw,
+ .open = simple_open,
+ .owner = THIS_MODULE,
+ .llseek = default_llseek,
+};
+
+void ath9k_cmn_debug_chanbw(struct dentry *debugfs_phy,
+ struct ath_hw *ah)
+{
+ debugfs_create_file("chanbw", S_IRUSR | S_IWUSR, debugfs_phy, ah,
+ &fops_chanbw);
+}
+EXPORT_SYMBOL(ath9k_cmn_debug_chanbw);
--- a/drivers/net/wireless/ath/ath9k/htc_drv_debug.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_debug.c
@@ -520,6 +520,7 @@ int ath9k_htc_init_debug(struct ath_hw *
ath9k_cmn_debug_base_eeprom(priv->debug.debugfs_phy, priv->ah);
ath9k_cmn_debug_modal_eeprom(priv->debug.debugfs_phy, priv->ah);
ath9k_cmn_debug_eeprom(priv->debug.debugfs_phy, priv->ah);
+ ath9k_cmn_debug_chanbw(priv->debug.debugfs_phy, priv->ah);
return 0;
}
--- a/drivers/net/wireless/ath/ath9k/common-debug.h
+++ b/drivers/net/wireless/ath/ath9k/common-debug.h
@@ -71,6 +71,8 @@ void ath9k_cmn_debug_base_eeprom(struct
struct ath_hw *ah);
void ath9k_cmn_debug_eeprom(struct dentry *debugfs_phy,
struct ath_hw *ah);
+void ath9k_cmn_debug_chanbw(struct dentry *debugfs_phy,
+ struct ath_hw *ah);
void ath9k_cmn_debug_stat_rx(struct ath_rx_stats *rxstats,
struct ath_rx_status *rs);
void ath9k_cmn_debug_recv(struct dentry *debugfs_phy,
--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
@@ -631,6 +631,7 @@ static int ath9k_init_priv(struct ath9k_
priv->ah = ah;
common = ath9k_hw_common(ah);
+ common->ieee_ops = &ath9k_htc_ops;
common->ops = &ah->reg_ops;
common->ps_ops = &ath9k_htc_ps_ops;
common->bus_ops = &ath9k_usb_bus_ops;
@@ -746,9 +747,9 @@ static void ath9k_set_hw_capab(struct at
hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN |
WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
- WIPHY_FLAG_HAS_CHANNEL_SWITCH;
-
- hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS;
+ WIPHY_FLAG_HAS_CHANNEL_SWITCH |
+ WIPHY_FLAG_SUPPORTS_5_10_MHZ |
+ WIPHY_FLAG_SUPPORTS_TDLS;
hw->queues = 4;
hw->max_listen_interval = 1;
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -733,6 +733,7 @@ static int ath9k_init_softc(u16 devid, s
if (!ath9k_is_chanctx_enabled())
sc->cur_chan->hw_queue_base = 0;
+ common->ieee_ops = &ath9k_ops;
common->ops = &ah->reg_ops;
common->bus_ops = bus_ops;
common->ps_ops = &ath9k_ps_ops;

20
package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
View file

@ -181,7 +181,7 @@
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -1088,7 +1088,7 @@ int ath9k_init_device(u16 devid, struct
@@ -1089,7 +1089,7 @@ int ath9k_init_device(u16 devid, struct
#ifdef CPTCFG_MAC80211_LEDS
/* must be initialized before ieee80211_register_hw */
@ -192,9 +192,9 @@
#endif
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -1506,6 +1506,61 @@ static const struct file_operations fops
.llseek = default_llseek,
};
@@ -128,6 +128,61 @@ static const struct file_operations fops
#define DMA_BUF_LEN 1024
+#ifdef CONFIG_MAC80211_LEDS
+
@ -252,12 +252,12 @@
+#endif
+
int ath9k_init_debug(struct ath_hw *ah)
{
@@ -1530,6 +1585,10 @@ int ath9k_init_debug(struct ath_hw *ah)
&fops_eeprom);
debugfs_create_file("chanbw", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
sc, &fops_chanbw);
static ssize_t read_file_ani(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
@@ -1432,6 +1487,10 @@ int ath9k_init_debug(struct ath_hw *ah)
ath9k_tx99_init_debug(sc);
ath9k_cmn_spectral_init_debug(&sc->spec_priv, sc->debug.debugfs_phy);
+#ifdef CONFIG_MAC80211_LEDS
+ debugfs_create_file("gpio_led", S_IWUSR,
+ sc->debug.debugfs_phy, sc, &fops_gpio_led);

28
package/kernel/mac80211/patches/rt2x00/000-v6.6-wifi-rt2x00-correct-MAC_SYS_CTRL-register-RX-mask-i.patch Normal file
View file

@ -0,0 +1,28 @@
From 186f2432741f6d28d86ff723ac7830446affddfc Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sat, 5 Aug 2023 17:17:28 +0800
Subject: wifi: rt2x00: correct MAC_SYS_CTRL register RX mask in R-Calibration
For MAC_SYS_CTRL register, Bit[2] controls MAC_TX_EN and Bit[3]
controls MAC_RX_EN (Bit index starts from 0). Therefore, 0x08 is
the correct mask for RX.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB03150B571B67B896A504AC34BC0EA@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
---
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -8561,7 +8561,7 @@ static void rt2800_r_calibration(struct
rt2x00_warn(rt2x00dev, "Wait MAC Tx Status to MAX !!!\n");
maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
- maccfg &= (~0x04);
+ maccfg &= (~0x08);
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY_RX)))

47
package/kernel/mac80211/patches/rt2x00/997-wifi-rt2x00-limit-MT7620-TX-power-based-on-eeprom-ca.patch → package/kernel/mac80211/patches/rt2x00/001-v6.6-wifi-rt2x00-limit-MT7620-TX-power-based-on-eeprom.patch
View file

@ -1,7 +1,7 @@
From 821b5192c955144bd2f0aeea6cd153e1aedd16e1 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sat, 22 Jul 2023 21:56:30 +0800
Subject: [PATCH] wifi: rt2x00: limit MT7620 TX power based on eeprom
calibration
Date: Fri, 11 Aug 2023 14:34:54 +0800
Subject: wifi: rt2x00: limit MT7620 TX power based on eeprom calibration
In the vendor driver, the current channel power is queried from
EEPROM_TXPOWER_BG1 and EEPROM_TXPOWER_BG2. And then the mixed value
@ -18,29 +18,36 @@ Based on these eeprom values, this patch adds basic TX power control
for the MT7620 and limits its maximum TX power. This can avoid the
link speed decrease caused by chip overheating. rt2800_config_alc()
function has also been renamed to rt2800_config_alc_rt6352() because
it's only used by RT6352(MT7620).
it's only used by RT6352 (MT7620).
Notice:
It's still need some work to sync the max channel power to the user
interface. This part is missing from the rt2x00 driver structure. If
interface. This part is missing from the rt2x00 driver framework. If
we set the power exceed the calibration value, it won't take effect.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB03159090ED14044215E59FD6BC10A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
---
.../net/wireless/ralink/rt2x00/rt2800lib.c | 49 +++++++++++++------
1 file changed, 34 insertions(+), 15 deletions(-)
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 57 ++++++++++++++++++--------
1 file changed, 40 insertions(+), 17 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -3891,28 +3891,47 @@ static void rt2800_config_channel_rf7620
@@ -3865,28 +3865,51 @@ static void rt2800_config_channel_rf7620
}
}
-static void rt2800_config_alc(struct rt2x00_dev *rt2x00dev,
+static void rt2800_config_alc_rt6352(struct rt2x00_dev *rt2x00dev,
struct ieee80211_channel *chan,
int power_level) {
- struct ieee80211_channel *chan,
- int power_level) {
- u16 eeprom, target_power, max_power;
+static void rt2800_config_alc_rt6352(struct rt2x00_dev *rt2x00dev,
+ struct ieee80211_channel *chan,
+ int power_level)
+{
+ int cur_channel = rt2x00dev->rf_channel;
+ u16 eeprom, chan_power, rate_power, target_power;
+ u16 tx_power[2];
+ s8 *power_group[2];
@ -57,27 +64,29 @@ Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
- max_power = chan->max_power * 2;
- if (max_power > 0x2f)
- max_power = 0x2f;
+ /* get per channel power, 2 channels in total, unit is 0.5dBm */
+ if (WARN_ON(cur_channel < 1 || cur_channel > 14))
+ return;
+
+ /* get per chain power, 2 chains in total, unit is 0.5dBm */
+ power_level = (power_level - 3) * 2;
+ /*
+ * We can't get the accurate TX power. Based on some tests, the real
+
+ /* We can't get the accurate TX power. Based on some tests, the real
+ * TX power is approximately equal to channel_power + (max)rate_power.
+ * Usually max rate_power is the gain of the OFDM 6M rate. The antenna
+ * gain and externel PA gain are not included as we are unable to
+ * obtain these values.
+ */
+ rate_power = rt2800_eeprom_read_from_array(rt2x00dev,
+ EEPROM_TXPOWER_BYRATE, 1) & 0x3f;
+ EEPROM_TXPOWER_BYRATE, 1);
+ rate_power &= 0x3f;
+ power_level -= rate_power;
+ if (power_level < 1)
+ power_level = 1;
+ if (power_level > chan->max_power * 2)
+ power_level = chan->max_power * 2;
+
+ power_group[0] = rt2800_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG1);
+ power_group[1] = rt2800_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG2);
+ for (cnt = 0; cnt < 2; cnt++) {
+ chan_power = power_group[cnt][rt2x00dev->rf_channel - 1];
+ chan_power = power_group[cnt][cur_channel - 1];
+ if (chan_power >= 0x20 || chan_power == 0)
+ chan_power = 0x10;
+ tx_power[cnt] = power_level < chan_power ? power_level : chan_power;
@ -95,7 +104,7 @@ Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1);
if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_INTERNAL_TX_ALC)) {
@@ -5321,7 +5340,7 @@ static void rt2800_config_txpower_rt6352
@@ -5268,7 +5291,7 @@ static void rt2800_config_txpower_rt6352
rt2x00_set_field32(&pwreg, TX_PWR_CFG_9B_STBC_MCS7, t);
rt2800_register_write(rt2x00dev, TX_PWR_CFG_9, pwreg);

12
package/kernel/mac80211/patches/rt2x00/999-wifi-rt2x00-fix-MT7620-low-RSSI-issue.patch → package/kernel/mac80211/patches/rt2x00/002-v6.7-wifi-rt2x00-fix-MT7620-low-RSSI-issue.patch
View file

@ -1,6 +1,7 @@
From 2ecfe6f07e8e6257cad3d3290c5aec2102120041 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sat, 23 Sep 2023 07:51:39 +0800
Subject: [PATCH] wifi: rt2x00: fix MT7620 low RSSI issue
Date: Sat, 23 Sep 2023 09:01:01 +0800
Subject: wifi: rt2x00: fix MT7620 low RSSI issue
On Mediatek vendor driver[1], MT7620 (RT6352) uses different RSSI
base value '-2' compared to the other RT2x00 chips. This patch
@ -10,13 +11,16 @@ reports on MT7620.
[1] Found on MT76x2E_MT7620_LinuxAP_V3.0.4.0_P3 ConvertToRssi().
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB031571CDB146C414A908A66DBCFEA@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
---
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -875,6 +875,7 @@ static int rt2800_agc_to_rssi(struct rt2
@@ -856,6 +856,7 @@ static int rt2800_agc_to_rssi(struct rt2
s8 rssi0 = rt2x00_get_field32(rxwi_w2, RXWI_W2_RSSI0);
s8 rssi1 = rt2x00_get_field32(rxwi_w2, RXWI_W2_RSSI1);
s8 rssi2 = rt2x00_get_field32(rxwi_w2, RXWI_W2_RSSI2);
@ -24,7 +28,7 @@ Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
u16 eeprom;
u8 offset0;
u8 offset1;
@@ -899,9 +900,9 @@ static int rt2800_agc_to_rssi(struct rt2
@@ -880,9 +881,9 @@ static int rt2800_agc_to_rssi(struct rt2
* If the value in the descriptor is 0, it is considered invalid
* and the default (extremely low) rssi value is assumed
*/

78
package/kernel/mac80211/patches/rt2x00/003-v6.7-wifi-rt2x00-fix-rt2800-watchdog-function.patch Normal file
View file

@ -0,0 +1,78 @@
From 69708fbb2c698f262e03360d064c7066e0679953 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sat, 14 Oct 2023 14:55:01 +0800
Subject: wifi: rt2x00: fix rt2800 watchdog function
The watchdog function is broken on rt2800 series SoCs. This patch
fixes the incorrect watchdog logic to make it work again.
1. Update current wdt queue index if it's not equal to the previous
index. Watchdog compares the current and previous queue index to
judge if the queue hung.
2. Make sure hung_{rx,tx} 'true' status won't be override by the
normal queue. Any queue hangs should trigger a reset action.
3. Clear the watchdog counter of all queues before resetting the
hardware. This change may help to avoid the reset loop.
4. Change hang check function return type to bool as we only need
to return two status, yes or no.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB0315BC1D83D31154924F0D39BCD1A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
---
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -1237,13 +1237,14 @@ void rt2800_txdone_nostatus(struct rt2x0
}
EXPORT_SYMBOL_GPL(rt2800_txdone_nostatus);
-static int rt2800_check_hung(struct data_queue *queue)
+static bool rt2800_check_hung(struct data_queue *queue)
{
unsigned int cur_idx = rt2800_drv_get_dma_done(queue);
- if (queue->wd_idx != cur_idx)
+ if (queue->wd_idx != cur_idx) {
+ queue->wd_idx = cur_idx;
queue->wd_count = 0;
- else
+ } else
queue->wd_count++;
return queue->wd_count > 16;
@@ -1280,7 +1281,7 @@ void rt2800_watchdog(struct rt2x00_dev *
case QID_MGMT:
if (rt2x00queue_empty(queue))
continue;
- hung_tx = rt2800_check_hung(queue);
+ hung_tx = hung_tx || rt2800_check_hung(queue);
break;
case QID_RX:
/* For station mode we should reactive at least
@@ -1289,7 +1290,7 @@ void rt2800_watchdog(struct rt2x00_dev *
*/
if (rt2x00dev->intf_sta_count == 0)
continue;
- hung_rx = rt2800_check_hung(queue);
+ hung_rx = hung_rx || rt2800_check_hung(queue);
break;
default:
break;
@@ -1302,8 +1303,12 @@ void rt2800_watchdog(struct rt2x00_dev *
if (hung_rx)
rt2x00_warn(rt2x00dev, "Watchdog RX hung detected\n");
- if (hung_tx || hung_rx)
+ if (hung_tx || hung_rx) {
+ queue_for_each(rt2x00dev, queue)
+ queue->wd_count = 0;
+
ieee80211_restart_hw(rt2x00dev->hw);
+ }
}
EXPORT_SYMBOL_GPL(rt2800_watchdog);

124
package/kernel/mac80211/patches/rt2x00/004-1-v6.7-wifi-rt2x00-improve-MT7620-register-initialization.patch Normal file
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@ -0,0 +1,124 @@
From 1ffe76d5ae78553948d67a978acd9945c2f0a175 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Thu, 19 Oct 2023 19:58:56 +0800
Subject: wifi: rt2x00: improve MT7620 register initialization
1. Do not hard reset the BBP. We can use soft reset instead. This
change has some help to the calibration failure issue.
2. Enable falling back to legacy rate from the HT/RTS rate by
setting the HT_FBK_TO_LEGACY register.
3. Implement MCS rate specific maximum PSDU size. It can improve
the transmission quality under the low RSSI condition.
4. Set BBP_84 register value to 0x19. This is used for extension
channel overlapping IOT.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB031553CCD4B7A3B89C85935DBCD4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
---
drivers/net/wireless/ralink/rt2x00/rt2800.h | 18 ++++++++++++++++++
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 24 ++++++++++++++++++++++++
drivers/net/wireless/ralink/rt2x00/rt2800mmio.c | 3 +++
3 files changed, 45 insertions(+)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
@@ -871,6 +871,18 @@
#define LED_CFG_LED_POLAR FIELD32(0x40000000)
/*
+ * AMPDU_MAX_LEN_20M1S: Per MCS max A-MPDU length, 20 MHz, MCS 0-7
+ * AMPDU_MAX_LEN_20M2S: Per MCS max A-MPDU length, 20 MHz, MCS 8-15
+ * AMPDU_MAX_LEN_40M1S: Per MCS max A-MPDU length, 40 MHz, MCS 0-7
+ * AMPDU_MAX_LEN_40M2S: Per MCS max A-MPDU length, 40 MHz, MCS 8-15
+ * Maximum A-MPDU length = 2^(AMPDU_MAX - 5) kilobytes
+ */
+#define AMPDU_MAX_LEN_20M1S 0x1030
+#define AMPDU_MAX_LEN_20M2S 0x1034
+#define AMPDU_MAX_LEN_40M1S 0x1038
+#define AMPDU_MAX_LEN_40M2S 0x103C
+
+/*
* AMPDU_BA_WINSIZE: Force BlockAck window size
* FORCE_WINSIZE_ENABLE:
* 0: Disable forcing of BlockAck window size
@@ -1545,6 +1557,12 @@
*/
#define EXP_ACK_TIME 0x1380
+/*
+ * HT_FBK_TO_LEGACY: Enable/Disable HT/RTS fallback to OFDM/CCK rate
+ * Not available for legacy SoCs
+ */
+#define HT_FBK_TO_LEGACY 0x1384
+
/* TX_PWR_CFG_5 */
#define TX_PWR_CFG_5 0x1384
#define TX_PWR_CFG_5_MCS16_CH0 FIELD32(0x0000000f)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -5851,6 +5851,7 @@ static int rt2800_init_registers(struct
struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
u32 reg;
u16 eeprom;
+ u8 bbp;
unsigned int i;
int ret;
@@ -5860,6 +5861,19 @@ static int rt2800_init_registers(struct
if (ret)
return ret;
+ if (rt2x00_rt(rt2x00dev, RT6352)) {
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x01);
+
+ bbp = rt2800_bbp_read(rt2x00dev, 21);
+ bbp |= 0x01;
+ rt2800_bbp_write(rt2x00dev, 21, bbp);
+ bbp = rt2800_bbp_read(rt2x00dev, 21);
+ bbp &= (~0x01);
+ rt2800_bbp_write(rt2x00dev, 21, bbp);
+
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00);
+ }
+
rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
@@ -6013,6 +6027,14 @@ static int rt2800_init_registers(struct
reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
+
+ rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_20M1S, 0x77754433);
+ rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_20M2S, 0x77765543);
+ rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_40M1S, 0x77765544);
+ rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_40M2S, 0x77765544);
+
+ rt2800_register_write(rt2x00dev, HT_FBK_TO_LEGACY, 0x1010);
+
} else {
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
@@ -7231,6 +7253,8 @@ static void rt2800_init_bbp_6352(struct
rt2800_bbp_dcoc_write(rt2x00dev, 159, 0x64);
rt2800_bbp4_mac_if_ctrl(rt2x00dev);
+
+ rt2800_bbp_write(rt2x00dev, 84, 0x19);
}
static void rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
@@ -760,6 +760,9 @@ int rt2800mmio_init_registers(struct rt2
rt2x00mmio_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
+ if (rt2x00_rt(rt2x00dev, RT6352))
+ return 0;
+
reg = 0;
rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);

146
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@ -0,0 +1,146 @@
From a28533c6be1711584bf3ec978309d5c590029821 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Thu, 19 Oct 2023 19:58:57 +0800
Subject: wifi: rt2x00: rework MT7620 channel config function
1. Move the channel configuration code from rt2800_vco_calibration()
to the rt2800_config_channel().
2. Use MT7620 SoC specific AGC initial LNA value instead of the
RT5592's value.
3. BBP{195,196} pairing write has been replaced with
rt2800_bbp_glrt_write() to reduce redundant code.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB0315622A4340BFFA530B1B86BCD4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
---
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 91 ++++++++++----------------
1 file changed, 35 insertions(+), 56 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -3861,14 +3861,6 @@ static void rt2800_config_channel_rf7620
rfcsr |= tx_agc_fc;
rt2800_rfcsr_write_bank(rt2x00dev, 7, 59, rfcsr);
}
-
- if (conf_is_ht40(conf)) {
- rt2800_bbp_glrt_write(rt2x00dev, 141, 0x10);
- rt2800_bbp_glrt_write(rt2x00dev, 157, 0x2f);
- } else {
- rt2800_bbp_glrt_write(rt2x00dev, 141, 0x1a);
- rt2800_bbp_glrt_write(rt2x00dev, 157, 0x40);
- }
}
static void rt2800_config_alc_rt6352(struct rt2x00_dev *rt2x00dev,
@@ -4437,32 +4429,46 @@ static void rt2800_config_channel(struct
usleep_range(1000, 1500);
}
- if (rt2x00_rt(rt2x00dev, RT5592) || rt2x00_rt(rt2x00dev, RT6352)) {
- reg = 0x10;
- if (!conf_is_ht40(conf)) {
- if (rt2x00_rt(rt2x00dev, RT6352) &&
- rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
- reg |= 0x5;
- } else {
- reg |= 0xa;
- }
- }
- rt2800_bbp_write(rt2x00dev, 195, 141);
- rt2800_bbp_write(rt2x00dev, 196, reg);
+ if (rt2x00_rt(rt2x00dev, RT5592)) {
+ bbp = conf_is_ht40(conf) ? 0x10 : 0x1a;
+ rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
- /* AGC init.
- * Despite the vendor driver using different values here for
- * RT6352 chip, we use 0x1c for now. This may have to be changed
- * once TSSI got implemented.
- */
- reg = (rf->channel <= 14 ? 0x1c : 0x24) + 2*rt2x00dev->lna_gain;
- rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg);
+ bbp = (rf->channel <= 14 ? 0x1c : 0x24) + 2 * rt2x00dev->lna_gain;
+ rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, bbp);
- if (rt2x00_rt(rt2x00dev, RT5592))
- rt2800_iq_calibrate(rt2x00dev, rf->channel);
+ rt2800_iq_calibrate(rt2x00dev, rf->channel);
}
if (rt2x00_rt(rt2x00dev, RT6352)) {
+ /* BBP for GLRT BW */
+ bbp = conf_is_ht40(conf) ?
+ 0x10 : rt2x00_has_cap_external_lna_bg(rt2x00dev) ?
+ 0x15 : 0x1a;
+ rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
+
+ bbp = conf_is_ht40(conf) ? 0x2f : 0x40;
+ rt2800_bbp_glrt_write(rt2x00dev, 157, bbp);
+
+ if (rt2x00dev->default_ant.rx_chain_num == 1) {
+ rt2800_bbp_write(rt2x00dev, 91, 0x07);
+ rt2800_bbp_write(rt2x00dev, 95, 0x1a);
+ rt2800_bbp_glrt_write(rt2x00dev, 128, 0xa0);
+ rt2800_bbp_glrt_write(rt2x00dev, 170, 0x12);
+ rt2800_bbp_glrt_write(rt2x00dev, 171, 0x10);
+ } else {
+ rt2800_bbp_write(rt2x00dev, 91, 0x06);
+ rt2800_bbp_write(rt2x00dev, 95, 0x9a);
+ rt2800_bbp_glrt_write(rt2x00dev, 128, 0xe0);
+ rt2800_bbp_glrt_write(rt2x00dev, 170, 0x30);
+ rt2800_bbp_glrt_write(rt2x00dev, 171, 0x30);
+ }
+
+ /* AGC init */
+ bbp = rf->channel <= 14 ? 0x04 + 2 * rt2x00dev->lna_gain : 0;
+ rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, bbp);
+
+ usleep_range(1000, 1500);
+
if (test_bit(CAPABILITY_EXTERNAL_PA_TX0,
&rt2x00dev->cap_flags)) {
reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
@@ -5608,26 +5614,6 @@ void rt2800_vco_calibration(struct rt2x0
rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
if (rt2x00_rt(rt2x00dev, RT6352)) {
- if (rt2x00dev->default_ant.rx_chain_num == 1) {
- rt2800_bbp_write(rt2x00dev, 91, 0x07);
- rt2800_bbp_write(rt2x00dev, 95, 0x1A);
- rt2800_bbp_write(rt2x00dev, 195, 128);
- rt2800_bbp_write(rt2x00dev, 196, 0xA0);
- rt2800_bbp_write(rt2x00dev, 195, 170);
- rt2800_bbp_write(rt2x00dev, 196, 0x12);
- rt2800_bbp_write(rt2x00dev, 195, 171);
- rt2800_bbp_write(rt2x00dev, 196, 0x10);
- } else {
- rt2800_bbp_write(rt2x00dev, 91, 0x06);
- rt2800_bbp_write(rt2x00dev, 95, 0x9A);
- rt2800_bbp_write(rt2x00dev, 195, 128);
- rt2800_bbp_write(rt2x00dev, 196, 0xE0);
- rt2800_bbp_write(rt2x00dev, 195, 170);
- rt2800_bbp_write(rt2x00dev, 196, 0x30);
- rt2800_bbp_write(rt2x00dev, 195, 171);
- rt2800_bbp_write(rt2x00dev, 196, 0x30);
- }
-
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_bbp_write(rt2x00dev, 75, 0x68);
rt2800_bbp_write(rt2x00dev, 76, 0x4C);
@@ -5635,13 +5621,6 @@ void rt2800_vco_calibration(struct rt2x0
rt2800_bbp_write(rt2x00dev, 80, 0x0C);
rt2800_bbp_write(rt2x00dev, 82, 0xB6);
}
-
- /* On 11A, We should delay and wait RF/BBP to be stable
- * and the appropriate time should be 1000 micro seconds
- * 2005/06/05 - On 11G, we also need this delay time.
- * Otherwise it's difficult to pass the WHQL.
- */
- usleep_range(1000, 1500);
}
}
EXPORT_SYMBOL_GPL(rt2800_vco_calibration);

241
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@ -0,0 +1,241 @@
From cca74bed37af1c8217bcd8282d9b384efdbf73bd Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Thu, 19 Oct 2023 19:58:58 +0800
Subject: wifi: rt2x00: rework MT7620 PA/LNA RF calibration
1. Move MT7620 PA/LNA calibration code to dedicated functions.
2. For external PA/LNA devices, restore RF and BBP registers before
R-Calibration.
3. Do Rx DCOC calibration again before RXIQ calibration.
4. Add some missing LNA related registers' initialization.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB0315979F92DC563019B8F238BCD4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
---
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 176 +++++++++++++++++--------
drivers/net/wireless/ralink/rt2x00/rt2x00.h | 6 +
2 files changed, 130 insertions(+), 52 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -4468,41 +4468,6 @@ static void rt2800_config_channel(struct
rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, bbp);
usleep_range(1000, 1500);
-
- if (test_bit(CAPABILITY_EXTERNAL_PA_TX0,
- &rt2x00dev->cap_flags)) {
- reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
- reg |= 0x00000101;
- rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
-
- reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
- reg |= 0x00000101;
- rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
-
- rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xC8);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xA4);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xC8);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xA4);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xC8);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xA4);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05);
- rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00);
-
- rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
- 0x36303636);
- rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
- 0x6C6C6B6C);
- rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
- 0x6C6C6B6C);
- }
}
bbp = rt2800_bbp_read(rt2x00dev, 4);
@@ -5612,16 +5577,6 @@ void rt2800_vco_calibration(struct rt2x0
}
}
rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
-
- if (rt2x00_rt(rt2x00dev, RT6352)) {
- if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
- rt2800_bbp_write(rt2x00dev, 75, 0x68);
- rt2800_bbp_write(rt2x00dev, 76, 0x4C);
- rt2800_bbp_write(rt2x00dev, 79, 0x1C);
- rt2800_bbp_write(rt2x00dev, 80, 0x0C);
- rt2800_bbp_write(rt2x00dev, 82, 0xB6);
- }
- }
}
EXPORT_SYMBOL_GPL(rt2800_vco_calibration);
@@ -10348,6 +10303,128 @@ do_cal:
rt2800_register_write(rt2x00dev, RF_BYPASS0, MAC_RF_BYPASS0);
}
+static void rt2800_restore_rf_bbp_rt6352(struct rt2x00_dev *rt2x00dev)
+{
+ if (rt2x00_has_cap_external_pa(rt2x00dev)) {
+ rt2800_register_write(rt2x00dev, RF_CONTROL3, 0x0);
+ rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
+ }
+
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x02);
+ }
+
+ if (rt2x00_has_cap_external_pa(rt2x00dev)) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xd3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xb3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xd5);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6c);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xfc);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1f);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xff);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1c);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6b);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xf7);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
+ }
+
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt2800_bbp_write(rt2x00dev, 75, 0x60);
+ rt2800_bbp_write(rt2x00dev, 76, 0x44);
+ rt2800_bbp_write(rt2x00dev, 79, 0x1c);
+ rt2800_bbp_write(rt2x00dev, 80, 0x0c);
+ rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+ }
+
+ if (rt2x00_has_cap_external_pa(rt2x00dev)) {
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x3630363a);
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6c6c666c);
+ rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6c6c666c);
+ }
+}
+
+static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
+{
+ u32 reg;
+
+ if (rt2x00_has_cap_external_pa(rt2x00dev) ||
+ rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ rt2800_restore_rf_bbp_rt6352(rt2x00dev);
+
+ rt2800_r_calibration(rt2x00dev);
+ rt2800_rf_self_txdc_cal(rt2x00dev);
+ rt2800_rxdcoc_calibration(rt2x00dev);
+ rt2800_bw_filter_calibration(rt2x00dev, true);
+ rt2800_bw_filter_calibration(rt2x00dev, false);
+ rt2800_loft_iq_calibration(rt2x00dev);
+
+ /* missing DPD calibration for internal PA devices */
+
+ rt2800_rxdcoc_calibration(rt2x00dev);
+ rt2800_rxiq_calibration(rt2x00dev);
+
+ if (!rt2x00_has_cap_external_pa(rt2x00dev) &&
+ !rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ return;
+
+ if (rt2x00_has_cap_external_pa(rt2x00dev)) {
+ reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
+ reg |= 0x00000101;
+ rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
+
+ reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
+ reg |= 0x00000101;
+ rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
+ }
+
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+ }
+
+ if (rt2x00_has_cap_external_pa(rt2x00dev)) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xc8);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xa4);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xc8);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xa4);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xc8);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xa4);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05);
+ }
+
+ if (rt2x00_has_cap_external_pa(rt2x00dev))
+ rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00);
+
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt2800_bbp_write(rt2x00dev, 75, 0x68);
+ rt2800_bbp_write(rt2x00dev, 76, 0x4c);
+ rt2800_bbp_write(rt2x00dev, 79, 0x1c);
+ rt2800_bbp_write(rt2x00dev, 80, 0x0c);
+ rt2800_bbp_write(rt2x00dev, 82, 0xb6);
+ }
+
+ if (rt2x00_has_cap_external_pa(rt2x00dev)) {
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x36303636);
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6c6c6b6c);
+ rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6c6c6b6c);
+ }
+}
+
static void rt2800_init_rfcsr_6352(struct rt2x00_dev *rt2x00dev)
{
/* Initialize RF central register to default value */
@@ -10612,13 +10689,8 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
- rt2800_r_calibration(rt2x00dev);
- rt2800_rf_self_txdc_cal(rt2x00dev);
- rt2800_rxdcoc_calibration(rt2x00dev);
- rt2800_bw_filter_calibration(rt2x00dev, true);
- rt2800_bw_filter_calibration(rt2x00dev, false);
- rt2800_loft_iq_calibration(rt2x00dev);
- rt2800_rxiq_calibration(rt2x00dev);
+ /* Do calibration and init PA/LNA */
+ rt2800_calibration_rt6352(rt2x00dev);
}
static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
@@ -1263,6 +1263,12 @@ rt2x00_has_cap_external_lna_bg(struct rt
}
static inline bool
+rt2x00_has_cap_external_pa(struct rt2x00_dev *rt2x00dev)
+{
+ return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_PA_TX0);
+}
+
+static inline bool
rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev)
{
return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_DOUBLE_ANTENNA);

177
package/kernel/mac80211/patches/rt2x00/005-1-v6.8-wifi-rt2x00-introduce-DMA-busy-check-watchdog-for-rt.patch Normal file
View file

@ -0,0 +1,177 @@
From b1275cdd7456ef811747dfb4f3c46310ddd300cd Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sat, 4 Nov 2023 16:57:58 +0800
Subject: wifi: rt2x00: introduce DMA busy check watchdog for rt2800
When I tried to fix the watchdog of rt2800, I found that sometimes
the watchdog can not reset the hung device. This is because the
queue is not completely stuck, it just becomes very slow. The MTK
vendor driver for the new chip MT7603/MT7612 has a DMA busy watchdog
to detect device hangs by checking DMA busy status. This watchdog
implementation is something similar to it. To reduce unnecessary
reset, we can check the INT_SOURCE_CSR register together as I found
that when the radio hung, the RX/TX coherent interrupt will always
stuck at triggered state.
The 'watchdog' module parameter has been extended to control all
watchdogs(0=disabled, 1=hang watchdog, 2=DMA watchdog, 3=both). This
new watchdog function is a slight schedule and it won't affect the
transmission speed. So we can turn on it by default. Due to the
INT_SOURCE_CSR register is invalid on rt2800 USB NICs, the DMA busy
watchdog will be automatically disabled for them.
Tested on MT7620 and RT5350.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB0315D7462CE08A119A99DE34BCA4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
---
drivers/net/wireless/ralink/rt2x00/rt2800.h | 4 ++
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 77 ++++++++++++++++++++++----
drivers/net/wireless/ralink/rt2x00/rt2x00.h | 3 +
3 files changed, 73 insertions(+), 11 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
@@ -3194,4 +3194,8 @@ enum rt2800_eeprom_word {
*/
#define BCN_TBTT_OFFSET 64
+/* Watchdog type mask */
+#define RT2800_WATCHDOG_HANG BIT(0)
+#define RT2800_WATCHDOG_DMA_BUSY BIT(1)
+
#endif /* RT2800_H */
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -30,9 +30,10 @@
#include "rt2800lib.h"
#include "rt2800.h"
-static bool modparam_watchdog;
-module_param_named(watchdog, modparam_watchdog, bool, S_IRUGO);
-MODULE_PARM_DESC(watchdog, "Enable watchdog to detect tx/rx hangs and reset hardware if detected");
+static unsigned int modparam_watchdog = RT2800_WATCHDOG_DMA_BUSY;
+module_param_named(watchdog, modparam_watchdog, uint, 0444);
+MODULE_PARM_DESC(watchdog, "Enable watchdog to recover tx/rx hangs.\n"
+ "\t\t(0=disabled, 1=hang watchdog, 2=DMA watchdog(default), 3=both)");
/*
* Register access.
@@ -1261,15 +1262,12 @@ static void rt2800_update_survey(struct
chan_survey->time_ext_busy += rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC);
}
-void rt2800_watchdog(struct rt2x00_dev *rt2x00dev)
+static bool rt2800_watchdog_hung(struct rt2x00_dev *rt2x00dev)
{
struct data_queue *queue;
bool hung_tx = false;
bool hung_rx = false;
- if (test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
- return;
-
rt2800_update_survey(rt2x00dev);
queue_for_each(rt2x00dev, queue) {
@@ -1297,18 +1295,72 @@ void rt2800_watchdog(struct rt2x00_dev *
}
}
+ if (!hung_tx && !hung_rx)
+ return false;
+
if (hung_tx)
rt2x00_warn(rt2x00dev, "Watchdog TX hung detected\n");
if (hung_rx)
rt2x00_warn(rt2x00dev, "Watchdog RX hung detected\n");
- if (hung_tx || hung_rx) {
- queue_for_each(rt2x00dev, queue)
- queue->wd_count = 0;
+ queue_for_each(rt2x00dev, queue)
+ queue->wd_count = 0;
+
+ return true;
+}
+
+static bool rt2800_watchdog_dma_busy(struct rt2x00_dev *rt2x00dev)
+{
+ bool busy_rx, busy_tx;
+ u32 reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
+ u32 reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
+
+ if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_RX_DMA_BUSY) &&
+ rt2x00_get_field32(reg_int, INT_SOURCE_CSR_RX_COHERENT))
+ rt2x00dev->rxdma_busy++;
+ else
+ rt2x00dev->rxdma_busy = 0;
+ if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
+ rt2x00_get_field32(reg_int, INT_SOURCE_CSR_TX_COHERENT))
+ rt2x00dev->txdma_busy++;
+ else
+ rt2x00dev->txdma_busy = 0;
+
+ busy_rx = rt2x00dev->rxdma_busy > 30 ? true : false;
+ busy_tx = rt2x00dev->txdma_busy > 30 ? true : false;
+
+ if (!busy_rx && !busy_tx)
+ return false;
+
+ if (busy_rx)
+ rt2x00_warn(rt2x00dev, "Watchdog RX DMA busy detected\n");
+
+ if (busy_tx)
+ rt2x00_warn(rt2x00dev, "Watchdog TX DMA busy detected\n");
+
+ rt2x00dev->rxdma_busy = 0;
+ rt2x00dev->txdma_busy = 0;
+
+ return true;
+}
+
+void rt2800_watchdog(struct rt2x00_dev *rt2x00dev)
+{
+ bool reset = false;
+
+ if (test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
+ return;
+
+ if (modparam_watchdog & RT2800_WATCHDOG_DMA_BUSY)
+ reset = rt2800_watchdog_dma_busy(rt2x00dev);
+
+ if (modparam_watchdog & RT2800_WATCHDOG_HANG)
+ reset = rt2800_watchdog_hung(rt2x00dev) || reset;
+
+ if (reset)
ieee80211_restart_hw(rt2x00dev->hw);
- }
}
EXPORT_SYMBOL_GPL(rt2800_watchdog);
@@ -12016,6 +12068,9 @@ int rt2800_probe_hw(struct rt2x00_dev *r
__set_bit(REQUIRE_TASKLET_CONTEXT, &rt2x00dev->cap_flags);
}
+ /* USB NICs don't support DMA watchdog as INT_SOURCE_CSR is invalid */
+ if (rt2x00_is_usb(rt2x00dev))
+ modparam_watchdog &= ~RT2800_WATCHDOG_DMA_BUSY;
if (modparam_watchdog) {
__set_bit(CAPABILITY_RESTART_HW, &rt2x00dev->cap_flags);
rt2x00dev->link.watchdog_interval = msecs_to_jiffies(100);
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
@@ -926,6 +926,9 @@ struct rt2x00_dev {
*/
u16 beacon_int;
+ /* Rx/Tx DMA busy watchdog counter */
+ u16 rxdma_busy, txdma_busy;
+
/**
* Timestamp of last received beacon
*/

43
package/kernel/mac80211/patches/rt2x00/005-2-v6.8-wifi-rt2x00-disable-RTS-threshold-for-rt2800-by-defa.patch Normal file
View file

@ -0,0 +1,43 @@
From 570beb6285fd355904b22625da20809f477096c5 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sat, 4 Nov 2023 16:57:59 +0800
Subject: wifi: rt2x00: disable RTS threshold for rt2800 by default
rt2800 has a lot of registers to control the RTS enable/disable
status for different rates. And the driver control them via
rt2800_set_rts_threshold(). When RTS was disabled in user
interface, this function won't be called at all. This means that
the RTS is still 'on' for CCK and OFDM rates. So we'd better to
disable them by default because it should be like this. The RTS
for HT20 and HT40 is already default off so we don't need to
touch them. If we toggle the RTS status, these register bits
will be enable/disable again by rt2800_set_rts_threshold().
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB03155DDB953155B7A2DE849ABCA4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
---
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -6100,7 +6100,7 @@ static int rt2800_init_registers(struct
rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 0);
rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 0);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, 1);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, 0);
rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
reg = rt2800_register_read(rt2x00dev, OFDM_PROT_CFG);
@@ -6113,7 +6113,7 @@ static int rt2800_init_registers(struct
rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 0);
rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 0);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, 1);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, 0);
rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
reg = rt2800_register_read(rt2x00dev, MM20_PROT_CFG);

67
package/kernel/mac80211/patches/rt2x00/005-3-v6.8-wifi-rt2x00-restart-beacon-queue-when-hardware-reset.patch Normal file
View file

@ -0,0 +1,67 @@
From a11d965a218f0cd95b13fe44d0bcd8a20ce134a8 Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Sat, 4 Nov 2023 16:58:00 +0800
Subject: wifi: rt2x00: restart beacon queue when hardware reset
When a hardware reset is triggered, all registers are reset, so all
queues are forced to stop in hardware interface. However, mac80211
will not automatically stop the queue. If we don't manually stop the
beacon queue, the queue will be deadlocked and unable to start again.
This patch fixes the issue where Apple devices cannot connect to the
AP after calling ieee80211_restart_hw().
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB031530EB6D98DCE4DF20766CBCA4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
---
drivers/net/wireless/ralink/rt2x00/rt2x00dev.c | 3 +++
drivers/net/wireless/ralink/rt2x00/rt2x00mac.c | 11 +++++++++++
2 files changed, 14 insertions(+)
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
@@ -101,6 +101,7 @@ void rt2x00lib_disable_radio(struct rt2x
rt2x00link_stop_tuner(rt2x00dev);
rt2x00queue_stop_queues(rt2x00dev);
rt2x00queue_flush_queues(rt2x00dev, true);
+ rt2x00queue_stop_queue(rt2x00dev->bcn);
/*
* Disable radio.
@@ -1286,6 +1287,7 @@ int rt2x00lib_start(struct rt2x00_dev *r
rt2x00dev->intf_ap_count = 0;
rt2x00dev->intf_sta_count = 0;
rt2x00dev->intf_associated = 0;
+ rt2x00dev->intf_beaconing = 0;
/* Enable the radio */
retval = rt2x00lib_enable_radio(rt2x00dev);
@@ -1312,6 +1314,7 @@ void rt2x00lib_stop(struct rt2x00_dev *r
rt2x00dev->intf_ap_count = 0;
rt2x00dev->intf_sta_count = 0;
rt2x00dev->intf_associated = 0;
+ rt2x00dev->intf_beaconing = 0;
}
static inline void rt2x00lib_set_if_combinations(struct rt2x00_dev *rt2x00dev)
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00mac.c
@@ -598,6 +598,17 @@ void rt2x00mac_bss_info_changed(struct i
*/
if (changes & BSS_CHANGED_BEACON_ENABLED) {
mutex_lock(&intf->beacon_skb_mutex);
+
+ /*
+ * Clear the 'enable_beacon' flag and clear beacon because
+ * the beacon queue has been stopped after hardware reset.
+ */
+ if (test_bit(DEVICE_STATE_RESET, &rt2x00dev->flags) &&
+ intf->enable_beacon) {
+ intf->enable_beacon = false;
+ rt2x00queue_clear_beacon(rt2x00dev, vif);
+ }
+
if (!bss_conf->enable_beacon && intf->enable_beacon) {
rt2x00dev->intf_beaconing--;
intf->enable_beacon = false;

26
package/kernel/mac80211/patches/rt2x00/101-wifi-rt2x00-correct-wrong-BBP-register-in-RxDCOC-cal.patch Normal file
View file

@ -0,0 +1,26 @@
From: Shiji Yang <yangshiji66@outlook.com>
Date: Thu, 9 Nov 2023 12:01:18 +0800
Subject: [PATCH] wifi: rt2x00: correct wrong BBP register in RxDCOC
calibration
Refer to Mediatek vendor driver RxDCOC_Calibration() function, when
performing gainfreeze calibration, we should write register 140
instead of 141. This fix can reduce the total calibration time from
6 seconds to 1 second.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -8711,7 +8711,7 @@ static void rt2800_rxdcoc_calibration(st
rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r4);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 4, saverfb7r4);
- rt2800_bbp_write(rt2x00dev, 158, 141);
+ rt2800_bbp_write(rt2x00dev, 158, 140);
bbpreg = rt2800_bbp_read(rt2x00dev, 159);
bbpreg = bbpreg & (~0x40);
rt2800_bbp_write(rt2x00dev, 159, bbpreg);

3
package/kernel/mac80211/patches/rt2x00/602-03-wifi-rt2x00-Add-support-for-loading-EEPROM-from-MTD.patch
View file

@ -94,7 +94,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
static const char *
rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
{
@@ -83,5 +141,13 @@ err_exit:
@@ -83,6 +141,14 @@ err_exit:
int rt2x00lib_read_eeprom(struct rt2x00_dev *rt2x00dev)
{
@ -108,3 +108,4 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+
return rt2x00lib_read_eeprom_file(rt2x00dev);
}
EXPORT_SYMBOL_GPL(rt2x00lib_read_eeprom);

3
package/kernel/mac80211/patches/rt2x00/602-05-wifi-rt2x00-support-loading-eeprom-from-NVMEM-cells.patch
View file

@ -84,7 +84,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
static const char *
rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
{
@@ -164,5 +199,9 @@ int rt2x00lib_read_eeprom(struct rt2x00_
@@ -164,6 +199,10 @@ int rt2x00lib_read_eeprom(struct rt2x00_
return 0;
#endif
@ -94,3 +94,4 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+
return rt2x00lib_read_eeprom_file(rt2x00dev);
}
EXPORT_SYMBOL_GPL(rt2x00lib_read_eeprom);

2
package/kernel/mac80211/patches/rt2x00/606-rt2x00-allow_disabling_bands_through_platform_data.patch
View file

@ -12,7 +12,7 @@
#endif /* _RT2X00_PLATFORM_H */
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
@@ -1007,6 +1007,22 @@ static int rt2x00lib_probe_hw_modes(stru
@@ -1008,6 +1008,22 @@ static int rt2x00lib_probe_hw_modes(stru
unsigned int num_rates;
unsigned int i;

2
package/kernel/mac80211/patches/rt2x00/607-rt2x00-add_platform_data_mac_addr.patch
View file

@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
@@ -989,6 +989,12 @@ static void rt2x00lib_rate(struct ieee80
@@ -990,6 +990,12 @@ static void rt2x00lib_rate(struct ieee80
void rt2x00lib_set_mac_address(struct rt2x00_dev *rt2x00dev, u8 *eeprom_mac_addr)
{

2
package/kernel/mac80211/patches/rt2x00/608-rt2x00-allow_disabling_bands_through_dts.patch
View file

@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
@@ -1012,6 +1012,16 @@ static int rt2x00lib_probe_hw_modes(stru
@@ -1013,6 +1013,16 @@ static int rt2x00lib_probe_hw_modes(stru
struct ieee80211_rate *rates;
unsigned int num_rates;
unsigned int i;

2
package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
View file

@ -8,7 +8,7 @@
#include "rt2x00.h"
#include "rt2800lib.h"
@@ -11129,6 +11130,17 @@ static int rt2800_init_eeprom(struct rt2
@@ -11285,6 +11286,17 @@ static int rt2800_init_eeprom(struct rt2
rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);

2
package/kernel/mac80211/patches/rt2x00/611-rt2x00-add-AP+STA-support.patch
View file

@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
@@ -1359,7 +1359,7 @@ static inline void rt2x00lib_set_if_comb
@@ -1362,7 +1362,7 @@ static inline void rt2x00lib_set_if_comb
*/
if_limit = &rt2x00dev->if_limits_ap;
if_limit->max = rt2x00dev->ops->max_ap_intf;

74
package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
View file

@ -27,7 +27,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -304,6 +304,24 @@ static void rt2800_rf_write(struct rt2x0
@@ -305,6 +305,24 @@ static void rt2800_rf_write(struct rt2x0
mutex_unlock(&rt2x00dev->csr_mutex);
}
@ -52,67 +52,27 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
[EEPROM_CHIP_ID] = 0x0000,
[EEPROM_VERSION] = 0x0001,
@@ -4469,6 +4487,29 @@ static void rt2800_config_channel(struct
rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
0x6C6C6B6C);
}
+
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
+ reg |= 0x00000101;
+ rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
+
+ reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
+ reg |= 0x00000101;
+ rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
+
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+ rt2800_bbp_write(rt2x00dev, 75, 0x68);
+ rt2800_bbp_write(rt2x00dev, 76, 0x4C);
+ rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+ rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+ rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+ /* bank 0 RF reg 42 and glrt BBP reg 141 will be set in
+ * config channel function in dependence of channel and
+ * HT20/HT40 so don't touch it
+ */
+ }
}
@@ -10407,8 +10425,10 @@ static void rt2800_calibration_rt6352(st
u32 reg;
bbp = rt2800_bbp_read(rt2x00dev, 4);
@@ -10581,6 +10622,7 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
if (rt2x00_has_cap_external_pa(rt2x00dev) ||
- rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt6352_enable_pa_pin(rt2x00dev, 0);
rt2800_restore_rf_bbp_rt6352(rt2x00dev);
+ }
+ rt6352_enable_pa_pin(rt2x00dev, 0);
rt2800_r_calibration(rt2x00dev);
rt2800_rf_self_txdc_cal(rt2x00dev);
rt2800_rxdcoc_calibration(rt2x00dev);
@@ -10588,6 +10630,22 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_bw_filter_calibration(rt2x00dev, false);
rt2800_loft_iq_calibration(rt2x00dev);
rt2800_rxiq_calibration(rt2x00dev);
@@ -10426,6 +10446,8 @@ static void rt2800_calibration_rt6352(st
!rt2x00_has_cap_external_lna_bg(rt2x00dev))
return;
+ rt6352_enable_pa_pin(rt2x00dev, 1);
+
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+ rt2800_bbp_write(rt2x00dev, 75, 0x68);
+ rt2800_bbp_write(rt2x00dev, 76, 0x4C);
+ rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+ rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+ rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+ /* bank 0 RF reg 42 and glrt BBP reg 141 will be set in config
+ * channel function in dependence of channel and HT20/HT40,
+ * so don't touch them here.
+ */
+ }
}
static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
if (rt2x00_has_cap_external_pa(rt2x00dev)) {
reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
reg |= 0x00000101;
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
@@ -28,6 +28,7 @@
@ -123,7 +83,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
#include <linux/rt2x00_platform.h>
#include <net/mac80211.h>
@@ -1024,6 +1025,11 @@ struct rt2x00_dev {
@@ -1027,6 +1028,11 @@ struct rt2x00_dev {
/* Clock for System On Chip devices. */
struct clk *clk;

108
package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
View file

@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
@@ -1044,6 +1044,11 @@
@@ -1056,6 +1056,11 @@
#define MIMO_PS_CFG_RX_STBY_POL FIELD32(0x00000010)
#define MIMO_PS_CFG_RX_RX_STBY0 FIELD32(0x00000020)
@ -14,7 +14,7 @@
*/
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -3778,14 +3778,16 @@ static void rt2800_config_channel_rf7620
@@ -3836,14 +3836,16 @@ static void rt2800_config_channel_rf7620
rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
@ -39,7 +39,7 @@
rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
@@ -3819,18 +3821,23 @@ static void rt2800_config_channel_rf7620
@@ -3877,18 +3879,23 @@ static void rt2800_config_channel_rf7620
rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
}
@ -73,7 +73,7 @@
if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
if (conf_is_ht40(conf)) {
@@ -3929,25 +3936,29 @@ static void rt2800_config_alc(struct rt2
@@ -4002,25 +4009,29 @@ static void rt2800_config_alc_rt6352(str
if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY)))
rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n");
@ -121,7 +121,17 @@
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
rt2800_vco_calibration(rt2x00dev);
@@ -6011,18 +6022,33 @@ static int rt2800_init_registers(struct
@@ -4513,7 +4524,8 @@ static void rt2800_config_channel(struct
if (rt2x00_rt(rt2x00dev, RT6352)) {
/* BBP for GLRT BW */
bbp = conf_is_ht40(conf) ?
- 0x10 : rt2x00_has_cap_external_lna_bg(rt2x00dev) ?
+ 0x10 : !rt2x00_has_cap_external_lna_bg(rt2x00dev) ?
+ 0x1a : rt2800_hw_get_chippkg(rt2x00dev) == 1 ?
0x15 : 0x1a;
rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
@@ -6017,18 +6029,33 @@ static int rt2800_init_registers(struct
} else if (rt2x00_rt(rt2x00dev, RT5350)) {
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
} else if (rt2x00_rt(rt2x00dev, RT6352)) {
@ -167,7 +177,7 @@
reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
@@ -7127,14 +7153,16 @@ static void rt2800_init_bbp_6352(struct
@@ -7141,14 +7168,16 @@ static void rt2800_init_bbp_6352(struct
rt2800_bbp_write(rt2x00dev, 188, 0x00);
rt2800_bbp_write(rt2x00dev, 189, 0x00);
@ -192,7 +202,27 @@
/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
@@ -10406,31 +10434,36 @@ static void rt2800_init_rfcsr_6352(struc
@@ -10381,6 +10410,9 @@ static void rt2800_restore_rf_bbp_rt6352
rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
}
+ if (rt2800_hw_get_chippkg(rt2x00dev) != 1)
+ return;
+
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
@@ -10458,6 +10490,9 @@ static void rt2800_calibration_rt6352(st
rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
}
+ if (rt2800_hw_get_chippkg(rt2x00dev) != 1)
+ return;
+
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
@@ -10548,31 +10583,36 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
@ -254,7 +284,7 @@
/* Initialize RF channel register to default value */
rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
@@ -10496,63 +10529,71 @@ static void rt2800_init_rfcsr_6352(struc
@@ -10638,63 +10678,71 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
@ -288,33 +318,6 @@
- rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
-
- rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
-
- rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
-
- /* Initialize RF channel register for DRQFN */
- rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7);
+ if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x47);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x71);
@ -347,7 +350,16 @@
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
+ }
+
- rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
+ if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
+ rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51);
@ -367,7 +379,23 @@
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+ }
+
- rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
-
- /* Initialize RF channel register for DRQFN */
- rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7);
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 0 &&
+ rt2800_hw_get_chipver(rt2x00dev) == 1) {
+ /* Initialize RF channel register for DRQFN */
@ -383,7 +411,7 @@
/* Initialize RF DC calibration register to default value */
rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
@@ -10615,12 +10656,17 @@ static void rt2800_init_rfcsr_6352(struc
@@ -10757,12 +10805,17 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
@ -404,5 +432,5 @@
+ rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+ }
rt6352_enable_pa_pin(rt2x00dev, 0);
rt2800_r_calibration(rt2x00dev);
/* Do calibration and init PA/LNA */
rt2800_calibration_rt6352(rt2x00dev);

413
package/kernel/mac80211/patches/rt2x00/998-wifi-rt2x00-rework-MT7620-PA-LNA-RF-calibration.patch
View file

@ -1,413 +0,0 @@
From: Shiji Yang <yangshiji66@outlook.com>
Date: Tue, 25 Jul 2023 20:05:06 +0800
Subject: [PATCH] wifi: rt2x00: rework MT7620 PA/LNA RF calibration
1. Move MT7620 PA/LNA calibration code to dedicated functions.
2. For external PA/LNA devices, restore RF and BBP registers before
R-Calibration.
3. Do Rx DCOC calibration again before RXIQ calibration.
4. Correct MAC_SYS_CTRL register RX mask to 0x08 in R-Calibration
function. For MAC_SYS_CTRL register, Bit[2] controls MAC_TX_EN
and Bit[3] controls MAC_RX_EN (Bit index starts from 0).
5. Move the channel configuration code from rt2800_vco_calibration()
to the rt2800_config_channel().
6. Use MT7620 SOC specific AGC initial LNA value instead of the
RT5592's value.
7. Adjust the register operation sequence according to the vendor
driver code. This may not be useful, but it can make things
clearer when developers try to review it.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
.../net/wireless/ralink/rt2x00/rt2800lib.c | 306 ++++++++++--------
drivers/net/wireless/ralink/rt2x00/rt2x00.h | 6 +
2 files changed, 182 insertions(+), 130 deletions(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -3881,14 +3881,6 @@ static void rt2800_config_channel_rf7620
rfcsr |= tx_agc_fc;
rt2800_rfcsr_write_bank(rt2x00dev, 7, 59, rfcsr);
}
-
- if (conf_is_ht40(conf)) {
- rt2800_bbp_glrt_write(rt2x00dev, 141, 0x10);
- rt2800_bbp_glrt_write(rt2x00dev, 157, 0x2f);
- } else {
- rt2800_bbp_glrt_write(rt2x00dev, 141, 0x1a);
- rt2800_bbp_glrt_write(rt2x00dev, 157, 0x40);
- }
}
static void rt2800_config_alc_rt6352(struct rt2x00_dev *rt2x00dev,
@@ -4457,89 +4449,63 @@ static void rt2800_config_channel(struct
usleep_range(1000, 1500);
}
- if (rt2x00_rt(rt2x00dev, RT5592) || rt2x00_rt(rt2x00dev, RT6352)) {
+ if (rt2x00_rt(rt2x00dev, RT5592)) {
reg = 0x10;
- if (!conf_is_ht40(conf)) {
- if (rt2x00_rt(rt2x00dev, RT6352) &&
- rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
- reg |= 0x5;
- } else {
- reg |= 0xa;
- }
- }
+ if (!conf_is_ht40(conf))
+ reg |= 0xa;
rt2800_bbp_write(rt2x00dev, 195, 141);
rt2800_bbp_write(rt2x00dev, 196, reg);
- /* AGC init.
- * Despite the vendor driver using different values here for
- * RT6352 chip, we use 0x1c for now. This may have to be changed
- * once TSSI got implemented.
- */
reg = (rf->channel <= 14 ? 0x1c : 0x24) + 2*rt2x00dev->lna_gain;
rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg);
-
- if (rt2x00_rt(rt2x00dev, RT5592))
- rt2800_iq_calibrate(rt2x00dev, rf->channel);
+
+ rt2800_iq_calibrate(rt2x00dev, rf->channel);
}
if (rt2x00_rt(rt2x00dev, RT6352)) {
- if (test_bit(CAPABILITY_EXTERNAL_PA_TX0,
- &rt2x00dev->cap_flags)) {
- reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
- reg |= 0x00000101;
- rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
-
- reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
- reg |= 0x00000101;
- rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
-
- rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xC8);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xA4);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xC8);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xA4);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xC8);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xA4);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05);
- rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00);
+ /* BBP for GLRT BW */
+ if (conf_is_ht40(conf)) {
+ rt2800_bbp_glrt_write(rt2x00dev, 141, 0x10);
+ rt2800_bbp_glrt_write(rt2x00dev, 157, 0x2f);
+ } else {
+ rt2800_bbp_glrt_write(rt2x00dev, 141, 0x1a);
+ rt2800_bbp_glrt_write(rt2x00dev, 157, 0x40);
- rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
- 0x36303636);
- rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
- 0x6C6C6B6C);
- rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
- 0x6C6C6B6C);
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+ rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ rt2800_bbp_glrt_write(rt2x00dev, 141, 0x15);
}
- if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
- reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
- reg |= 0x00000101;
- rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
-
- reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
- reg |= 0x00000101;
- rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
-
- rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
- rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
- rt2800_bbp_write(rt2x00dev, 75, 0x68);
- rt2800_bbp_write(rt2x00dev, 76, 0x4C);
- rt2800_bbp_write(rt2x00dev, 79, 0x1C);
- rt2800_bbp_write(rt2x00dev, 80, 0x0C);
- rt2800_bbp_write(rt2x00dev, 82, 0xB6);
- /* bank 0 RF reg 42 and glrt BBP reg 141 will be set in
- * config channel function in dependence of channel and
- * HT20/HT40 so don't touch it
- */
+ if (rt2x00dev->default_ant.rx_chain_num == 1) {
+ rt2800_bbp_write(rt2x00dev, 91, 0x07);
+ rt2800_bbp_write(rt2x00dev, 95, 0x1A);
+ rt2800_bbp_write(rt2x00dev, 195, 128);
+ rt2800_bbp_write(rt2x00dev, 196, 0xA0);
+ rt2800_bbp_write(rt2x00dev, 195, 170);
+ rt2800_bbp_write(rt2x00dev, 196, 0x12);
+ rt2800_bbp_write(rt2x00dev, 195, 171);
+ rt2800_bbp_write(rt2x00dev, 196, 0x10);
+ } else {
+ rt2800_bbp_write(rt2x00dev, 91, 0x06);
+ rt2800_bbp_write(rt2x00dev, 95, 0x9A);
+ rt2800_bbp_write(rt2x00dev, 195, 128);
+ rt2800_bbp_write(rt2x00dev, 196, 0xE0);
+ rt2800_bbp_write(rt2x00dev, 195, 170);
+ rt2800_bbp_write(rt2x00dev, 196, 0x30);
+ rt2800_bbp_write(rt2x00dev, 195, 171);
+ rt2800_bbp_write(rt2x00dev, 196, 0x30);
}
+
+ /* AGC init */
+ reg = rf->channel <= 14 ? 0x04 + 2 * rt2x00dev->lna_gain : 0;
+ rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg);
+
+ /* On 11A, We should delay and wait RF/BBP to be stable
+ * and the appropriate time should be 1000 micro seconds
+ * 2005/06/05 - On 11G, we also need this delay time.
+ * Otherwise it's difficult to pass the WHQL.
+ */
+ usleep_range(1000, 1500);
}
bbp = rt2800_bbp_read(rt2x00dev, 4);
@@ -5649,43 +5615,6 @@ void rt2800_vco_calibration(struct rt2x0
}
}
rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
-
- if (rt2x00_rt(rt2x00dev, RT6352)) {
- if (rt2x00dev->default_ant.rx_chain_num == 1) {
- rt2800_bbp_write(rt2x00dev, 91, 0x07);
- rt2800_bbp_write(rt2x00dev, 95, 0x1A);
- rt2800_bbp_write(rt2x00dev, 195, 128);
- rt2800_bbp_write(rt2x00dev, 196, 0xA0);
- rt2800_bbp_write(rt2x00dev, 195, 170);
- rt2800_bbp_write(rt2x00dev, 196, 0x12);
- rt2800_bbp_write(rt2x00dev, 195, 171);
- rt2800_bbp_write(rt2x00dev, 196, 0x10);
- } else {
- rt2800_bbp_write(rt2x00dev, 91, 0x06);
- rt2800_bbp_write(rt2x00dev, 95, 0x9A);
- rt2800_bbp_write(rt2x00dev, 195, 128);
- rt2800_bbp_write(rt2x00dev, 196, 0xE0);
- rt2800_bbp_write(rt2x00dev, 195, 170);
- rt2800_bbp_write(rt2x00dev, 196, 0x30);
- rt2800_bbp_write(rt2x00dev, 195, 171);
- rt2800_bbp_write(rt2x00dev, 196, 0x30);
- }
-
- if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
- rt2800_bbp_write(rt2x00dev, 75, 0x68);
- rt2800_bbp_write(rt2x00dev, 76, 0x4C);
- rt2800_bbp_write(rt2x00dev, 79, 0x1C);
- rt2800_bbp_write(rt2x00dev, 80, 0x0C);
- rt2800_bbp_write(rt2x00dev, 82, 0xB6);
- }
-
- /* On 11A, We should delay and wait RF/BBP to be stable
- * and the appropriate time should be 1000 micro seconds
- * 2005/06/05 - On 11G, we also need this delay time.
- * Otherwise it's difficult to pass the WHQL.
- */
- usleep_range(1000, 1500);
- }
}
EXPORT_SYMBOL_GPL(rt2800_vco_calibration);
@@ -8650,7 +8579,7 @@ static void rt2800_r_calibration(struct
rt2x00_warn(rt2x00dev, "Wait MAC Tx Status to MAX !!!\n");
maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
- maccfg &= (~0x04);
+ maccfg &= (~0x08);
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY_RX)))
@@ -10686,30 +10615,143 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
}
+}
- rt6352_enable_pa_pin(rt2x00dev, 0);
- rt2800_r_calibration(rt2x00dev);
- rt2800_rf_self_txdc_cal(rt2x00dev);
- rt2800_rxdcoc_calibration(rt2x00dev);
- rt2800_bw_filter_calibration(rt2x00dev, true);
- rt2800_bw_filter_calibration(rt2x00dev, false);
- rt2800_loft_iq_calibration(rt2x00dev);
- rt2800_rxiq_calibration(rt2x00dev);
- rt6352_enable_pa_pin(rt2x00dev, 1);
+static void rt2800_init_palna_rt6352(struct rt2x00_dev *rt2x00dev)
+{
+ u32 reg;
+
+ if (rt2x00_has_cap_external_pa(rt2x00dev)) {
+ reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
+ reg |= 0x00000101;
+ rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
+
+ reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
+ reg |= 0x00000101;
+ rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
+ }
- if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+ rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+ }
+
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+ rt2x00_has_cap_external_pa(rt2x00dev)) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xC8);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xA4);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xC8);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xA4);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xC8);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xA4);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05);
+ }
+
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+ rt2x00_has_cap_external_pa(rt2x00dev))
+ rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00);
+
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+ rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_bbp_write(rt2x00dev, 75, 0x68);
rt2800_bbp_write(rt2x00dev, 76, 0x4C);
rt2800_bbp_write(rt2x00dev, 79, 0x1C);
rt2800_bbp_write(rt2x00dev, 80, 0x0C);
rt2800_bbp_write(rt2x00dev, 82, 0xB6);
- /* bank 0 RF reg 42 and glrt BBP reg 141 will be set in config
- * channel function in dependence of channel and HT20/HT40,
- * so don't touch them here.
- */
+ }
+
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+ rt2x00_has_cap_external_pa(rt2x00dev)) {
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x36303636);
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6C6C6B6C);
+ rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6C6C6B6C);
+ }
+}
+
+static void rt2800_restore_rf_bbp_rt6352(struct rt2x00_dev *rt2x00dev)
+{
+ if (rt2x00_has_cap_external_pa(rt2x00dev)) {
+ rt2800_register_write(rt2x00dev, RF_CONTROL3, 0x0);
+ rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
+ }
+
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+ rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x02);
+ }
+
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+ rt2x00_has_cap_external_pa(rt2x00dev)) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
+ }
+
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+ rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt2800_bbp_write(rt2x00dev, 75, 0x60);
+ rt2800_bbp_write(rt2x00dev, 76, 0x44);
+ rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+ rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+ rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+ }
+
+ if (rt2800_hw_get_chippkg(rt2x00dev) == 1 &&
+ rt2x00_has_cap_external_pa(rt2x00dev)) {
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x3630363A);
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6C6C666C);
+ rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6C6C666C);
+ }
+}
+
+static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
+{
+ if (rt2x00_has_cap_external_pa(rt2x00dev) ||
+ rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt6352_enable_pa_pin(rt2x00dev, 0);
+ rt2800_restore_rf_bbp_rt6352(rt2x00dev);
+ }
+
+ rt2800_r_calibration(rt2x00dev);
+ rt2800_rf_self_txdc_cal(rt2x00dev);
+ rt2800_rxdcoc_calibration(rt2x00dev);
+ rt2800_bw_filter_calibration(rt2x00dev, true);
+ rt2800_bw_filter_calibration(rt2x00dev, false);
+ rt2800_loft_iq_calibration(rt2x00dev);
+
+ /* missing DPD Calibration for devices using internal PA */
+
+ rt2800_rxdcoc_calibration(rt2x00dev);
+ rt2800_rxiq_calibration(rt2x00dev);
+
+ if (rt2x00_has_cap_external_pa(rt2x00dev) ||
+ rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt6352_enable_pa_pin(rt2x00dev, 1);
+ rt2800_init_palna_rt6352(rt2x00dev);
}
}
@@ -10802,6 +10844,10 @@ int rt2800_enable_radio(struct rt2x00_de
rt2800_init_bbp(rt2x00dev);
rt2800_init_rfcsr(rt2x00dev);
+ /* Do calibration and init PA/LNA for RT6352 */
+ if (rt2x00_rt(rt2x00dev, RT6352))
+ rt2800_calibration_rt6352(rt2x00dev);
+
if (rt2x00_is_usb(rt2x00dev) &&
(rt2x00_rt(rt2x00dev, RT3070) ||
rt2x00_rt(rt2x00dev, RT3071) ||
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
@@ -1272,6 +1272,12 @@ rt2x00_has_cap_external_lna_bg(struct rt
}
static inline bool
+rt2x00_has_cap_external_pa(struct rt2x00_dev *rt2x00dev)
+{
+ return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_PA_TX0);
+}
+
+static inline bool
rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev)
{
return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_DOUBLE_ANTENNA);

147
package/kernel/mac80211/realtek.mk
View file

@ -1,7 +1,9 @@
PKG_DRIVERS += \
rtlwifi rtlwifi-pci rtlwifi-btcoexist rtlwifi-usb rtl8192c-common \
rtl8192ce rtl8192se rtl8192de rtl8192cu rtl8723bs rtl8821ae \
rtl8xxxu rtw88
rtl8xxxu rtw88 rtw88-pci rtw88-usb rtw88-8821c rtw88-8822b rtw88-8822c \
rtw88-8723d rtw88-8821ce rtw88-8821cu rtw88-8822be rtw88-8822bu \
rtw88-8822ce rtw88-8822cu rtw88-8723de
config-$(call config_package,rtlwifi) += RTL_CARDS RTLWIFI
config-$(call config_package,rtlwifi-pci) += RTLWIFI_PCI
@ -21,8 +23,20 @@ config-y += RTL8XXXU_UNTESTED
config-$(call config_package,rtl8723bs) += RTL8723BS
config-y += STAGING
config-$(call config_package,rtw88) += RTW88 RTW88_CORE RTW88_PCI
config-y += RTW88_8822BE RTW88_8822CE RTW88_8723DE
config-$(call config_package,rtw88) += RTW88 RTW88_CORE
config-$(call config_package,rtw88-pci) += RTW88_PCI
config-$(call config_package,rtw88-usb) += RTW88_USB
config-$(call config_package,rtw88-8821c) += RTW88_8821C
config-$(call config_package,rtw88-8821ce) += RTW88_8821CE
config-$(call config_package,rtw88-8821cu) += RTW88_8821CU
config-$(call config_package,rtw88-8822b) += RTW88_8822B
config-$(call config_package,rtw88-8822be) += RTW88_8822BE
config-$(call config_package,rtw88-8822bu) += RTW88_8822BU
config-$(call config_package,rtw88-8822c) += RTW88_8822C
config-$(call config_package,rtw88-8822ce) += RTW88_8822CE
config-$(call config_package,rtw88-8822cu) += RTW88_8822CU
config-$(call config_package,rtw88-8723d) += RTW88_8723D
config-$(call config_package,rtw88-8723de) += RTW88_8723DE
config-$(CONFIG_PACKAGE_RTW88_DEBUG) += RTW88_DEBUG
config-$(CONFIG_PACKAGE_RTW88_DEBUGFS) += RTW88_DEBUGFS
@ -168,18 +182,121 @@ endef
define KernelPackage/rtw88
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8822BE/RTL8822CE/RTL8723DE
DEPENDS+= @(PCI_SUPPORT) +kmod-mac80211 +@DRIVER_11AC_SUPPORT
FILES:=\
$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822be.ko \
$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822b.ko \
$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822ce.ko \
$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822c.ko \
$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723de.ko \
$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723d.ko \
$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_core.ko \
$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_pci.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8822be rtw88_8822ce rtw88_8723de)
TITLE:=Realtek RTW88 common part
DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT) +kmod-mac80211
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_core.ko
AUTOLOAD:=$(call AutoProbe,rtw88_core)
HIDDEN:=1
endef
define KernelPackage/rtw88-pci
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTW88 PCI chips support
DEPENDS+= @PCI_SUPPORT +kmod-rtw88
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_pci.ko
AUTOLOAD:=$(call AutoProbe,rtw88_pci)
HIDDEN:=1
endef
define KernelPackage/rtw88-usb
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTW88 USB chips support
DEPENDS+= @USB_SUPPORT +kmod-rtw88 +kmod-usb-core
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_usb.ko
AUTOLOAD:=$(call AutoProbe,rtw88_usb)
HIDDEN:=1
endef
define KernelPackage/rtw88-8821c
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8821C family support
DEPENDS+= +kmod-rtw88 +rtl8821ce-firmware +@DRIVER_11AC_SUPPORT
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8821c.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8821c)
HIDDEN:=1
endef
define KernelPackage/rtw88-8822b
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8822B family support
DEPENDS+= +kmod-rtw88 +rtl8822be-firmware +@DRIVER_11AC_SUPPORT
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822b.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8822b)
HIDDEN:=1
endef
define KernelPackage/rtw88-8822c
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8822C family support
DEPENDS+= +kmod-rtw88 +rtl8822ce-firmware +@DRIVER_11AC_SUPPORT
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822c.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8822c)
HIDDEN:=1
endef
define KernelPackage/rtw88-8723d
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8723D family support
DEPENDS+= +kmod-rtw88 +rtl8723de-firmware
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723d.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8723d)
HIDDEN:=1
endef
define KernelPackage/rtw88-8821ce
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8821CE support
DEPENDS+= +kmod-rtw88-pci +kmod-rtw88-8821c
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8821ce.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8821ce)
endef
define KernelPackage/rtw88-8821cu
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8821CU support
DEPENDS+= +kmod-rtw88-usb +kmod-rtw88-8821c
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8821cu.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8821cu)
endef
define KernelPackage/rtw88-8822be
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8822BE support
DEPENDS+= +kmod-rtw88-pci +kmod-rtw88-8822b
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822be.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8822be)
endef
define KernelPackage/rtw88-8822bu
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8822BU support
DEPENDS+= +kmod-rtw88-usb +kmod-rtw88-8822b
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822bu.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8822bu)
endef
define KernelPackage/rtw88-8822ce
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8822CE support
DEPENDS+= +kmod-rtw88-pci +kmod-rtw88-8822c
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822ce.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8822ce)
endef
define KernelPackage/rtw88-8822cu
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8822CU support
DEPENDS+= +kmod-rtw88-usb +kmod-rtw88-8822c
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822cu.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8822cu)
endef
define KernelPackage/rtw88-8723de
$(call KernelPackage/mac80211/Default)
TITLE:=Realtek RTL8723DE support
DEPENDS+= +kmod-rtw88-pci +kmod-rtw88-8723d
FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723de.ko
AUTOLOAD:=$(call AutoProbe,rtw88_8723)
endef
define KernelPackage/rtl8723bs

7
package/kernel/qca-ssdk/Makefile
View file

@ -1,7 +1,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-ssdk
PKG_RELEASE:=1
PKG_RELEASE:=4
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk.git
PKG_SOURCE_PROTO:=git
@ -43,10 +43,13 @@ MAKE_FLAGS+= \
TARGET_SUFFIX=$(CONFIG_TARGET_SUFFIX) \
GCC_VERSION=$(GCC_VERSION) \
EXTRA_CFLAGS=-fno-stack-protector -I$(STAGING_DIR)/usr/include \
SoC=$(CONFIG_TARGET_SUBTARGET) \
PTP_FEATURE=disable SWCONFIG_FEATURE=disable \
ISISC_ENABLE=disable IN_QCA803X_PHY=FALSE \
$(LNX_CONFIG_OPTS)
ifeq ($(CONFIG_TARGET_SUBTARGET), "ipq807x")
MAKE_FLAGS+= CHIP_TYPE=HPPE PTP_FEATURE=disable SWCONFIG_FEATURE=disable
MAKE_FLAGS+= CHIP_TYPE=HPPE
endif
define Build/InstallDev

131
package/kernel/qca-ssdk/patches/100-malibu-phy-add-support-for-manual-define-of-first-ph.patch Normal file
View file

@ -0,0 +1,131 @@
From a651d10fbd880098d7b98dee27dfd1eb15146fb2 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Sun, 12 Nov 2023 18:40:22 +0100
Subject: [PATCH] malibu-phy: add support for manual define of first phy addr
The usage of first_phy_addr is EXTREMELY FRAGILE and results
in dangerous results if the OEM (or anyone that by chance try to
implement things in a logical manner) deviates from the default values
from the "magical template".
To be in more details. With QSDK 12.4, some tweaks were done to improve
autoneg and now on every call of port status, the phydev is tried to
add. This resulted in the call and log spam of an error with ports that
are actually not present on the system with qsdk reporting phydev is
NULL. This itself is not an error and printing the error is correct.
What is actually an error from ages is setting generic bitmap reporting
presence of port that are actually not present. This is very common on
OEM where the switch_lan_bmp is always a variant of 0x1e (that on bitmap
results in PORT1 PORT2 PORT3 PORT4 present) or 0x3e (PORT1 PORT2 PORT3
PORT4 PORT5). Reality is that many device are used as AP with one LAN
port or one WAN port. (or even exotic configuration with PORT1 not
present and PORT2 PORT3 PORT4 present (Xiaomi 3600)
With this finding one can say... ok nice, then lets update the DT and
set the correct bitmap...
Again world is a bad place and reality is that this cause wonderful
regression in some case of by extreme luck the first ever connected
port working and the rest of the switch dead.
The problem has been bisected to all the device that doesn't have the
PORT1 declared in any of the bitmap.
With this prefaction in mind, on to the REAL problem.
malibu_phy_hw_init FOR SOME REASON, set a global variable first_phy_addr
to the first detected PHY addr that coincidentally is always PORT1.
PORT1 addr is 0x0. The entire code in malibu_phy use this variable to
derive the phy addrs in some function.
Declaring a bitmap where the PORT1 is missing (or worse PORT4 the only
one connected) result in first_phy_addr set to 1 or whatever phy addr is
detected first setting wrong value all over the init stage.
To fix this, introduce a new binding malibu_first_phy_addr to manually
declare the first phy that the malibu PHY driver should use and permit
to detach it from port bmp detection. The legacy detection is kept for
compatibility reason.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
include/init/ssdk_dts.h | 1 +
include/init/ssdk_init.h | 2 ++
src/hsl/phy/malibu_phy.c | 5 +++++
src/init/ssdk_dts.c | 15 +++++++++++++++
4 files changed, 23 insertions(+)
--- a/include/init/ssdk_dts.h
+++ b/include/init/ssdk_dts.h
@@ -146,6 +146,7 @@ a_uint32_t ssdk_wan_bmp_get(a_uint32_t d
sw_error_t ssdk_lan_bmp_set(a_uint32_t dev_id, a_uint32_t lan_bmp);
sw_error_t ssdk_wan_bmp_set(a_uint32_t dev_id, a_uint32_t wan_bmp);
a_uint32_t ssdk_inner_bmp_get(a_uint32_t dev_id);
+a_uint32_t ssdk_malibu_first_phy_addr_get(a_uint32_t dev_id);
hsl_reg_mode ssdk_switch_reg_access_mode_get(a_uint32_t dev_id);
void ssdk_switch_reg_map_info_get(a_uint32_t dev_id, ssdk_reg_map_info *info);
a_uint32_t ssdk_switch_pcie_base_get(a_uint32_t dev_id);
--- a/include/init/ssdk_init.h
+++ b/include/init/ssdk_init.h
@@ -194,6 +194,7 @@ enum ssdk_port_wrapper_cfg {
a_uint32_t lan_bmp;
a_uint32_t wan_bmp;
a_uint32_t inner_bmp;
+ a_uint32_t malibu_first_phy_addr;
} ssdk_port_cfg;
typedef struct
@@ -384,6 +385,7 @@ ssdk_hsl_access_mode_set(a_uint32_t dev_
a_uint32_t ssdk_dt_global_get_mac_mode(a_uint32_t dev_id, a_uint32_t index);
a_uint32_t ssdk_dt_global_set_mac_mode(a_uint32_t dev_id, a_uint32_t index, a_uint32_t mode);
+a_uint32_t ssdk_malibu_first_phy_addr_get(a_uint32_t dev_id);
a_uint32_t
qca_hppe_port_mac_type_get(a_uint32_t dev_id, a_uint32_t port_id);
--- a/src/hsl/phy/malibu_phy.c
+++ b/src/hsl/phy/malibu_phy.c
@@ -1945,6 +1945,11 @@ static int malibu_phy_api_ops_init(void)
int malibu_phy_init(a_uint32_t dev_id, a_uint32_t port_bmp)
{
static a_uint32_t phy_ops_flag = 0;
+ a_uint32_t malibu_first_phy_addr;
+
+ malibu_first_phy_addr = ssdk_malibu_first_phy_addr_get(dev_id);
+ if (malibu_first_phy_addr != MAX_PHY_ADDR)
+ first_phy_addr = malibu_first_phy_addr;
if(phy_ops_flag == 0) {
malibu_phy_api_ops_init();
--- a/src/init/ssdk_dts.c
+++ b/src/init/ssdk_dts.c
@@ -186,6 +186,13 @@ a_uint32_t ssdk_inner_bmp_get(a_uint32_t
return cfg->port_cfg.inner_bmp;
}
+a_uint32_t ssdk_malibu_first_phy_addr_get(a_uint32_t dev_id)
+{
+ ssdk_dt_cfg* cfg = ssdk_dt_global.ssdk_dt_switch_nodes[dev_id];
+
+ return cfg->port_cfg.malibu_first_phy_addr;
+}
+
hsl_reg_mode ssdk_switch_reg_access_mode_get(a_uint32_t dev_id)
{
ssdk_dt_cfg* cfg = ssdk_dt_global.ssdk_dt_switch_nodes[dev_id];
@@ -1039,6 +1046,14 @@ static void ssdk_dt_parse_port_bmp(a_uin
cfg->port_cfg.inner_bmp;
}
+ /* Permit to manually declare start phy addr for malibu PHY. If not found set to legacy detection. */
+ if (!of_property_read_u32(switch_node, "malibu_first_phy_addr", &cfg->port_cfg.malibu_first_phy_addr)) {
+ ssdk_dt_global.ssdk_dt_switch_nodes[dev_id]->port_cfg.malibu_first_phy_addr =
+ cfg->port_cfg.malibu_first_phy_addr;
+ } else {
+ ssdk_dt_global.ssdk_dt_switch_nodes[dev_id]->port_cfg.malibu_first_phy_addr = MAX_PHY_ADDR;
+ }
+
ssdk_dt_global.ssdk_dt_switch_nodes[dev_id]->port_cfg.cpu_bmp = cfg->port_cfg.cpu_bmp;
ssdk_dt_global.ssdk_dt_switch_nodes[dev_id]->port_cfg.lan_bmp = cfg->port_cfg.lan_bmp;
ssdk_dt_global.ssdk_dt_switch_nodes[dev_id]->port_cfg.wan_bmp = cfg->port_cfg.wan_bmp;

6
package/network/config/netifd/Makefile
View file

@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git
PKG_SOURCE_DATE:=2023-11-10
PKG_SOURCE_VERSION:=35facc8306f590a7330789ab6d5785c0d43073ef
PKG_MIRROR_HASH:=4f73591ae1873e18df235349e478f2196ca0d3123c313a04149dc9d5e2bfb403
PKG_SOURCE_DATE:=2023-11-14
PKG_SOURCE_VERSION:=8587c074f1eb2064c42adb0a6aa5073f695ab89d
PKG_MIRROR_HASH:=f5ceb771badd7a23cceb53537299580d4b483e2b3ec5de09b9c3c54692893dd9
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=GPL-2.0

2
package/network/services/dnsmasq/Makefile
View file

@ -10,7 +10,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=dnsmasq
PKG_UPSTREAM_VERSION:=2.89
PKG_VERSION:=$(subst test,~~test,$(subst rc,~rc,$(PKG_UPSTREAM_VERSION)))
PKG_RELEASE:=6
PKG_RELEASE:=7
PKG_SOURCE:=$(PKG_NAME)-$(PKG_UPSTREAM_VERSION).tar.xz
PKG_SOURCE_URL:=https://thekelleys.org.uk/dnsmasq/

9
package/network/services/dnsmasq/files/dnsmasq.init
View file

@ -539,8 +539,13 @@ dhcp_add() {
# Do not support non-static interfaces for now
[ static = "$proto" ] || return 0
ipaddr="${subnet%%/*}"
prefix_or_netmask="${subnet##*/}"
# Override interface netmask with dhcp config if applicable
config_get netmask "$cfg" netmask "${subnet##*/}"
config_get netmask "$cfg" netmask
[ -n "$netmask" ] && prefix_or_netmask="$netmask"
#check for an already active dhcp server on the interface, unless 'force' is set
config_get_bool force "$cfg" force 0
@ -583,7 +588,7 @@ dhcp_add() {
nettag="${networkid:+set:${networkid},}"
# make sure the DHCP range is not empty
if [ "$dhcpv4" != "disabled" ] && ipcalc "${subnet%%/*}" "$netmask" "$start" "$limit" ; then
if [ "$dhcpv4" != "disabled" ] && ipcalc "$ipaddr/$prefix_or_netmask" "$start" "$limit" ; then
[ "$dynamicdhcpv4" = "0" ] && END="static"
xappend "--dhcp-range=$tags$nettag$START,$END,$NETMASK,$leasetime${options:+ $options}"

2
package/network/utils/iptables/Makefile
View file

@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=iptables
PKG_VERSION:=1.8.8
PKG_RELEASE:=1
PKG_RELEASE:=2
PKG_SOURCE_URL:=https://netfilter.org/projects/iptables/files
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2

40
package/network/utils/iptables/patches/070-extensions-string-Review-parse_string-function.patch Normal file
View file

@ -0,0 +1,40 @@
From da5b32fb4656ab69fe1156eb7e36c7c961839e8a Mon Sep 17 00:00:00 2001
From: Phil Sutter <phil@nwl.cc>
Date: Wed, 8 Jun 2022 13:45:13 +0200
Subject: [PATCH] extensions: string: Review parse_string() function
* Compare against sizeof(info->pattern) which is more clear than having
to know that this buffer is of size XT_STRING_MAX_PATTERN_SIZE
* Invert the check and error early to reduce indenting
* Pass info->patlen to memcpy() to avoid reading past end of 's'
Signed-off-by: Phil Sutter <phil@nwl.cc>
---
extensions/libxt_string.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
--- a/extensions/libxt_string.c
+++ b/extensions/libxt_string.c
@@ -78,14 +78,13 @@ static void string_init(struct xt_entry_
static void
parse_string(const char *s, struct xt_string_info *info)
-{
+{
/* xt_string does not need \0 at the end of the pattern */
- if (strlen(s) <= XT_STRING_MAX_PATTERN_SIZE) {
- memcpy(info->pattern, s, XT_STRING_MAX_PATTERN_SIZE);
- info->patlen = strnlen(s, XT_STRING_MAX_PATTERN_SIZE);
- return;
- }
- xtables_error(PARAMETER_PROBLEM, "STRING too long \"%s\"", s);
+ if (strlen(s) > sizeof(info->pattern))
+ xtables_error(PARAMETER_PROBLEM, "STRING too long \"%s\"", s);
+
+ info->patlen = strnlen(s, sizeof(info->pattern));
+ memcpy(info->pattern, s, info->patlen);
}
static void

80
scripts/dump-target-info.pl
View file

@ -4,7 +4,7 @@ use strict;
use warnings;
use Cwd;
my (%targets, %architectures, %kernels);
my (%targets, %architectures, %kernels, %devices);
$ENV{'TOPDIR'} = Cwd::getcwd();
@ -56,6 +56,68 @@ sub parse_targetinfo {
}
}
sub parse_devices {
my ($target_dir, $subtarget) = @_;
if (open M, "make -C '$target_dir' --no-print-directory DUMP=1 TARGET_BUILD=1 SUBTARGET='$subtarget' V=s |") {
my ($device_profile, $device_name, @device_alt_names, $device_is_alt);
while (defined(my $line = readline M)) {
chomp $line;
if ($line =~ /^Target-Profile-Name: (.+)$/) {
$device_name = $1;
}
elsif ($line =~ /^Target-Profile: DEVICE_(.+)$/) {
$device_profile = $1;
}
# Logic behind this.
# DUMP duplicate info for each alternative device name and
# the alternative device name are printed first before the
# primary device name
# Alternative device titles always have the full list of
# all the alternative device name.
# The device name pattern for an alternative device name is
# Target-Profile-Name: ALT_NAME (PRIMARY_NAME)
# We compare the detected device name and check if it does
# match the alternative device name pattern with one of
# the alternative device name in Alternative device titles:
# If an alternative device name is detected,
# alternative device is skipped.
elsif ($line =~ /^Alternative device titles:$/) {
while (defined($line = readline M)) {
if ($line =~ /^- (.+)$/) {
if ($device_name =~ /^\Q$1\E \((.+)\)$/) {
$device_is_alt = 1;
last;
}
push @device_alt_names, $1;
}
else {
last;
}
}
}
if ($line =~ /^@\@$/) {
if ($device_name && $device_profile && ! $device_is_alt) {
push @{$devices{$device_profile}}, $device_name;
if (scalar @device_alt_names) {
foreach my $device_alt_name (sort values @device_alt_names) {
push @{$devices{$device_profile}}, $device_alt_name;
}
}
}
undef $device_name;
undef $device_profile;
undef $device_is_alt;
@device_alt_names = ();
}
}
close M;
}
}
sub get_targetinfo {
foreach my $target_makefile (glob "target/linux/*/Makefile") {
my ($target_dir) = $target_makefile =~ m!^(.+)/Makefile$!;
@ -86,6 +148,15 @@ sub get_targetinfo {
}
}
sub get_devices {
my ($target_subtarget) = @_;
my ($target, $subtarget) = split /\//, $target_subtarget;
my ($target_dir) = "target/linux/" . $target;
parse_devices($target_dir, $subtarget)
}
if (@ARGV == 1 && $ARGV[0] eq 'targets') {
get_targetinfo();
foreach my $target_name (sort keys %targets) {
@ -104,8 +175,15 @@ elsif (@ARGV == 1 && $ARGV[0] eq 'kernels') {
printf "%s %s\n", $target_name, join ' ', @{$kernels{$target_name}};
}
}
elsif (@ARGV == 2 && $ARGV[0] eq 'devices') {
get_devices($ARGV[1]);
foreach my $device (sort keys %devices) {
printf "%s \"%s\"\n", $device, join '" "', @{$devices{$device}};
}
}
else {
print "Usage: $0 targets\n";
print "Usage: $0 architectures\n";
print "Usage: $0 kernels\n";
print "Usage: $0 devices <target/subtarget>\n";
}

2
scripts/getver.sh
View file

@ -21,7 +21,7 @@ try_git() {
r*)
GET_REV="$(echo $GET_REV | tr -d 'r')"
BASE_REV="$(git rev-list ${REBOOT}..HEAD 2>/dev/null | wc -l | awk '{print $1}')"
REV="$(git rev-parse HEAD~$((BASE_REV - GET_REV)))"
[ $((BASE_REV - GET_REV)) -ge 0 ] && REV="$(git rev-parse HEAD~$((BASE_REV - GET_REV)))"
;;
*)
BRANCH="$(git rev-parse --abbrev-ref HEAD)"

26
target/linux/ath79/dts/ar9331_embeddedwireless_dorin.dts
View file

@ -85,6 +85,18 @@
label = "art";
reg = <0xff0000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_1002: macaddr@1002 {
compatible = "mac-base";
reg = <0x1002 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
};
};
@ -93,10 +105,8 @@
&eth1 {
status = "okay";
nvmem-cells = <&macaddr_art_1002>;
nvmem-cells = <&macaddr_art_1002 0x400000>;
nvmem-cell-names = "mac-address";
mac-address-increment-byte = <3>;
mac-address-increment = <0x40>;
};
&mdio1 {
@ -108,13 +118,3 @@
mtd-cal-data = <&art 0x1000>;
};
&art {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_1002: macaddr@1002 {
reg = <0x1002 0x6>;
};
};

26
target/linux/ath79/dts/ar9344_embeddedwireless_balin.dts
View file

@ -83,16 +83,20 @@
reg = <0xff0000 0x010000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
calibration_art_1000: calibration_data@1000 {
reg = <0x1000 0x440>;
};
calibration_art_1000: calibration_data@1000 {
reg = <0x1000 0x440>;
};
macaddr_art_1002: macaddr@1002 {
reg = <0x1002 0x6>;
macaddr_art_1002: macaddr@1002 {
compatible = "mac-base";
reg = <0x1002 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
};
@ -106,10 +110,8 @@
&eth1 {
status = "okay";
nvmem-cells = <&macaddr_art_1002>;
nvmem-cells = <&macaddr_art_1002 0x400000>;
nvmem-cell-names = "mac-address";
mac-address-increment-byte = <3>;
mac-address-increment = <0x40>;
gmac-config {
device = <&gmac>;
@ -121,7 +123,7 @@
&wmac {
status = "okay";
nvmem-cells = <&macaddr_art_1002>, <&calibration_art_1000>;
nvmem-cells = <&macaddr_art_1002 0>, <&calibration_art_1000>;
nvmem-cell-names = "mac-address", "calibration";
};

40
target/linux/ipq806x/base-files/etc/board.d/01_leds
View file

@ -10,15 +10,15 @@ board=$(board_name)
case "$board" in
askey,rt4230w-rev6)
ucidef_set_led_netdev "wan-port-link" "WAN-PORT-LINK" "qca8k-0.0:00:green:wan" "wan" "link-10 link-100 link-1000"
ucidef_set_led_netdev "wan-port-link" "WAN-PORT-LINK" "qca8k-0.0:00:green:wan" "wan" "link_10 link_100 link_1000"
ucidef_set_led_netdev "wan-port-activity" "WAN-PORT-ACTIVITY" "qca8k-0.0:00:amber:wan" "wan" "tx rx"
ucidef_set_led_netdev "lan1-port-link" "LAN1-PORT-LINK" "qca8k-0.0:01:green:lan" "lan1" "link-10 link-100 link-1000"
ucidef_set_led_netdev "lan1-port-link" "LAN1-PORT-LINK" "qca8k-0.0:01:green:lan" "lan1" "link_10 link_100 link_1000"
ucidef_set_led_netdev "lan1-port-activity" "LAN1-PORT-ACTIVITY" "qca8k-0.0:01:amber:lan" "lan1" "tx rx"
ucidef_set_led_netdev "lan2-port-link" "LAN2-PORT-LINK" "qca8k-0.0:02:green:lan" "lan2" "link-10 link-100 link-1000"
ucidef_set_led_netdev "lan2-port-link" "LAN2-PORT-LINK" "qca8k-0.0:02:green:lan" "lan2" "link_10 link_100 link_1000"
ucidef_set_led_netdev "lan2-port-activity" "LAN2-PORT-ACTIVITY" "qca8k-0.0:02:amber:lan" "lan2" "tx rx"
ucidef_set_led_netdev "lan3-port-link" "LAN3-PORT-LINK" "qca8k-0.0:03:green:lan" "lan3" "link-10 link-100 link-1000"
ucidef_set_led_netdev "lan3-port-link" "LAN3-PORT-LINK" "qca8k-0.0:03:green:lan" "lan3" "link_10 link_100 link_1000"
ucidef_set_led_netdev "lan3-port-activity" "LAN3-PORT-ACTIVITY" "qca8k-0.0:03:amber:lan" "lan3" "tx rx"
ucidef_set_led_netdev "lan4-port-link" "LAN4-PORT-LINK" "qca8k-0.0:04:green:lan" "lan4" "link-10 link-100 link-1000"
ucidef_set_led_netdev "lan4-port-link" "LAN4-PORT-LINK" "qca8k-0.0:04:green:lan" "lan4" "link_10 link_100 link_1000"
ucidef_set_led_netdev "lan4-port-activity" "LAN4-PORT-ACTIVITY" "qca8k-0.0:04:amber:lan" "lan4" "tx rx"
;;
buffalo,wxr-2533dhp)
@ -48,21 +48,21 @@ nec,wg2600hp)
;;
nec,wg2600hp3)
ucidef_set_led_netdev "wan" "WAN" "green:active" "wan"
ucidef_set_led_netdev "wan-port-10" "WAN-PORT-10" "qca8k-0.0:00:green:wan-1" "wan" "tx rx link-10"
ucidef_set_led_netdev "wan-port-100" "WAN-PORT-100" "qca8k-0.0:00:green:wan-2" "wan" "tx rx link-100"
ucidef_set_led_netdev "wan-port-1000" "WAN-PORT-1000" "qca8k-0.0:00:green:wan-3" "wan" "tx rx link-1000"
ucidef_set_led_netdev "lan1-port-10" "LAN1-PORT-10" "qca8k-0.0:01:green:lan-1" "lan1" "tx rx link-10"
ucidef_set_led_netdev "lan1-port-100" "LAN1-PORT-100" "qca8k-0.0:01:green:lan-2" "lan1" "tx rx link-100"
ucidef_set_led_netdev "lan1-port-1000" "LAN1-PORT-1000" "qca8k-0.0:01:green:lan-3" "lan1" "tx rx link-1000"
ucidef_set_led_netdev "lan2-port-10" "LAN2-PORT-10" "qca8k-0.0:02:green:lan-1" "lan2" "tx rx link-10"
ucidef_set_led_netdev "lan2-port-100" "LAN2-PORT-100" "qca8k-0.0:02:green:lan-2" "lan2" "tx rx link-100"
ucidef_set_led_netdev "lan2-port-1000" "LAN2-PORT-1000" "qca8k-0.0:02:green:lan-3" "lan2" "tx rx link-1000"
ucidef_set_led_netdev "lan3-port-10" "LAN3-PORT-10" "qca8k-0.0:03:green:lan-1" "lan3" "tx rx link-10"
ucidef_set_led_netdev "lan3-port-100" "LAN3-PORT-100" "qca8k-0.0:03:green:lan-2" "lan3" "tx rx link-100"
ucidef_set_led_netdev "lan3-port-1000" "LAN3-PORT-1000" "qca8k-0.0:03:green:lan-3" "lan3" "tx rx link-1000"
ucidef_set_led_netdev "lan4-port-10" "LAN4-PORT-10" "qca8k-0.0:04:green:lan-1" "lan4" "tx rx link-10"
ucidef_set_led_netdev "lan4-port-100" "LAN4-PORT-100" "qca8k-0.0:04:green:lan-2" "lan4" "tx rx link-100"
ucidef_set_led_netdev "lan4-port-1000" "LAN4-PORT-1000" "qca8k-0.0:04:green:lan-3" "lan4" "tx rx link-1000"
ucidef_set_led_netdev "wan-port-10" "WAN-PORT-10" "qca8k-0.0:00:green:wan-1" "wan" "tx rx link_10"
ucidef_set_led_netdev "wan-port-100" "WAN-PORT-100" "qca8k-0.0:00:green:wan-2" "wan" "tx rx link_100"
ucidef_set_led_netdev "wan-port-1000" "WAN-PORT-1000" "qca8k-0.0:00:green:wan-3" "wan" "tx rx link_1000"
ucidef_set_led_netdev "lan1-port-10" "LAN1-PORT-10" "qca8k-0.0:01:green:lan-1" "lan1" "tx rx link_10"
ucidef_set_led_netdev "lan1-port-100" "LAN1-PORT-100" "qca8k-0.0:01:green:lan-2" "lan1" "tx rx link_100"
ucidef_set_led_netdev "lan1-port-1000" "LAN1-PORT-1000" "qca8k-0.0:01:green:lan-3" "lan1" "tx rx link_1000"
ucidef_set_led_netdev "lan2-port-10" "LAN2-PORT-10" "qca8k-0.0:02:green:lan-1" "lan2" "tx rx link_10"
ucidef_set_led_netdev "lan2-port-100" "LAN2-PORT-100" "qca8k-0.0:02:green:lan-2" "lan2" "tx rx link_100"
ucidef_set_led_netdev "lan2-port-1000" "LAN2-PORT-1000" "qca8k-0.0:02:green:lan-3" "lan2" "tx rx link_1000"
ucidef_set_led_netdev "lan3-port-10" "LAN3-PORT-10" "qca8k-0.0:03:green:lan-1" "lan3" "tx rx link_10"
ucidef_set_led_netdev "lan3-port-100" "LAN3-PORT-100" "qca8k-0.0:03:green:lan-2" "lan3" "tx rx link_100"
ucidef_set_led_netdev "lan3-port-1000" "LAN3-PORT-1000" "qca8k-0.0:03:green:lan-3" "lan3" "tx rx link_1000"
ucidef_set_led_netdev "lan4-port-10" "LAN4-PORT-10" "qca8k-0.0:04:green:lan-1" "lan4" "tx rx link_10"
ucidef_set_led_netdev "lan4-port-100" "LAN4-PORT-100" "qca8k-0.0:04:green:lan-2" "lan4" "tx rx link_100"
ucidef_set_led_netdev "lan4-port-1000" "LAN4-PORT-1000" "qca8k-0.0:04:green:lan-3" "lan4" "tx rx link_1000"
;;
netgear,d7800 |\
netgear,r7500 |\

3
target/linux/layerscape/image/Makefile
View file

@ -8,8 +8,11 @@ include $(INCLUDE_DIR)/image.mk
LS_SD_KERNELPART_SIZE = 40
LS_SD_KERNELPART_OFFSET = 16
LS_SD_ROOTFSPART_OFFSET = 64
ifeq ($(DUMP),)
LS_SD_IMAGE_SIZE = $(shell echo $$((($(LS_SD_ROOTFSPART_OFFSET) + \
$(CONFIG_TARGET_ROOTFS_PARTSIZE)))))
endif
# The limitation of flash sysupgrade.bin is 1MB dtb + 16MB kernel + 32MB rootfs
LS_SYSUPGRADE_IMAGE_SIZE = 49m

399
target/linux/mediatek/dts/mt7622-dlink-eagle-pro-ai-m32-a1.dts Normal file
View file

@ -0,0 +1,399 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7622.dtsi"
#include "mt6380.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "D-Link EAGLE PRO AI M32 A1";
compatible = "dlink,eagle-pro-ai-m32-a1", "mediatek,mt7622";
aliases {
led-boot = &status_orange;
led-failsafe = &status_red;
led-running = &status_white;
led-upgrade = &status_red;
serial0 = &uart0;
label-mac-device = &gmac0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
reset {
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
label = "reset";
linux,code = <KEY_RESTART>;
};
wps {
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
status_white: status_white {
label = "white:status";
gpios = <&pio 85 GPIO_ACTIVE_LOW>;
};
status_orange: status_orange {
label = "orange:status";
gpios = <&pio 20 GPIO_ACTIVE_LOW>;
default-state = "on";
};
status_red: status_red {
label = "red:status";
gpios = <&pio 17 GPIO_ACTIVE_LOW>;
};
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
};
&bch {
status = "okay";
};
&btif {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
nvmem-cells = <&macaddr_odm_83>;
nvmem-cell-names = "mac-address";
phy-mode = "2500base-x";
reg = <0>;
fixed-link {
full-duplex;
pause;
speed = <2500>;
};
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "mediatek,mt7531";
reg = <0>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
reset-gpios = <&pio 54 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
wan: port@4 {
reg = <4>;
label = "wan";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins>;
status = "okay";
};
&pio {
epa_elna_pins: epa-elna-pins {
mux {
function = "antsel";
groups = "antsel0", "antsel1", "antsel2", "antsel3",
"antsel4", "antsel5", "antsel6", "antsel7",
"antsel8", "antsel9", "antsel12", "antsel13",
"antsel14", "antsel15", "antsel16", "antsel17";
};
};
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
/* Serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx";
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&rtc {
status = "disabled";
};
&sata {
status = "disabled";
};
&sata_phy {
status = "disabled";
};
&slot0 {
wmac1: mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
mediatek,mtd-eeprom = <&factory 0x05000>;
};
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
snand: flash@0 {
compatible = "spi-nand";
mediatek,bmt-table-size = <0x1000>;
mediatek,bmt-v2;
nand-ecc-engine = <&snfi>;
reg = <0>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x00000000 0x00080000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x00080000 0x00040000>;
read-only;
};
partition@C0000 {
label = "Bootloader";
reg = <0x000C0000 0x00080000>;
read-only;
};
partition@140000 {
label = "BootConfig";
reg = <0x00140000 0x00040000>;
read-only;
};
odm: partition@180000 {
compatible = "nvmem-cells";
label = "Odm";
reg = <0x00180000 0x00040000>;
read-only;
macaddr_odm_83: macaddr@83 {
reg = <0x83 0x6>;
};
};
config1: partition@1C0000 {
compatible = "nvmem-cells";
label = "Config1";
reg = <0x001C0000 0x00080000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
};
partition@240000 {
label = "Config2";
reg = <0x00240000 0x00080000>;
read-only;
};
partition@2C0000 {
label = "Kernel1";
reg = <0x002C0000 0x02D00000>;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x00000000 0x00800000>;
};
partition@800000 {
label = "ubi";
reg = <0x00800000 0x02500000>;
};
};
partition@2FC0000 {
label = "Kernel2";
reg = <0x02FC0000 0x02D00000>;
read-only;
};
factory: partition@5CC0000 {
label = "Factory";
reg = <0x05CC0000 0x00100000>;
read-only;
};
partition@5DC0000 {
label = "Mydlink";
reg = <0x05DC0000 0x00200000>;
read-only;
};
partition@5FC0000 {
label = "Storage";
reg = <0x05FC0000 0x00300000>;
read-only;
};
};
};
};
&ssusb {
status = "disabled";
};
&u3phy {
status = "disabled";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
&wmac {
pinctrl-names = "default";
pinctrl-0 = <&epa_elna_pins>;
mediatek,mtd-eeprom = <&factory 0x0000>;
status = "okay";
};

188
target/linux/mediatek/dts/mt7629-tplink_eap225-v5.dts Normal file
View file

@ -0,0 +1,188 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "mt7629.dtsi"
/ {
model = "TP-Link EAP225 v5";
compatible = "tplink,eap225-v5", "mediatek,mt7629";
aliases {
led-boot = &led_status_green;
led-failsafe = &led_status_amber;
led-running = &led_status_green;
led-upgrade = &led_status_amber;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-override = "console=ttyS0,115200n8";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&pio 21 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_status_green: status_green {
label = "green:status";
gpios = <&pio 55 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led_status_amber: status_amber {
label = "amber:status";
gpios = <&pio 56 GPIO_ACTIVE_HIGH>;
};
};
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
pinctrl-1 = <&ephy_leds_pins>;
status = "okay";
mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&phy0>;
nvmem-cells = <&macaddr_factory_8>;
nvmem-cell-names = "mac-address";
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&qspi_pins>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Bootloader";
reg = <0x0 0x00080000>;
read-only;
};
partition@80000 {
label = "Partition";
reg = <0x00080000 0x00010000>;
read-only;
};
partition@90000 {
label = "Factory";
reg = <0x00090000 0x00010000>;
compatible = "nvmem-cells";
read-only;
macaddr_factory_8: macaddr@8 {
reg = <0x8 0x6>;
};
};
partition@A0000 {
label = "Radio";
reg = <0x000A0000 0x00010000>;
read-only;
};
partition@B0000 {
label = "Extra";
reg = <0x000B0000 0x00010000>;
read-only;
};
/* Vendor layout: kernel (0x000C0000 0x001A0000) - rootfs (0x00260000 0x00BE0000) */
/* OpenWrt flash layout: combine kernel and rootfs from OEM layout */
partition@C0000 {
label = "firmware";
reg = <0x000C0000 0x00D80000>;
};
partition@E40000 {
label = "Config";
reg = <0x00E40000 0x0001B0000>;
read-only;
};
};
};
};
&pio {
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio";
};
};
ephy_leds_pins: ephy-leds-pins {
mux {
function = "led";
groups = "ephy_leds";
};
};
qspi_pins: qspi-pins {
mux {
function = "flash";
groups = "spi_nor";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_txd_rxd" ;
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};

2
target/linux/mediatek/image/filogic.mk
View file

@ -192,7 +192,9 @@ define Device/bananapi_bpi-r3
pad-to 64M | append-image squashfs-sysupgrade.itb | check-size |\
) \
gzip
ifeq ($(DUMP),)
IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
endif
KERNEL := kernel-bin | gzip
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k

40
target/linux/mediatek/image/mt7622.mk
View file

@ -37,6 +37,25 @@ define Build/bl31-uboot
cat $(STAGING_DIR_IMAGE)/mt7622_$1-u-boot.fip >> $@
endef
# Append header to a D-Link M32 Kernel 1 partition
define Build/m32-recovery-header-kernel1
echo -en "DLK6E6010001\x00\x00\xCF\x33" > "$@.header"
echo -en "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x01\x00\x8D\x57\x30\x0B" >> "$@.header"
# Byte 0-3: Erase Start 0x002C0000
# Byte 4-7: Erase Length 0x02D00000
# Byte 8-11: Data offset: 0x002C0000
# Byte 12-15: Data Length: 0x02D00000
echo -en "\x00\x00\x2C\x00\x00\x00\xD0\x02\x00\x00\x2C\x00\x00\x00\xD0\x02" >> "$@.header"
# Only zeros
echo -en "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00" >> "$@.header"
# Note: The last 2 bytes of the following line are the checksum of the header
# If any data in the header will be changed, the checksum must be re-calculated
echo -en "\x42\x48\x02\x00\x00\x00\x08\x00\x00\x00\x00\x00\x60\x6E\x68\x61" >> "$@.header"
cat "$@.header" "$@" > "$@.new"
mv "$@.new" "$@"
rm "$@.header"
endef
define Build/mt7622-gpt
cp $@ $@.tmp 2>/dev/null || true
ptgen -g -o $@.tmp -a 1 -l 1024 \
@ -88,7 +107,9 @@ define Device/bananapi_bpi-r64
pad-to 46080k | append-image squashfs-sysupgrade.itb | check-size |\
) \
gzip
ifeq ($(DUMP),)
IMAGE_SIZE := $$(shell expr 45 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
endif
KERNEL := kernel-bin | gzip
KERNEL_INITRAMFS := kernel-bin | lzma | fit lzma $$(DTS_DIR)/$$(DEVICE_DTS).dtb with-initrd | pad-to 128k
IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb external-static-with-rootfs | append-metadata
@ -147,6 +168,25 @@ define Device/buffalo_wsr-3200ax4s
endef
TARGET_DEVICES += buffalo_wsr-3200ax4s
define Device/dlink_eagle-pro-ai-m32-a1
IMAGE_SIZE := 46080k
DEVICE_VENDOR := D-Link
DEVICE_MODEL := EAGLE PRO AI M32
DEVICE_VARIANT := A1
DEVICE_DTS := mt7622-dlink-eagle-pro-ai-m32-a1
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7915-firmware
KERNEL_SIZE := 8192k
BLOCKSIZE := 128k
PAGESIZE := 2048
UBINIZE_OPTS := -E 5
IMAGES += tftp.bin recovery.bin
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
IMAGE/tftp.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | check-size
IMAGE/recovery.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | pad-to $$(IMAGE_SIZE) | m32-recovery-header-kernel1
endef
TARGET_DEVICES += dlink_eagle-pro-ai-m32-a1
define Device/elecom_wrc-2533gent
DEVICE_VENDOR := Elecom
DEVICE_MODEL := WRC-2533GENT

4
target/linux/mediatek/image/mt7623.mk
View file

@ -96,7 +96,9 @@ define Device/bananapi_bpi-r2
KERNEL := kernel-bin | gzip
KERNEL_INITRAMFS_SUFFIX := -recovery.itb
KERNEL_INITRAMFS := kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb with-initrd
ifeq ($(DUMP),)
IMAGE_SIZE := $$(shell expr 48 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
endif
IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb external-static-with-rootfs | append-metadata
ARTIFACT/preloader.bin := mt7623-mbr emmc |\
pad-to 2k | append-preloader $$(UBOOT_TARGET)
@ -130,7 +132,9 @@ define Device/unielec_u7623-02
UBOOT_TARGET := mt7623a_unielec_u7623
UBOOT_IMAGE := u-boot-mtk.bin
UBOOT_PATH := $(STAGING_DIR_IMAGE)/$$(UBOOT_TARGET)-$$(UBOOT_IMAGE)
ifeq ($(DUMP),)
IMAGE_SIZE := $$(shell expr 48 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
endif
IMAGES := sysupgrade.itb
KERNEL := kernel-bin | gzip
KERNEL_INITRAMFS_SUFFIX := -recovery.itb

9
target/linux/mediatek/image/mt7629.mk
View file

@ -48,3 +48,12 @@ define Device/netgear_ex6250-v2
pad-rootfs | check-size | netgear-encrypted-factory
endef
TARGET_DEVICES += netgear_ex6250-v2
define Device/tplink_eap225-v5
DEVICE_VENDOR := TP-Link
DEVICE_MODEL := EAP225
DEVICE_VARIANT := v5
DEVICE_DTS := mt7629-tplink_eap225-v5
DEVICE_DTS_DIR := ../dts
endef
TARGET_DEVICES += tplink_eap225-v5

7
target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
View file

@ -24,6 +24,9 @@ mediatek_setup_interfaces()
ucidef_add_switch "switch0" \
"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "6@eth0"
;;
dlink,eagle-pro-ai-m32-a1)
ucidef_set_interfaces_lan_wan "lan1 lan2" wan
;;
ubnt,unifi-6-lr*)
ucidef_set_interface_lan "eth0"
;;
@ -61,6 +64,10 @@ mediatek_setup_macs()
wan_mac=$lan_mac
label_mac=$lan_mac
;;
dlink,eagle-pro-ai-m32-a1)
wan_mac=$(get_mac_label)
lan_mac=$(macaddr_add $(get_mac_label) 1)
;;
reyee,ax3200-e5|\
ruijie,rg-ew3200gx-pro)
lan_mac=$(macaddr_add $(get_mac_label) 1)

4
target/linux/mediatek/mt7622/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
View file

@ -18,6 +18,10 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_add $basemac 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $basemac 8 > /sys${DEVPATH}/macaddress
;;
dlink,eagle-pro-ai-m32-a1)
[ "$PHYNBR" = "0" ] && macaddr_add $(cat /sys/class/net/eth0/address) 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $(cat /sys/class/net/eth0/address) 3 > /sys${DEVPATH}/macaddress
;;
reyee,ax3200-e5|\
ruijie,rg-ew3200gx-pro)
[ "$PHYNBR" = "0" ] && macaddr_add $(get_mac_label) 3 > /sys${DEVPATH}/macaddress

2
target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
View file

@ -34,6 +34,7 @@ platform_do_upgrade() {
nand_do_upgrade "$1"
fi
;;
dlink,eagle-pro-ai-m32-a1|\
elecom,wrc-x3200gst3|\
mediatek,mt7622-rfb1-ubi|\
netgear,wax206|\
@ -72,6 +73,7 @@ platform_check_image() {
buffalo,wsr-3200ax4s)
buffalo_check_image "$board" "$magic" "$1" || return 1
;;
dlink,eagle-pro-ai-m32-a1|\
elecom,wrc-x3200gst3|\
mediatek,mt7622-rfb1-ubi|\
netgear,wax206|\

3
target/linux/mediatek/mt7629/base-files/etc/board.d/02_network
View file

@ -16,7 +16,8 @@ mediatek_setup_interfaces()
ucidef_add_switch "switch0" \
"0:lan" "1:lan" "2:lan" "3:lan" "6@eth0"
;;
netgear,ex6250-v2)
netgear,ex6250-v2|\
tplink,eap225-v5)
ucidef_set_interface_lan "eth0"
;;
esac

139
target/linux/mvebu/patches-5.15/106-Revert-i2c-pxa-move-to-generic-GPIO-recovery.patch Normal file
View file

@ -0,0 +1,139 @@
From ea8444b6fa5955c16b713dc83310882b93b44e62 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Fri, 10 Nov 2023 10:10:29 +0100
Subject: [PATCH] Revert "i2c: pxa: move to generic GPIO recovery"
This reverts commit 0b01392c18b9993a584f36ace1d61118772ad0ca.
Conversion of PXA to generic I2C recovery, makes the I2C bus completely
lock up if recovery pinctrl is present in the DT and I2C recovery is
enabled.
So, until the generic I2C recovery can also work with PXA lets revert
to have working I2C and I2C recovery again.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: stable@vger.kernel.org # 5.11+
---
drivers/i2c/busses/i2c-pxa.c | 76 ++++++++++++++++++++++++++++++++----
1 file changed, 68 insertions(+), 8 deletions(-)
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -264,6 +264,9 @@ struct pxa_i2c {
u32 hs_mask;
struct i2c_bus_recovery_info recovery;
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pinctrl_default;
+ struct pinctrl_state *pinctrl_recovery;
};
#define _IBMR(i2c) ((i2c)->reg_ibmr)
@@ -1302,12 +1305,13 @@ static void i2c_pxa_prepare_recovery(str
*/
gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS);
gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS);
+
+ WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery));
}
static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap)
{
struct pxa_i2c *i2c = adap->algo_data;
- struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
u32 isr;
/*
@@ -1321,7 +1325,7 @@ static void i2c_pxa_unprepare_recovery(s
i2c_pxa_do_reset(i2c);
}
- WARN_ON(pinctrl_select_state(bri->pinctrl, bri->pins_default));
+ WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default));
dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n",
readl(_IBMR(i2c)), readl(_ISR(i2c)));
@@ -1343,20 +1347,76 @@ static int i2c_pxa_init_recovery(struct
if (IS_ENABLED(CONFIG_I2C_PXA_SLAVE))
return 0;
- bri->pinctrl = devm_pinctrl_get(dev);
- if (PTR_ERR(bri->pinctrl) == -ENODEV) {
- bri->pinctrl = NULL;
+ i2c->pinctrl = devm_pinctrl_get(dev);
+ if (PTR_ERR(i2c->pinctrl) == -ENODEV)
+ i2c->pinctrl = NULL;
+ if (IS_ERR(i2c->pinctrl))
+ return PTR_ERR(i2c->pinctrl);
+
+ if (!i2c->pinctrl)
+ return 0;
+
+ i2c->pinctrl_default = pinctrl_lookup_state(i2c->pinctrl,
+ PINCTRL_STATE_DEFAULT);
+ i2c->pinctrl_recovery = pinctrl_lookup_state(i2c->pinctrl, "recovery");
+
+ if (IS_ERR(i2c->pinctrl_default) || IS_ERR(i2c->pinctrl_recovery)) {
+ dev_info(dev, "missing pinmux recovery information: %ld %ld\n",
+ PTR_ERR(i2c->pinctrl_default),
+ PTR_ERR(i2c->pinctrl_recovery));
+ return 0;
+ }
+
+ /*
+ * Claiming GPIOs can influence the pinmux state, and may glitch the
+ * I2C bus. Do this carefully.
+ */
+ bri->scl_gpiod = devm_gpiod_get(dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN);
+ if (bri->scl_gpiod == ERR_PTR(-EPROBE_DEFER))
+ return -EPROBE_DEFER;
+ if (IS_ERR(bri->scl_gpiod)) {
+ dev_info(dev, "missing scl gpio recovery information: %pe\n",
+ bri->scl_gpiod);
+ return 0;
+ }
+
+ /*
+ * We have SCL. Pull SCL low and wait a bit so that SDA glitches
+ * have no effect.
+ */
+ gpiod_direction_output(bri->scl_gpiod, 0);
+ udelay(10);
+ bri->sda_gpiod = devm_gpiod_get(dev, "sda", GPIOD_OUT_HIGH_OPEN_DRAIN);
+
+ /* Wait a bit in case of a SDA glitch, and then release SCL. */
+ udelay(10);
+ gpiod_direction_output(bri->scl_gpiod, 1);
+
+ if (bri->sda_gpiod == ERR_PTR(-EPROBE_DEFER))
+ return -EPROBE_DEFER;
+
+ if (IS_ERR(bri->sda_gpiod)) {
+ dev_info(dev, "missing sda gpio recovery information: %pe\n",
+ bri->sda_gpiod);
return 0;
}
- if (IS_ERR(bri->pinctrl))
- return PTR_ERR(bri->pinctrl);
bri->prepare_recovery = i2c_pxa_prepare_recovery;
bri->unprepare_recovery = i2c_pxa_unprepare_recovery;
+ bri->recover_bus = i2c_generic_scl_recovery;
i2c->adap.bus_recovery_info = bri;
- return 0;
+ /*
+ * Claiming GPIOs can change the pinmux state, which confuses the
+ * pinctrl since pinctrl's idea of the current setting is unaffected
+ * by the pinmux change caused by claiming the GPIO. Work around that
+ * by switching pinctrl to the GPIO state here. We do it this way to
+ * avoid glitching the I2C bus.
+ */
+ pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery);
+
+ return pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default);
}
static int i2c_pxa_probe(struct platform_device *dev)

139
target/linux/mvebu/patches-6.1/106-Revert-i2c-pxa-move-to-generic-GPIO-recovery.patch Normal file
View file

@ -0,0 +1,139 @@
From ea8444b6fa5955c16b713dc83310882b93b44e62 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Fri, 10 Nov 2023 10:10:29 +0100
Subject: [PATCH] Revert "i2c: pxa: move to generic GPIO recovery"
This reverts commit 0b01392c18b9993a584f36ace1d61118772ad0ca.
Conversion of PXA to generic I2C recovery, makes the I2C bus completely
lock up if recovery pinctrl is present in the DT and I2C recovery is
enabled.
So, until the generic I2C recovery can also work with PXA lets revert
to have working I2C and I2C recovery again.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: stable@vger.kernel.org # 5.11+
---
drivers/i2c/busses/i2c-pxa.c | 76 ++++++++++++++++++++++++++++++++----
1 file changed, 68 insertions(+), 8 deletions(-)
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -264,6 +264,9 @@ struct pxa_i2c {
u32 hs_mask;
struct i2c_bus_recovery_info recovery;
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pinctrl_default;
+ struct pinctrl_state *pinctrl_recovery;
};
#define _IBMR(i2c) ((i2c)->reg_ibmr)
@@ -1302,12 +1305,13 @@ static void i2c_pxa_prepare_recovery(str
*/
gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS);
gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS);
+
+ WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery));
}
static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap)
{
struct pxa_i2c *i2c = adap->algo_data;
- struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
u32 isr;
/*
@@ -1321,7 +1325,7 @@ static void i2c_pxa_unprepare_recovery(s
i2c_pxa_do_reset(i2c);
}
- WARN_ON(pinctrl_select_state(bri->pinctrl, bri->pins_default));
+ WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default));
dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n",
readl(_IBMR(i2c)), readl(_ISR(i2c)));
@@ -1343,20 +1347,76 @@ static int i2c_pxa_init_recovery(struct
if (IS_ENABLED(CONFIG_I2C_PXA_SLAVE))
return 0;
- bri->pinctrl = devm_pinctrl_get(dev);
- if (PTR_ERR(bri->pinctrl) == -ENODEV) {
- bri->pinctrl = NULL;
+ i2c->pinctrl = devm_pinctrl_get(dev);
+ if (PTR_ERR(i2c->pinctrl) == -ENODEV)
+ i2c->pinctrl = NULL;
+ if (IS_ERR(i2c->pinctrl))
+ return PTR_ERR(i2c->pinctrl);
+
+ if (!i2c->pinctrl)
+ return 0;
+
+ i2c->pinctrl_default = pinctrl_lookup_state(i2c->pinctrl,
+ PINCTRL_STATE_DEFAULT);
+ i2c->pinctrl_recovery = pinctrl_lookup_state(i2c->pinctrl, "recovery");
+
+ if (IS_ERR(i2c->pinctrl_default) || IS_ERR(i2c->pinctrl_recovery)) {
+ dev_info(dev, "missing pinmux recovery information: %ld %ld\n",
+ PTR_ERR(i2c->pinctrl_default),
+ PTR_ERR(i2c->pinctrl_recovery));
+ return 0;
+ }
+
+ /*
+ * Claiming GPIOs can influence the pinmux state, and may glitch the
+ * I2C bus. Do this carefully.
+ */
+ bri->scl_gpiod = devm_gpiod_get(dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN);
+ if (bri->scl_gpiod == ERR_PTR(-EPROBE_DEFER))
+ return -EPROBE_DEFER;
+ if (IS_ERR(bri->scl_gpiod)) {
+ dev_info(dev, "missing scl gpio recovery information: %pe\n",
+ bri->scl_gpiod);
+ return 0;
+ }
+
+ /*
+ * We have SCL. Pull SCL low and wait a bit so that SDA glitches
+ * have no effect.
+ */
+ gpiod_direction_output(bri->scl_gpiod, 0);
+ udelay(10);
+ bri->sda_gpiod = devm_gpiod_get(dev, "sda", GPIOD_OUT_HIGH_OPEN_DRAIN);
+
+ /* Wait a bit in case of a SDA glitch, and then release SCL. */
+ udelay(10);
+ gpiod_direction_output(bri->scl_gpiod, 1);
+
+ if (bri->sda_gpiod == ERR_PTR(-EPROBE_DEFER))
+ return -EPROBE_DEFER;
+
+ if (IS_ERR(bri->sda_gpiod)) {
+ dev_info(dev, "missing sda gpio recovery information: %pe\n",
+ bri->sda_gpiod);
return 0;
}
- if (IS_ERR(bri->pinctrl))
- return PTR_ERR(bri->pinctrl);
bri->prepare_recovery = i2c_pxa_prepare_recovery;
bri->unprepare_recovery = i2c_pxa_unprepare_recovery;
+ bri->recover_bus = i2c_generic_scl_recovery;
i2c->adap.bus_recovery_info = bri;
- return 0;
+ /*
+ * Claiming GPIOs can change the pinmux state, which confuses the
+ * pinctrl since pinctrl's idea of the current setting is unaffected
+ * by the pinmux change caused by claiming the GPIO. Work around that
+ * by switching pinctrl to the GPIO state here. We do it this way to
+ * avoid glitching the I2C bus.
+ */
+ pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery);
+
+ return pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default);
}
static int i2c_pxa_probe(struct platform_device *dev)

27
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-cax1800.dts
View file

@ -271,32 +271,11 @@
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
switch_lan_bmp = <ESS_PORT5>; /* lan port bitmap */
switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port@5 {
port_id = <5>;
phy_address = <4>;
};

18
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi
View file

@ -235,28 +235,24 @@
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
switch_lan_bmp = <(ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT2>; /* wan port bitmap */
switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
qcom,port_phyinfo {
port@1 {
port@2 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port@3 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port@4 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port@5 {
port_id = <5>;
phy_address = <4>;
};

15
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts
View file

@ -343,21 +343,18 @@
&switch {
status = "okay";
switch_lan_bmp = <ESS_PORT5>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
switch_mac_mode = <0xff>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
switch_lan_bmp = <ESS_PORT6>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@4 {
port@5 {
port_id = <5>;
phy_address = <24>;
port_mac_sel = "QGMAC_PORT";
};
port@5 {
port@6 {
port_id = <6>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";

13
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts
View file

@ -321,13 +321,12 @@
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
switch_mac_mode = <0xb>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xd>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
malibu_first_phy_addr = <16>; /* PHY addr of the first malibu PHY */
switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {

15
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax880.dts
View file

@ -325,21 +325,18 @@
&switch {
status = "okay";
switch_lan_bmp = <ESS_PORT5>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
switch_mac_mode = <0xff>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
switch_lan_bmp = <ESS_PORT6>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@4 {
port@5 {
port_id = <5>;
phy_address = <24>;
port_mac_sel = "QGMAC_PORT";
};
port@5 {
port@6 {
port_id = <6>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";

17
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts
View file

@ -384,30 +384,27 @@
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
switch_mac_mode = <0xb>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xc>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <MAC_MODE_SGMII_PLUS>; /* mac mode for uniphy instance1*/
qcom,port_phyinfo {
port@0 {
port@1 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port@2 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port@3 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port@4 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port@5 {
port_id = <5>;
phy_address = <24>;
port_mac_sel = "QGMAC_PORT";

17
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts
View file

@ -171,30 +171,27 @@
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
switch_mac_mode = <0xb>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xc>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/
switch_mac_mode2 = <MAC_MODE_SGMII_PLUS>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port@1 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port@2 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port@3 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port@4 {
port_id = <4>;
phy_address = <3>;
};
port@5 {
port@6 {
port_id = <6>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";

18
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-haze.dts
View file

@ -188,30 +188,28 @@
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <MAC_MODE_10GBASE_R>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port@1 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port@2 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port@3 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port@4 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port@6 {
port_id = <6>;
phy_address = <8>;
compatible = "ethernet-phy-ieee802.3-c45";

11
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax218.dts
View file

@ -89,15 +89,12 @@
&switch {
status = "okay";
switch_wan_bmp = <ESS_PORT6>;
switch_mac_mode = <0x00>;
switch_mac_mode1 = <0xff>;
switch_mac_mode2 = <0x0f>;
bm_tick_mode = <0>;
tm_tick_mode = <0>;
switch_lan_bmp = <ESS_PORT6>;
switch_mac_mode = <MAC_MODE_PSGMII>;
switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
port@5 {
port@6 {
port_id = <6>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";

11
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax620.dts
View file

@ -117,15 +117,12 @@
&switch {
status = "okay";
switch_wan_bmp = <ESS_PORT6>;
switch_mac_mode = <0x00>;
switch_mac_mode1 = <0xff>;
switch_mac_mode2 = <0x0f>;
bm_tick_mode = <0x00>;
tm_tick_mode = <0x00>;
switch_lan_bmp = <ESS_PORT6>;
switch_mac_mode = <MAC_MODE_PSGMII>;
switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
port@5 {
port@6 {
port_id = <6>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";

10
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wpq873.dts
View file

@ -390,11 +390,9 @@
switch_lan_bmp = <(ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0x0f>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0x0f>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@2 {
@ -409,7 +407,7 @@
port_id = <4>;
phy_address = <3>;
};
port@5 {
port@6 {
port_id = <6>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";

42
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi
View file

@ -23,6 +23,24 @@
switch_access_mode = "local bus";
switch_cpu_bmp = <ESS_PORT0>; /* cpu port bitmap */
switch_inner_bmp = <ESS_PORT7>; /*inner port bitmap*/
/* This is a special binding that controls how the malibu PHY are
* init. This value reflect the PHY addr of the first malibu PHY.
* Malibu PHY are in a bundle of 5 PHY.
* Some device might have some port not connected.
* SSDK still needs the addrs of the first PHY (even if not connected)
* to correctly setup the malibu PHY.
*
* This is needed as previously SSDK based this on the port bmp, but
* this can be problematic now that we specify correct bmp.
*
* Most common configuration have the malibu PHY placed at 0.
* But some device might have it placed at address 16.
* To drive the correct value, check the port id of the malibu PHY
* and try to understand what is the first one in devices where some
* port are missing. port_phyinfo is normally the way to go to derive
* this value in the few special cases.
*/
malibu_first_phy_addr = <0>;
clocks = <&gcc GCC_CMN_12GPLL_AHB_CLK>,
<&gcc GCC_CMN_12GPLL_SYS_CLK>,
<&gcc GCC_UNIPHY0_AHB_CLK>,
@ -140,6 +158,14 @@
"nss_port4_rst", "nss_port5_rst",
"nss_port6_rst";
mdio-bus = <&mdio>;
switch_mac_mode = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 0 */
switch_mac_mode1 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 1 */
switch_mac_mode2 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 2 */
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
status = "disabled";
port_scheduler_resource {
@ -443,7 +469,7 @@
status = "disabled";
};
dp1: dp1 {
dp1: dp1@3a001000 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
@ -454,7 +480,7 @@
status = "disabled";
};
dp2: dp2 {
dp2: dp2@3a001200 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
@ -465,7 +491,7 @@
status = "disabled";
};
dp3: dp3 {
dp3: dp3@3a001400 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
@ -476,7 +502,7 @@
status = "disabled";
};
dp4: dp4 {
dp4: dp4@3a001600 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <4>;
@ -487,7 +513,7 @@
status = "disabled";
};
dp5: dp5 {
dp5: dp5@3a001800 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
@ -498,7 +524,7 @@
status = "disabled";
};
dp6: dp6 {
dp6: dp6@3a001a00 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <6>;
@ -509,7 +535,7 @@
status = "disabled";
};
dp5_syn: dp5-syn {
dp5_syn: dp5-syn@3a003000 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
@ -520,7 +546,7 @@
status = "disabled";
};
dp6_syn: dp6-syn {
dp6_syn: dp6-syn@3a007000 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <6>;

24
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-nbg7815.dts
View file

@ -298,42 +298,40 @@
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>;
switch_wan_bmp = <ESS_PORT6>;
switch_mac_mode = <0x0>;
switch_mac_mode1 = <0xf>;
switch_mac_mode2 = <0xd>;
bm_tick_mode = <0>;
tm_tick_mode = <0>;
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>;
switch_wan_bmp = <ESS_PORT5>;
switch_mac_mode = <MAC_MODE_PSGMII>;
switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>;
switch_mac_mode2 = <MAC_MODE_USXGMII>;
qcom,port_phyinfo {
port@0 {
port@1 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port@2 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port@3 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port@4 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port@5 {
port_id = <5>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";
};
port@5 {
port@6 {
port_id = <6>;
ethernet-phy-ieee802.3-c45;
phy_address = <8>;

11
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts
View file

@ -195,13 +195,10 @@
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>; /* lan port bitmap */
switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@1 {

16
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wax630.dts
View file

@ -150,22 +150,18 @@
&switch {
status = "okay";
switch_lan_bmp = <ESS_PORT4>;
switch_wan_bmp = <ESS_PORT6>;
switch_mac_mode = <0x00>;
switch_mac_mode1 = <0xff>;
switch_mac_mode2 = <0x0d>;
bm_tick_mode = <0x00>;
tm_tick_mode = <0x00>;
switch_lan_bmp = <(ESS_PORT4 | ESS_PORT6)>;
switch_mac_mode = <MAC_MODE_PSGMII>;
switch_mac_mode2 = <MAC_MODE_USXGMII>;
qcom,port_phyinfo {
port@3 {
port@4 {
port_id = <4>;
phy_address = <3>;
};
port@5 {
port@6 {
port_id = <6>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";

24
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts
View file

@ -267,42 +267,40 @@
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>;
switch_wan_bmp = <ESS_PORT6>;
switch_mac_mode = <0xb>;
switch_mac_mode1 = <0xd>;
switch_mac_mode2 = <0xd>;
bm_tick_mode = <0>;
tm_tick_mode = <0>;
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>;
switch_wan_bmp = <ESS_PORT5>;
switch_mac_mode = <MAC_MODE_QSGMII>;
switch_mac_mode1 = <MAC_MODE_USXGMII>;
switch_mac_mode2 = <MAC_MODE_USXGMII>;
qcom,port_phyinfo {
port@0 {
port@1 {
port_id = <1>;
phy_address = <0x18>;
};
port@1 {
port@2 {
port_id = <2>;
phy_address = <0x19>;
};
port@2 {
port@3 {
port_id = <3>;
phy_address = <0x1a>;
};
port@3 {
port@4 {
port_id = <4>;
phy_address = <0x1b>;
};
port@4 {
port@5 {
port_id = <5>;
ethernet-phy-ieee802.3-c45;
phy_address = <0x0>;
};
port@5 {
port@6 {
port_id = <6>;
ethernet-phy-ieee802.3-c45;
phy_address = <0x8>;

57
target/linux/qualcommax/files/include/dt-bindings/net/qcom-ipq-ess.h
View file

@ -1,15 +1,42 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _DT_BINDINGS_NET_QCOM_IPQ_ESS_H
#define _DT_BINDINGS_NET_QCOM_IPQ_ESS_H
#define ESS_PORT0 0x1
#define ESS_PORT1 0x2
#define ESS_PORT2 0x4
#define ESS_PORT3 0x8
#define ESS_PORT4 0x10
#define ESS_PORT5 0x20
#define ESS_PORT6 0x40
#define ESS_PORT7 0x80
#endif /* _DT_BINDINGS_NET_QCOM_IPQ_ESS_H */
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _DT_BINDINGS_NET_QCOM_IPQ_ESS_H
#define _DT_BINDINGS_NET_QCOM_IPQ_ESS_H
#define ESS_PORT0 0x1
#define ESS_PORT1 0x2
#define ESS_PORT2 0x4
#define ESS_PORT3 0x8
#define ESS_PORT4 0x10
#define ESS_PORT5 0x20
#define ESS_PORT6 0x40
#define ESS_PORT7 0x80
/* SSDK MAC/UNIPHY modes */
#define MAC_MODE_PSGMII 0x0
#define MAC_MODE_PSGMII_RGMII5 0x1
#define MAC_MODE_SGMII0_RGMII5 0x2
#define MAC_MODE_SGMII1_RGMII5 0x3
#define MAC_MODE_PSGMII_RMII0 0x4
#define MAC_MODE_PSGMII_RMII1 0x5
#define MAC_MODE_PSGMII_RMII0_RMII1 0x6
#define MAC_MODE_PSGMII_RGMII4 0x7
#define MAC_MODE_SGMII0_RGMII4 0x8
#define MAC_MODE_SGMII1_RGMII4 0x9
#define MAC_MODE_SGMII4_RGMII4 0xa
#define MAC_MODE_QSGMII 0xb
#define MAC_MODE_SGMII_PLUS 0xc
#define MAC_MODE_USXGMII 0xd
#define MAC_MODE_10GBASE_R 0xe
#define MAC_MODE_SGMII_CHANNEL0 0xf
#define MAC_MODE_SGMII_CHANNEL1 0x10
#define MAC_MODE_SGMII_CHANNEL4 0x11
#define MAC_MODE_RGMII 0x12
#define MAC_MODE_PSGMII_FIBER 0x13
#define MAC_MODE_SGMII_FIBER 0x14
#define MAC_MODE_UQXGMII 0x15
#define MAC_MODE_UDXGMII 0x16
#define MAC_MODE_UQXGMII_3CHANNELS 0x17
#define MAC_MODE_DISABLED 0xff
#endif /* _DT_BINDINGS_NET_QCOM_IPQ_ESS_H */

14
target/linux/ramips/image/mt7621.mk
View file

@ -684,10 +684,9 @@ define Device/dlink_dir-8xx-a1
DEVICE_VENDOR := D-Link
DEVICE_PACKAGES := kmod-mt7615-firmware -uboot-envtools
KERNEL := $$(KERNEL) | uimage-sgehdr
IMAGES += factory.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | \
check-size | append-metadata
IMAGE/factory.bin := append-kernel | append-rootfs | check-size
IMAGES += recovery.bin factory.bin
IMAGE/recovery.bin := append-kernel | append-rootfs | check-size
IMAGE/factory.bin := $$(IMAGE/recovery.bin) | dlink-sge-image $$$$(DEVICE_MODEL)
endef
define Device/dlink_dir-8xx-r1
@ -707,8 +706,8 @@ define Device/dlink_dir-xx60-a1
DEVICE_PACKAGES := kmod-mt7615-firmware kmod-usb3 \
kmod-usb-ledtrig-usbport -uboot-envtools
KERNEL := $$(KERNEL) | uimage-sgehdr
IMAGES += factory.bin
IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
IMAGES += recovery.bin
IMAGE/recovery.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
check-size
endef
@ -760,6 +759,8 @@ define Device/dlink_dir-853-a3
$(Device/dlink_dir-xx60-a1)
DEVICE_MODEL := DIR-853
DEVICE_VARIANT := A3
IMAGES += factory.bin
IMAGE/factory.bin := $$(IMAGE/recovery.bin) | dlink-sge-image $$(DEVICE_MODEL)
endef
TARGET_DEVICES += dlink_dir-853-a3
@ -2063,6 +2064,7 @@ TARGET_DEVICES += samknows_whitebox-v8
define Device/sercomm_na502
$(Device/nand)
$(Device/uimage-lzma-loader)
IMAGE_SIZE := 20480k
DEVICE_VENDOR := SERCOMM
DEVICE_MODEL := NA502