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mediatek: pinctrl-mt7988: add additional uart1_2_lite group

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Add UART pinctrl group for using only pins 80 and 81 for uart1.
This is needed on the BPi-R4 as RTS/CTS signals are used for other
on-board functions.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2024-02-13 05:30:24 +00:00
parent 42cf04dd05
commit 430a96ed0d
1 changed files with 7 additions and 4 deletions
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11
target/linux/mediatek/files-6.1/drivers/pinctrl/mediatek/pinctrl-mt7988.c
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@ -1037,11 +1037,11 @@ static int mt7988_uart2_3_funcs[] = { 3, 3, 3, 3 };
static int mt7988_uart1_2_pins[] = { 80, 81, 82, 83 }; static int mt7988_uart1_2_pins[] = { 80, 81, 82, 83 };
static int mt7988_uart1_2_funcs[] = { 1, 1, 1, 1 }; static int mt7988_uart1_2_funcs[] = { 1, 1, 1, 1 };
static int mt7988_uart1_2_lite_pins[] = { 80, 81 };
static int mt7988_uart1_2_lite_funcs[] = { 1, 1 };
static int mt7988_tops_uart1_2_pins[] = { 80, 81 }; static int mt7988_tops_uart1_2_pins[] = { 80, 81 };
static int mt7988_tops_uart1_2_funcs[] = { static int mt7988_tops_uart1_2_funcs[] = { 4, 4, };
4,
4,
};
static int mt7988_net_wo0_uart_txd_1_pins[] = { 80 }; static int mt7988_net_wo0_uart_txd_1_pins[] = { 80 };
static int mt7988_net_wo0_uart_txd_1_funcs[] = { 3 }; static int mt7988_net_wo0_uart_txd_1_funcs[] = { 3 };
@ -1299,6 +1299,8 @@ static const struct group_desc mt7988_groups[] = {
PINCTRL_PIN_GROUP("pcie_wake_n2_1", mt7988_pcie_wake_n2_1), PINCTRL_PIN_GROUP("pcie_wake_n2_1", mt7988_pcie_wake_n2_1),
/* @GPIO(80,81,82,83) uart1_2 */ /* @GPIO(80,81,82,83) uart1_2 */
PINCTRL_PIN_GROUP("uart1_2", mt7988_uart1_2), PINCTRL_PIN_GROUP("uart1_2", mt7988_uart1_2),
/* @GPIO(80,81) uart1_2_lite */
PINCTRL_PIN_GROUP("uart1_2_lite", mt7988_uart1_2_lite),
/* @GPIO(80) pwm2 */ /* @GPIO(80) pwm2 */
PINCTRL_PIN_GROUP("pwm2", mt7988_pwm2), PINCTRL_PIN_GROUP("pwm2", mt7988_pwm2),
/* @GPIO(81) pwm3 */ /* @GPIO(81) pwm3 */
@ -1408,6 +1410,7 @@ static const char * const mt7988_uart_groups[] = {
"uart1_1", "uart1_1",
"uart2_3", "uart2_3",
"uart1_2", "uart1_2",
"uart1_2_lite",
"tops_uart1_2", "tops_uart1_2",
"net_wo0_uart_txd_1", "net_wo0_uart_txd_1",
"net_wo1_uart_txd_1", "net_wo1_uart_txd_1",