realtek: add "soc" node to soc dtsi in dts-5.10
Add a "soc" node as a simple-bus to rtl838x.dtsi and rtl930x.dtsi. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
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ddaeb73de0
commit
3069fffe60
2 changed files with 149 additions and 131 deletions
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@ -75,9 +75,15 @@
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interrupt-controller;
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};
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intc: rtlintc {
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soc: soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0xb8000000 0x10000>;
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intc: rtlintc@3000 {
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compatible = "realtek,rtl-intc";
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reg = <0xb8003000 0x20>;
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reg = <0x3000 0x20>;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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@ -98,17 +104,17 @@
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<18 &cpuintc 5>; /* WDT_IP2 */
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};
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spi0: spi@b8001200 {
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spi0: spi@1200 {
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compatible = "realtek,rtl8380-spi";
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reg = <0xb8001200 0x100>;
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reg = <0x1200 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart0: uart@b8002000 {
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uart0: uart@2000 {
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compatible = "ns16550a";
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reg = <0xb8002000 0x100>;
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reg = <0x2000 0x100>;
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clock-frequency = <200000000>;
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@ -121,12 +127,12 @@
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no-loopback-test;
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};
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uart1: uart@b8002100 {
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uart1: uart@2100 {
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pinctrl-names = "default";
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pinctrl-0 = <&enable_uart1>;
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compatible = "ns16550a";
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reg = <0xb8002100 0x100>;
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reg = <0x2100 0x100>;
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clock-frequency = <200000000>;
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@ -137,17 +143,20 @@
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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status = "disabled";
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};
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gpio0: gpio-controller@b8003500 {
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gpio0: gpio-controller@3500 {
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compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
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reg = <0xb8003500 0x20>;
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reg = <0x3500 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <24>;
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interrupt-parent = <&intc>;
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interrupts = <23>;
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};
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};
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gpio1: rtl8231-gpio {
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compatible = "realtek,rtl8231-gpio";
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@ -80,9 +80,22 @@
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interrupt-controller;
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};
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intc: rtlintc {
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osc: oscillator {
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compatible = "fixed-clock";
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#clock-cells = <1>;
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clock-frequency = <175000000>;
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clock-output-names = "osc";
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};
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soc: soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0xb8000000 0x10000>;
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intc: rtlintc@3000 {
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compatible = "realtek,rtl-intc";
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reg = <0xb8003000 0x20>;
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reg = <0x3000 0x20>;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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@ -100,33 +113,26 @@
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<7 &cpuintc 5>; /* TC0 */
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};
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osc: oscillator {
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compatible = "fixed-clock";
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#clock-cells = <1>;
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clock-frequency = <175000000>;
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clock-output-names = "osc";
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};
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timer: timer@b8003200 {
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timer: timer@3200 {
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compatible = "realtek,rtl9300-timer";
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reg = <0xb8003200 0x60>;
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reg = <0x3200 0x60>;
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interrupt-parent = <&intc>;
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interrupts = <8>;
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interrupt-names = "ostimer";
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clocks = <&osc 0>;
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};
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spi0: spi@b8001200 {
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spi0: spi@1200 {
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compatible = "realtek,rtl8380-spi";
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reg = <0xb8001200 0x100>;
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reg = <0x1200 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart0: uart@b8002000 {
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uart0: uart@2000 {
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compatible = "ns16550a";
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reg = <0xb8002000 0x100>;
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reg = <0x2000 0x100>;
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clock-frequency = <175000000>;
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@ -139,9 +145,9 @@
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no-loopback-test;
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};
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uart1: uart@b8002100 {
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uart1: uart@2100 {
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compatible = "ns16550a";
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reg = <0xb8002100 0x100>;
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reg = <0x2100 0x100>;
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clock-frequency = <175000000>;
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@ -152,11 +158,13 @@
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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status = "disabled";
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};
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gpio0: gpio-controller@b8003500 {
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gpio0: gpio-controller@3500 {
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compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
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reg = <0xb8003500 0x20>;
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reg = <0x3500 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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@ -169,6 +177,7 @@
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*/
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status = "disabled";
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};
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};
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ethernet0: ethernet@bb00a300 {
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compatible = "realtek,rtl838x-eth";
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