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realtek: add "soc" node to soc dtsi in dts-5.10

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Add a "soc" node as a simple-bus to rtl838x.dtsi and rtl930x.dtsi.

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This commit is contained in:
INAGAKI Hiroshi 2021-05-06 20:46:42 +09:00 committed by Adrian Schmutzler
parent ddaeb73de0
commit 3069fffe60
2 changed files with 149 additions and 131 deletions
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29
target/linux/realtek/dts-5.10/rtl838x.dtsi
View file

@ -75,9 +75,15 @@
interrupt-controller; interrupt-controller;
}; };
intc: rtlintc { soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xb8000000 0x10000>;
intc: rtlintc@3000 {
compatible = "realtek,rtl-intc"; compatible = "realtek,rtl-intc";
reg = <0xb8003000 0x20>; reg = <0x3000 0x20>;
#address-cells = <0>; #address-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-controller; interrupt-controller;
@ -98,17 +104,17 @@
<18 &cpuintc 5>; /* WDT_IP2 */ <18 &cpuintc 5>; /* WDT_IP2 */
}; };
spi0: spi@b8001200 { spi0: spi@1200 {
compatible = "realtek,rtl8380-spi"; compatible = "realtek,rtl8380-spi";
reg = <0xb8001200 0x100>; reg = <0x1200 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
}; };
uart0: uart@b8002000 { uart0: uart@2000 {
compatible = "ns16550a"; compatible = "ns16550a";
reg = <0xb8002000 0x100>; reg = <0x2000 0x100>;
clock-frequency = <200000000>; clock-frequency = <200000000>;
@ -121,12 +127,12 @@
no-loopback-test; no-loopback-test;
}; };
uart1: uart@b8002100 { uart1: uart@2100 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&enable_uart1>; pinctrl-0 = <&enable_uart1>;
compatible = "ns16550a"; compatible = "ns16550a";
reg = <0xb8002100 0x100>; reg = <0x2100 0x100>;
clock-frequency = <200000000>; clock-frequency = <200000000>;
@ -137,17 +143,20 @@
reg-shift = <2>; reg-shift = <2>;
fifo-size = <1>; fifo-size = <1>;
no-loopback-test; no-loopback-test;
status = "disabled";
}; };
gpio0: gpio-controller@b8003500 { gpio0: gpio-controller@3500 {
compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio"; compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
reg = <0xb8003500 0x20>; reg = <0x3500 0x20>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <24>; ngpios = <24>;
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
interrupts = <23>; interrupts = <23>;
}; };
};
gpio1: rtl8231-gpio { gpio1: rtl8231-gpio {
compatible = "realtek,rtl8231-gpio"; compatible = "realtek,rtl8231-gpio";

47
target/linux/realtek/dts-5.10/rtl930x.dtsi
View file

@ -80,9 +80,22 @@
interrupt-controller; interrupt-controller;
}; };
intc: rtlintc { osc: oscillator {
compatible = "fixed-clock";
#clock-cells = <1>;
clock-frequency = <175000000>;
clock-output-names = "osc";
};
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xb8000000 0x10000>;
intc: rtlintc@3000 {
compatible = "realtek,rtl-intc"; compatible = "realtek,rtl-intc";
reg = <0xb8003000 0x20>; reg = <0x3000 0x20>;
#address-cells = <0>; #address-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-controller; interrupt-controller;
@ -100,33 +113,26 @@
<7 &cpuintc 5>; /* TC0 */ <7 &cpuintc 5>; /* TC0 */
}; };
osc: oscillator { timer: timer@3200 {
compatible = "fixed-clock";
#clock-cells = <1>;
clock-frequency = <175000000>;
clock-output-names = "osc";
};
timer: timer@b8003200 {
compatible = "realtek,rtl9300-timer"; compatible = "realtek,rtl9300-timer";
reg = <0xb8003200 0x60>; reg = <0x3200 0x60>;
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
interrupts = <8>; interrupts = <8>;
interrupt-names = "ostimer"; interrupt-names = "ostimer";
clocks = <&osc 0>; clocks = <&osc 0>;
}; };
spi0: spi@b8001200 { spi0: spi@1200 {
compatible = "realtek,rtl8380-spi"; compatible = "realtek,rtl8380-spi";
reg = <0xb8001200 0x100>; reg = <0x1200 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
}; };
uart0: uart@b8002000 { uart0: uart@2000 {
compatible = "ns16550a"; compatible = "ns16550a";
reg = <0xb8002000 0x100>; reg = <0x2000 0x100>;
clock-frequency = <175000000>; clock-frequency = <175000000>;
@ -139,9 +145,9 @@
no-loopback-test; no-loopback-test;
}; };
uart1: uart@b8002100 { uart1: uart@2100 {
compatible = "ns16550a"; compatible = "ns16550a";
reg = <0xb8002100 0x100>; reg = <0x2100 0x100>;
clock-frequency = <175000000>; clock-frequency = <175000000>;
@ -152,11 +158,13 @@
reg-shift = <2>; reg-shift = <2>;
fifo-size = <1>; fifo-size = <1>;
no-loopback-test; no-loopback-test;
status = "disabled";
}; };
gpio0: gpio-controller@b8003500 { gpio0: gpio-controller@3500 {
compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio"; compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
reg = <0xb8003500 0x20>; reg = <0x3500 0x20>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <32>; ngpios = <32>;
@ -169,6 +177,7 @@
*/ */
status = "disabled"; status = "disabled";
}; };
};
ethernet0: ethernet@bb00a300 { ethernet0: ethernet@bb00a300 {
compatible = "realtek,rtl838x-eth"; compatible = "realtek,rtl838x-eth";