diff --git a/target/linux/ath79/dts/qca9558_nec_aterm.dtsi b/target/linux/ath79/dts/qca9558_nec_aterm.dtsi new file mode 100644 index 00000000000..76d39c2ee70 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_nec_aterm.dtsi @@ -0,0 +1,371 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include +#include + +#include "qca955x.dtsi" + +/ { + chosen { + /* + * don't specify bootargs property in DeviceTree to + * enable a console with a default baudrate (9600) + * or passed console= parameter from the bootloader + */ + /delete-property/ bootargs; + stdout-path = &uart0; + }; + + aliases { + led-boot = &led_power_green; + led-failsafe = &led_power_red; + led-running = &led_power_green; + led-upgrade = &led_power_green; + label-mac-device = ð0; + }; + + i2c { + compatible = "i2c-gpio"; + + pinctrl-names = "default"; + pinctrl-0 = <&pmx_gpio_i2c_pins>; + sda-gpios = <&gpio 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + #address-cells = <1>; + #size-cells = <0>; + + gpio1: gpio@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + reset-gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + gpio-controller; + #gpio-cells = <2>; + + usb-hub-reset { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-high; + }; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&jtag_disable_pins>; + + button-wps { + label = "wps"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + button-eco { + label = "eco"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + switch-bridge { + label = "br"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + button-reset { + label = "reset"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + switch-converter { + label = "cnv"; + gpios = <&gpio 23 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + color = ; + function = "converter"; + }; + + led-1 { + label = "green:converter"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + color = ; + function = "converter"; + }; + + led-2 { + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + color = ; + function = "tv"; + }; + + led-3 { + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + color = ; + function = "tv"; + }; + + led-4 { + gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN_5GHZ; + }; + + led-5 { + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN_5GHZ; + linux,default-trigger = "phy0tpt"; + }; + + led-6 { + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN_2GHZ; + }; + + led-7 { + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN_2GHZ; + linux,default-trigger = "phy1tpt"; + }; + + led-8 { + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WAN_ONLINE; + }; + + led-9 { + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WAN_ONLINE; + }; + + led_power_red: led-10 { + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_POWER; + }; + + led_power_green: led-11 { + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_POWER; + default-state = "on"; + }; + }; + + regulator { + compatible = "regulator-fixed"; + regulator-name = "usb-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; +}; + +&spi { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* + * since the OEM bootloader requires unknown + * filesystem on firmware area, needs to be + * replaced to u-boot before OpenWrt installation + */ + partition@0 { + label = "bootloader"; + reg = <0x000000 0x020000>; + }; + + /* not compatible with u-boot */ + partition@20000 { + label = "config"; + reg = <0x020000 0x010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_config_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_config_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + macaddr_config_c: macaddr@c { + reg = <0xc 0x6>; + }; + + macaddr_config_12: macaddr@12 { + reg = <0x12 0x6>; + }; + }; + }; + + partition@30000 { + label = "art"; + reg = <0x030000 0x010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + cal_art_1000: calibration@1000 { + reg = <0x1000 0x440>; + }; + + cal_art_5000: calibration@5000 { + reg = <0x5000 0x844>; + }; + }; + }; + + partition@40000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x040000 0xfc0000>; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + + qca,ar8327-initvals = < + 0x04 0x00080080 /* PORT0_PAD_MODE_CTRL */ + 0x08 0x00000000 /* PORT5_PAD_MODE_CTRL */ + 0x0c 0x07600000 /* PORT6_PAD_MODE_CTRL */ + 0x10 0xa12613a0 /* POWER_ON_STRAP */ + 0x50 0xcc36cc36 /* LED_CTRL0 */ + 0x54 0xca36ca36 /* LED_CTRL1 */ + 0x58 0xc936c936 /* LED_CTRL2 */ + 0x5c 0x03ffff00 /* LED_CTRL3 */ + 0x7c 0x0000007e /* PORT0_STATUS */ + 0x94 0x0000007e /* PORT6_STATUS */ + 0xe0 0xc74164d0 /* SGMII_CONTROL */ + >; + }; +}; + +ð0 { + status = "okay"; + + nvmem-cells = <&macaddr_config_c>; + nvmem-cell-names = "mac-address"; + phy-handle = <&phy0>; + qca955x-sgmii-fixup; + + gmac-config { + device = <&gmac>; + + rgmii-enabled = <1>; + rxdv-delay = <2>; + rxd-delay = <2>; + }; +}; + +ð1 { + status = "okay"; + + nvmem-cells = <&macaddr_config_6>; + nvmem-cell-names = "mac-address"; + pll-data = <0x03000000 0x00000101 0x00001616>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gpio { + switch-reset { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&pcie0 { + status = "okay"; + + wifi@0,0 { + compatible = "pci168c,003c"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&cal_art_5000>, <&macaddr_config_12>; + nvmem-cell-names = "calibration", "mac-address"; + }; +}; + +&pinmux { + /* mux GPIO19/20 as GPIO instead of native I2C on QCA9558 */ + pmx_gpio_i2c_pins: gpio-i2c-pins { + pinctrl-single,bits = <0x10 0x0 0xff000000>, + <0x14 0x0 0xff>; + }; +}; + +&usb_phy0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dr_mode = "host"; + + /delete-node/ port@1; + + /* NEC uPD720114 */ + hub@1 { + compatible = "usb0409,005a"; + reg = <1>; + }; +}; + +&wmac { + status = "okay"; + + nvmem-cells = <&cal_art_1000>, <&macaddr_config_0>; + nvmem-cell-names = "calibration", "mac-address"; +}; diff --git a/target/linux/ath79/dts/qca9558_nec_wg1400hp.dts b/target/linux/ath79/dts/qca9558_nec_wg1400hp.dts new file mode 100644 index 00000000000..bfcac09d55b --- /dev/null +++ b/target/linux/ath79/dts/qca9558_nec_wg1400hp.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qca9558_nec_aterm.dtsi" + +/ { + compatible = "nec,wg1400hp", "qca,qca9558"; + model = "NEC Aterm WG1400HP"; +}; + +ð0 { + pll-data = <0x5a000000 0x00000101 0x00001616>; +}; diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network index ee9409d7a5f..8efae58ae69 100644 --- a/target/linux/ath79/generic/base-files/etc/board.d/02_network +++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network @@ -189,6 +189,7 @@ ath79_setup_interfaces() ;; belkin,f9j1108-v2|\ belkin,f9k1115-v2|\ + nec,wg1400hp|\ tplink,archer-c5-v1|\ tplink,archer-c7-v1|\ tplink,archer-c7-v2|\ diff --git a/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh b/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh index c61c48b00e9..e286314b9e1 100644 --- a/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh +++ b/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh @@ -17,6 +17,15 @@ platform_check_image() { ubnt,routerstation-pro) platform_check_image_redboot_fis "$1" ;; + nec,wg1400hp) + local uboot_mtd=$(find_mtd_part "bootloader") + + # check "U-Boot ." string in the "bootloader" partition + if ! grep -q "U-Boot [0-9]\{4\}\.[0-9]\{2\}" $uboot_mtd; then + v "The bootloader doesn't seem to be replaced to U-Boot!" + return 1 + fi + ;; *) return 0 ;; diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk index 459d595a425..2cbf50e5e21 100644 --- a/target/linux/ath79/image/generic.mk +++ b/target/linux/ath79/image/generic.mk @@ -1,4 +1,5 @@ include ./common-buffalo.mk +include ./common-nec.mk include ./common-netgear.mk include ./common-senao.mk include ./common-tp-link.mk @@ -2060,6 +2061,16 @@ define Device/nec_wg1200cr endef TARGET_DEVICES += nec_wg1200cr +define Device/nec_wg1400hp + SOC := qca9558 + DEVICE_MODEL := Aterm WG1400HP + IMAGE_SIZE := 16128k + NEC_FW_TYPE := H040b + $(Device/nec-netbsd-aterm) + DEVICE_PACKAGES += kmod-ath10k-ct ath10k-firmware-qca988x-ct +endef +TARGET_DEVICES += nec_wg1400hp + define Device/nec_wg800hp SOC := qca9563 DEVICE_VENDOR := NEC diff --git a/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h b/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h index 9dc7c0f817e..62474ff0477 100644 --- a/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h +++ b/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h @@ -741,5 +741,7 @@ #define QCA955X_ETH_CFG_SGMII_GMAC0 BIT(6) #define QCA955X_GMAC_REG_SGMII_SERDES 0x0018 +#define QCA955X_GMAC_REG_MR_AN_CONTROL 0x1c +#define QCA955X_GMAC_REG_SGMII_CONFIG 0x34 #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ath79/image/lzma-loader/src/board.c b/target/linux/ath79/image/lzma-loader/src/board.c index 2a037e5ac88..c7232e71151 100644 --- a/target/linux/ath79/image/lzma-loader/src/board.c +++ b/target/linux/ath79/image/lzma-loader/src/board.c @@ -51,7 +51,8 @@ static void tlwr1043nd_init(void) static inline void tlwr1043nd_init(void) {} #endif -#if defined(CONFIG_BOARD_MERAKI_MR18) +#if defined(CONFIG_BOARD_MERAKI_MR18) || \ + defined(CONFIG_BOARD_NEC_WG1400HP) static int extract_qca955x_sgmii_res_cal(void) { @@ -215,26 +216,14 @@ static inline void huawei_ap_init(void) static inline void huawei_ap_init(void) {} #endif -#if defined(CONFIG_BOARD_NEC_WG600HP) || \ +#if defined(CONFIG_BOARD_NEC_WG1400HP) || \ + defined(CONFIG_BOARD_NEC_WG600HP) || \ defined(CONFIG_BOARD_NEC_WR8750N) || \ defined(CONFIG_BOARD_NEC_WR9500N) - -#define AR934X_PLL_SWITCH_CLK_CTRL_REG 0x24 -#define AR934X_PLL_SWITCH_CLK_CTRL_SWITCHCLK_SEL BIT(0) - -static inline void nec_aterm_init(void) +static inline void nec_aterm_reset_common(void) { - unsigned int reg, val; + unsigned int reg = KSEG1ADDR(AR71XX_RESET_BASE); - printf("NEC Aterm series (AR9344)\n"); - - /* set REFCLK=40MHz to switch PLL */ - reg = KSEG1ADDR(AR71XX_PLL_BASE); - val = READREG(reg + AR934X_PLL_SWITCH_CLK_CTRL_REG); - val &= ~AR934X_PLL_SWITCH_CLK_CTRL_SWITCHCLK_SEL; - WRITEREG(reg + AR934X_PLL_SWITCH_CLK_CTRL_REG, val); - - reg = KSEG1ADDR(AR71XX_RESET_BASE); #ifndef LOADADDR /* * This is for initramfs-factory image. @@ -264,6 +253,29 @@ static inline void nec_aterm_init(void) * booting from stock bootloader */ WRITEREG(reg + AR71XX_RESET_REG_WDOG, 0xffffffff); +} +#endif + +#if defined(CONFIG_BOARD_NEC_WG600HP) || \ + defined(CONFIG_BOARD_NEC_WR8750N) || \ + defined(CONFIG_BOARD_NEC_WR9500N) + +#define AR934X_PLL_SWITCH_CLK_CTRL_REG 0x24 +#define AR934X_PLL_SWITCH_CLK_CTRL_SWITCHCLK_SEL BIT(0) + +static inline void nec_aterm_init(void) +{ + unsigned int reg, val; + + printf("NEC Aterm series (AR9344)\n"); + + /* set REFCLK=40MHz to switch PLL */ + reg = KSEG1ADDR(AR71XX_PLL_BASE); + val = READREG(reg + AR934X_PLL_SWITCH_CLK_CTRL_REG); + val &= ~AR934X_PLL_SWITCH_CLK_CTRL_SWITCHCLK_SEL; + WRITEREG(reg + AR934X_PLL_SWITCH_CLK_CTRL_REG, val); + + nec_aterm_reset_common(); /* * deassert some RESET bits not handled by drivers @@ -272,11 +284,59 @@ static inline void nec_aterm_init(void) * - ETH_SWITCH(_ANALOG): eth0 * - RTC : wmac */ + reg = KSEG1ADDR(AR71XX_RESET_BASE); val = READREG(reg + AR934X_RESET_REG_RESET_MODULE); val &= ~(AR934X_RESET_ETH_SWITCH | AR934X_RESET_ETH_SWITCH_ANALOG | AR934X_RESET_RTC); WRITEREG(reg + AR934X_RESET_REG_RESET_MODULE, val); } +#elif defined(CONFIG_BOARD_NEC_WG1400HP) + +#define QCA955X_GMAC_MR_AN_CONTROL_PHY_RESET_MASK BIT(15) +#define QCA955X_GMAC_MR_AN_CONTROL_FULL_DUPLEX_MASK BIT(8) +#define QCA955X_GMAC_MR_AN_CONTROL_SPEED_SEL1_MASK BIT(6) + +#define QCA955X_GMAC_SGMII_CONFIG_SPEED_SHIFT 6 + #define QCA955X_GMAC_SGMII_CONFIG_SPEED_1000M 0x2 +#define QCA955X_GMAC_SGMII_CONFIG_FORCE_SPEED_MASK BIT(5) +#define QCA955X_GMAC_SGMII_CONFIG_MODE_CTRL_SHIFT 0 + #define QCA955X_GMAC_SGMII_CONFIG_MODE_SGMII 0x2 + +static inline void nec_aterm_init(void) +{ + unsigned int reg, val; + int ret; + + printf("NEC Aterm series (QCA9558)\n"); + + nec_aterm_reset_common(); + + printf("\nCalibrating SGMII\n"); + ret = extract_qca955x_sgmii_res_cal(); + if (ret >= 0) + setup_qca955x_eth_serdes_cal(ret); + + /* set SGMII force mode to make eth1 working */ + printf("\nConfiguring SGMII force mode\n"); + reg = KSEG1ADDR(QCA955X_GMAC_BASE); + WRITEREG(reg + QCA955X_GMAC_REG_SGMII_CONFIG, + QCA955X_GMAC_SGMII_CONFIG_SPEED_1000M + << QCA955X_GMAC_SGMII_CONFIG_SPEED_SHIFT | + QCA955X_GMAC_SGMII_CONFIG_FORCE_SPEED_MASK | + QCA955X_GMAC_SGMII_CONFIG_MODE_SGMII + << QCA955X_GMAC_SGMII_CONFIG_MODE_CTRL_SHIFT); + printf(" SGMII_CONFIG : 0x%08x\n", + READREG(reg + QCA955X_GMAC_REG_SGMII_CONFIG)); + val = QCA955X_GMAC_MR_AN_CONTROL_FULL_DUPLEX_MASK | + QCA955X_GMAC_MR_AN_CONTROL_SPEED_SEL1_MASK; + WRITEREG(reg + QCA955X_GMAC_REG_MR_AN_CONTROL, + val | QCA955X_GMAC_MR_AN_CONTROL_PHY_RESET_MASK); + printf(" MR_AN_CONTROL: 0x%08x\n", + READREG(reg + QCA955X_GMAC_REG_MR_AN_CONTROL)); + WRITEREG(reg + QCA955X_GMAC_REG_MR_AN_CONTROL, val); + printf(" MR_AN_CONTROL: 0x%08x\n", + READREG(reg + QCA955X_GMAC_REG_MR_AN_CONTROL)); +} #else static inline void nec_aterm_init(void) {} #endif