Merge branch 'openwrt:master' into master

This commit is contained in:
Hayzam Sherif 2023-11-25 17:57:17 +05:30 committed by GitHub
commit 24d7235e9a
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GPG key ID: 4AEE18F83AFDEB23
219 changed files with 7056 additions and 1709 deletions

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@ -1,2 +1,2 @@
LINUX_VERSION-5.15 = .138
LINUX_KERNEL_HASH-5.15.138 = af84e54164e1c01f59764ba528448ed36b377d22aafbd81b4b0cf47792ef4aaa
LINUX_VERSION-5.15 = .139
LINUX_KERNEL_HASH-5.15.139 = 9c68c10dfe18e59b892e940436dea6a18d167160d55e62563cf7282244d8044e

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@ -1,2 +1,2 @@
LINUX_VERSION-6.1 = .62
LINUX_KERNEL_HASH-6.1.62 = b9fd616facd6becfceef88b9be718d0f16625cab3fe81d11384802a7091e85ec
LINUX_VERSION-6.1 = .63
LINUX_KERNEL_HASH-6.1.63 = c29d043b01dd4fcc61a24fd027c5c7912b15b1f10d8e3c83a0cb935885f0758d

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@ -16,7 +16,7 @@ PKG_FLAGS:=nonshared
PKG_LICENSE:=GPL-2.0 GPL-2.0+
PKG_LICENSE_FILES:=Licenses/README
PKG_BUILD_PARALLEL:=1
PKG_BUILD_PARALLEL ?= 1
export GCC_HONOUR_COPTS=s

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@ -34,19 +34,19 @@ function compl32(v) {
BEGIN {
slpos=index(ARGV[1],"/")
if (slpos == 0) {
ipaddr=ip2int(ARGV[1])
dotpos=index(ARGV[2],".")
if (dotpos == 0)
netmask=compl32(2**(32-int(ARGV[2]))-1)
else
netmask=ip2int(ARGV[2])
} else {
ipaddr=ip2int(substr(ARGV[1],0,slpos-1))
netmask=compl32(2**(32-int(substr(ARGV[1],slpos+1)))-1)
if (slpos != 0) {
# rearrange arguments to not use compound notation
ARGV[4]=ARGV[3]
ARGV[3]=ARGV[2]
ARGV[2]=substr(ARGV[1],slpos+1)
ARGV[1]=substr(ARGV[1],0,slpos-1)
}
ipaddr=ip2int(ARGV[1])
dotpos=index(ARGV[2],".")
if (dotpos == 0)
netmask=compl32(2**(32-int(ARGV[2]))-1)
else
netmask=ip2int(ARGV[2])
network=and(ipaddr,netmask)
prefix=32-bitcount(compl32(netmask))

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@ -66,7 +66,8 @@ mercusys,mr90x-v1)
ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1"
;;
cetron,ct3003|\
netgear,wax220)
netgear,wax220|\
zbtlink,zbt-z8102ax)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
;;
ubnt,unifi-6-plus)
@ -79,6 +80,7 @@ xiaomi,redmi-router-ax6000-stock)
ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x10000" "0x20000"
;;
h3c,magic-nx30-pro|\
jcg,q30-pro|\
qihoo,360t7|\
tplink,tl-xdr4288|\
tplink,tl-xdr6086|\

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@ -68,6 +68,10 @@ methode,edpu)
ubootenv_add_uci_config "/dev/mtd0" "0x180000" "0x10000" "0x10000"
fi
;;
synology,ds213j)
idx="$(find_mtd_index u-boot-env)"
[ -n "$idx" ] && ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x10000"
;;
esac
config_load ubootenv

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@ -236,6 +236,18 @@ define U-Boot/mt7981_h3c_magic-nx30-pro
DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
endef
define U-Boot/mt7981_jcg_q30-pro
NAME:=JCG Q30 PRO
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=jcg_q30-pro
UBOOT_CONFIG:=mt7981_jcg_q30-pro
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=spim-nand
BL2_SOC:=mt7981
BL2_DDRTYPE:=ddr3
DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
endef
define U-Boot/mt7981_rfb-spim-nand
NAME:=MT7981 Reference Board
BUILD_SUBTARGET:=filogic
@ -523,6 +535,7 @@ UBOOT_TARGETS := \
mt7981_cmcc_rax3000m-emmc \
mt7981_cmcc_rax3000m-nand \
mt7981_h3c_magic-nx30-pro \
mt7981_jcg_q30-pro \
mt7981_rfb-spim-nand \
mt7981_rfb-emmc \
mt7981_rfb-nor \

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@ -870,7 +870,7 @@
+ubi_init_emmc_install=run sdmmc_read_emmc_install && run ubi_write_emmc_install
+ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
+ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
+ubi_write_emmc_install=ubi check emmc_install && ubi remote emmc_install ; ubi create emmc_install 0x800000 dynamic ; ubi write $loadaddr emmc_install 0x800000
+ubi_write_emmc_install=ubi check emmc_install && ubi remove emmc_install ; ubi create emmc_install 0x800000 dynamic ; ubi write $loadaddr emmc_install 0x800000
+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
+_init_env=setenv _init_env ; setenv _create_env ; saveenv ; saveenv

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@ -0,0 +1,420 @@
--- /dev/null
+++ b/configs/mt7981_jcg_q30-pro_defconfig
@@ -0,0 +1,175 @@
+CONFIG_ARM=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_TARGET_MT7981=y
+CONFIG_TEXT_BASE=0x41e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="mt7981_jcg_q30-pro"
+CONFIG_DEFAULT_ENV_FILE="jcg_q30-pro_env"
+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_jcg_q30-pro.dtb"
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DEBUG_UART_BASE=0x11002000
+CONFIG_DEBUG_UART_CLOCK=40000000
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x46000000
+CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_BOOTDELAY=30
+CONFIG_AUTOBOOT_MENU_SHOW=y
+CONFIG_CFB_CONSOLE_ANSI=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
+CONFIG_GPIO_HOG=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_FIT=y
+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_LOGLEVEL=7
+CONFIG_LOG=y
+CONFIG_SYS_PROMPT="MT7981> "
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_BOOTP=y
+CONFIG_CMD_BUTTON=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_CDP=y
+CONFIG_CMD_CPU=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ENV_READMEM=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FDT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_HASH=y
+CONFIG_CMD_ITEST=y
+CONFIG_CMD_LED=y
+CONFIG_CMD_LICENSE=y
+CONFIG_CMD_LINK_LOCAL=y
+# CONFIG_CMD_MBR is not set
+CONFIG_CMD_PCI=y
+CONFIG_CMD_PSTORE=y
+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_PWM=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_TFTPBOOT=y
+CONFIG_CMD_TFTPSRV=y
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBI_RENAME=y
+CONFIG_CMD_UBIFS=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_RARP=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_SOURCE=y
+CONFIG_CMD_STRINGS=y
+CONFIG_CMD_UUID=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DM_MTD=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_MTK=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_PARTITION_UUIDS=y
+CONFIG_NETCONSOLE=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_SCSI=y
+CONFIG_AHCI=y
+CONFIG_AHCI_PCI=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SCSI=y
+CONFIG_CMD_SCSI=y
+CONFIG_PHY=y
+CONFIG_PHY_MTK_TPHY=y
+CONFIG_PHY_FIXED=y
+CONFIG_MTK_AHCI=y
+CONFIG_DM_ETH=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PCI=y
+# CONFIG_MMC is not set
+# CONFIG_DM_MMC is not set
+CONFIG_MTD=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_DM_PCI=y
+CONFIG_PCIE_MEDIATEK=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7622=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MTK_SPI_NAND=y
+CONFIG_MTK_SPI_NAND_MTD=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_WDT_MTK=y
+CONFIG_LZO=y
+CONFIG_ZSTD=y
+CONFIG_HEXDUMP=y
+CONFIG_RANDOM_UUID=y
+CONFIG_REGEX=y
+CONFIG_OF_EMBED=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_ENV_UBI_PART="ubi"
+CONFIG_ENV_SIZE=0x1f000
+CONFIG_ENV_SIZE_REDUND=0x1f000
+CONFIG_ENV_UBI_VOLUME="ubootenv"
+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7981=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_HEXDUMP=y
+CONFIG_USE_DEFAULT_ENV_FILE=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_MTK_SPIM=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_LMB_MAX_REGIONS=64
+CONFIG_USE_IPADDR=y
+CONFIG_IPADDR="192.168.1.1"
+CONFIG_USE_SERVERIP=y
+CONFIG_SERVERIP="192.168.1.254"
--- /dev/null
+++ b/arch/arm/dts/mt7981_jcg_q30-pro.dts
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt7981.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "JCG Q30 PRO";
+ compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
+
+ chosen {
+ stdout-path = &uart0;
+ tick-timer = &timer0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ factory {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status_red {
+ label = "red:status";
+ gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ status_blue {
+ label = "blue:status";
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&uart0 {
+ mediatek,force-highspeed;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "disabled";
+};
+
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "2500base-x";
+ mediatek,switch = "mt7531";
+ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ };
+};
+
+&pinctrl {
+ spi_flash_pins: spi0-pins-func-1 {
+ mux {
+ function = "flash";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
+ };
+ };
+
+ spic_pins: spi1-pins-func-1 {
+ mux {
+ function = "spi";
+ groups = "spi1_1";
+ };
+ };
+
+ uart1_pins: spi1-pins-func-3 {
+ mux {
+ function = "uart";
+ groups = "uart1_2";
+ };
+ };
+
+ pwm_pins: pwm0-pins-func-1 {
+ mux {
+ function = "pwm";
+ groups = "pwm0_1", "pwm1_0";
+ };
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins>;
+ status = "okay";
+};
+
+&spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_flash_pins>;
+ status = "okay";
+ must_tx;
+ enhance_timing;
+ dma_ext;
+ ipm_design;
+ support_quad;
+ tick_dly = <2>;
+ sample_sel = <0>;
+
+ spi_nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x100000>;
+ };
+
+ partition@100000 {
+ label = "orig-env";
+ reg = <0x100000 0x80000>;
+ };
+
+ partition@160000 {
+ label = "factory";
+ reg = <0x180000 0x200000>;
+ };
+
+ partition@380000 {
+ label = "fip";
+ reg = <0x380000 0x200000>;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x7000000>;
+ };
+ };
+ };
+};
+
+&watchdog {
+ status = "disabled";
+};
--- /dev/null
+++ b/jcg_q30-pro_env
@@ -0,0 +1,57 @@
+ipaddr=192.168.1.1
+serverip=192.168.1.254
+loadaddr=0x46000000
+console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
+bootconf=config-1
+bootdelay=0
+bootfile=openwrt-mediatek-filogic-jcg_q30-pro-initramfs-recovery.itb
+bootfile_bl2=openwrt-mediatek-filogic-jcg_q30-pro-preloader.bin
+bootfile_fip=openwrt-mediatek-filogic-jcg_q30-pro-bl31-uboot.fip
+bootfile_upg=openwrt-mediatek-filogic-jcg_q30-pro-squashfs-sysupgrade.itb
+bootled_pwr=blue:status
+bootled_rec=red:status
+bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
+bootmenu_default=0
+bootmenu_delay=0
+bootmenu_title= ( ( ( OpenWrt ) ) )
+bootmenu_0=Initialize environment.=run _firstboot
+bootmenu_0d=Run default boot command.=run boot_default
+bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
+bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
+bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
+bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
+bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
+bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return
+bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
+bootmenu_8=Reboot.=reset
+bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
+boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
+boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
+boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
+boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
+boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever
+boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
+boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
+part_default=production
+part_recovery=recovery
+reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
+mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
+mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
+ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
+ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
+ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
+ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
+ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
+ethaddr_factory=mtd read factory 0x40080000 0xa0000 0x800 && env readmem -b ethaddr 0x4008002a 0x6 ; setenv ethaddr_factory
+_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
+_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first
+_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"

View file

@ -170,6 +170,13 @@ define Package/iwlwifi-firmware-iwl9260/install
endef
$(eval $(call BuildPackage,iwlwifi-firmware-iwl9260))
Package/iwlwifi-firmware-ax101 = $(call Package/firmware-default,Intel AX101 firmware)
define Package/iwlwifi-firmware-ax101/install
$(INSTALL_DIR) $(1)/lib/firmware
$(INSTALL_DATA) $(PKG_BUILD_DIR)/iwlwifi-so-a0-hr-b0-81.ucode $(1)/lib/firmware
endef
$(eval $(call BuildPackage,iwlwifi-firmware-ax101))
Package/iwlwifi-firmware-ax200 = $(call Package/firmware-default,Intel AX200 firmware)
define Package/iwlwifi-firmware-ax200/install
$(INSTALL_DIR) $(1)/lib/firmware

View file

@ -378,9 +378,11 @@ $(eval $(call KernelPackage,phy-smsc))
define KernelPackage/phy-aquantia
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Aquantia Ethernet PHYs
DEPENDS:=+kmod-libphy +kmod-hwmon-core
DEPENDS:=+kmod-libphy +kmod-hwmon-core +kmod-lib-crc-ccitt
KCONFIG:=CONFIG_AQUANTIA_PHY
FILES:=$(LINUX_DIR)/drivers/net/phy/aquantia.ko
FILES:= \
$(LINUX_DIR)/drivers/net/phy/aquantia.ko@lt6.1 \
$(LINUX_DIR)/drivers/net/phy/aquantia/aquantia.ko@ge6.1
AUTOLOAD:=$(call AutoLoad,18,aquantia,1)
endef

View file

@ -0,0 +1,82 @@
#
# Copyright (C) 2023 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=udebug
CMAKE_INSTALL:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/udebug.git
PKG_MIRROR_HASH:=baf437fb12b1faaf6c7eea3fea253c6d87c31b85f768b48d3984fe398e5b20b8
PKG_SOURCE_DATE:=2023-11-20
PKG_SOURCE_VERSION:=759d9404034b7da97b3950c806ace7296a0f7a12
PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE))
PKG_LICENSE:=GPL-2.0
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
include $(INCLUDE_DIR)/package.mk
include $(INCLUDE_DIR)/cmake.mk
define Package/libudebug
SECTION:=libs
CATEGORY:=Libraries
TITLE:=udebug client library
DEPENDS:=+libubox
endef
define Package/udebugd
SECTION:=utils
CATEGORY:=Utilities
TITLE:=OpenWrt debug service
DEPENDS:=+libudebug +libubus
endef
define Package/udebugd/conffiles
/etc/config/udebug
endef
define Package/ucode-mod-udebug
SECTION:=utils
CATEGORY:=Utilities
TITLE:=ucode udebug module
DEPENDS:=+libucode +libudebug
endef
define Package/udebug-cli
SECTION:=utils
CATEGORY:=Utilities
TITLE:=OpenWrt debug service CLI
DEPENDS:=+udebugd +ucode-mod-udebug
endef
define Package/libudebug/install
$(INSTALL_DIR) $(1)/usr/lib
$(CP) $(PKG_INSTALL_DIR)/usr/lib/*.so* $(1)/usr/lib
endef
define Package/ucode-mod-udebug/install
$(INSTALL_DIR) $(1)/usr/lib/ucode
$(CP) $(PKG_INSTALL_DIR)/usr/lib/ucode/*.so $(1)/usr/lib/ucode
endef
define Package/udebugd/install
$(INSTALL_DIR) $(1)/usr/sbin $(1)/etc/init.d $(1)/etc/config
$(INSTALL_BIN) ./files/udebug.config $(1)/etc/config/udebug
$(INSTALL_BIN) ./files/udebug.init $(1)/etc/init.d/udebug
$(CP) $(PKG_INSTALL_DIR)/usr/sbin/udebugd $(1)/usr/sbin
endef
define Package/udebug-cli/install
$(INSTALL_DIR) $(1)/usr/sbin
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/udebug-cli $(1)/usr/sbin/udebug
endef
$(eval $(call BuildPackage,libudebug))
$(eval $(call BuildPackage,udebugd))
$(eval $(call BuildPackage,ucode-mod-udebug))
$(eval $(call BuildPackage,udebug-cli))

View file

@ -0,0 +1,8 @@
config service hostapd
option enabled 0
config service wpa_supplicant
option enabled 0
config service netifd
option enabled 0

View file

@ -0,0 +1,55 @@
#!/bin/sh /etc/rc.common
# Copyright (c) 2021 OpenWrt.org
START=11
USE_PROCD=1
PROG=/usr/sbin/udebugd
start_service() {
procd_open_instance
procd_set_param command "$PROG"
procd_set_param respawn
procd_close_instance
}
get_vars() {
local cfg="$1"
uci show "udebug.$cfg" | while read LINE; do
cur="${LINE##udebug.$1.}"
[[ "$cur" = "$LINE" ]] && continue
var="${cur%%=*}"
[[ "$cur" = "$var" ]] && continue
echo "$var"
done
}
add_debug_service() {
local cfg="$1"
json_add_object "$cfg"
for var in $(get_vars "$cfg"); do
config_get val "$cfg" "$var"
json_add_string "$var" "$val"
done
json_close_object "$cfg"
}
reload_service() {
config_load udebug
json_init
json_add_object service
config_foreach add_debug_service service
json_close_object
ubus call udebug set_config "$(json_dump)"
}
service_triggers() {
procd_add_reload_trigger udebug
}
service_started() {
ubus -t 10 wait_for udebug
[ $? = 0 ] && reload_service
}

View file

@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git
PKG_SOURCE_DATE:=2023-11-14
PKG_SOURCE_VERSION:=8587c074f1eb2064c42adb0a6aa5073f695ab89d
PKG_MIRROR_HASH:=f5ceb771badd7a23cceb53537299580d4b483e2b3ec5de09b9c3c54692893dd9
PKG_SOURCE_DATE:=2023-11-20
PKG_SOURCE_VERSION:=f3e06e81b347bbdec1c6c71603328b6e442728d4
PKG_MIRROR_HASH:=f16dd61aede5597fd7b5ee8e7752a916494281bc981b35c16e788ddb7409584a
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=GPL-2.0
@ -21,7 +21,7 @@ include $(INCLUDE_DIR)/cmake.mk
define Package/netifd
SECTION:=base
CATEGORY:=Base system
DEPENDS:=+libuci +libnl-tiny +libubus +ubus +ubusd +jshn +libubox
DEPENDS:=+libuci +libnl-tiny +libubus +ubus +ubusd +jshn +libubox +libudebug
TITLE:=OpenWrt Network Interface Configuration Daemon
endef

View file

@ -79,7 +79,7 @@ ifneq ($(CONFIG_DRIVER_11AX_SUPPORT),)
HOSTAPD_IEEE80211AX:=y
endif
CORE_DEPENDS = +ucode +libubus +libucode +ucode-mod-fs +ucode-mod-nl80211 +ucode-mod-rtnl +ucode-mod-ubus +ucode-mod-uloop +libblobmsg-json
CORE_DEPENDS = +ucode +libubus +libucode +ucode-mod-fs +ucode-mod-nl80211 +ucode-mod-rtnl +ucode-mod-ubus +ucode-mod-uloop +libblobmsg-json +libudebug
OPENSSL_DEPENDS = +PACKAGE_$(1):libopenssl +PACKAGE_$(1):libopenssl-legacy
DRIVER_MAKEOPTS= \
@ -585,7 +585,7 @@ TARGET_CPPFLAGS := \
-D_GNU_SOURCE \
$(if $(CONFIG_WPA_MSG_MIN_PRIORITY),-DCONFIG_MSG_MIN_PRIORITY=$(CONFIG_WPA_MSG_MIN_PRIORITY))
TARGET_LDFLAGS += -lubox -lubus -lblobmsg_json -lucode -lm -lnl-tiny
TARGET_LDFLAGS += -lubox -lubus -lblobmsg_json -lucode -lm -lnl-tiny -ludebug
ifdef CONFIG_WPA_ENABLE_WEP
DRIVER_MAKEOPTS += CONFIG_WEP=y

View file

@ -278,12 +278,12 @@ function iface_reload_config(phydev, config, old_config)
return false;
let iface = hostapd.interfaces[phy];
let iface_name = old_config.bss[0].ifname;
if (!iface) {
hostapd.printf(`Could not find previous interface ${iface_name}`);
return false;
}
let iface_name = old_config.bss[0].ifname;
let first_bss = hostapd.bss[iface_name];
if (!first_bss) {
hostapd.printf(`Could not find bss of previous interface ${iface_name}`);
@ -782,8 +782,33 @@ let main_obj = {
},
};
function handle_debug_config(cfg) {
hostapd.printf(`handle_debug_config: ${cfg}\n`);
if (!cfg)
return;
let data = cfg.service;
if (!data)
return;
data = data.hostapd;
if (!data)
return;
hostapd.udebug_set(!!+data.enabled);
}
hostapd.data.ubus = ubus;
hostapd.data.obj = ubus.publish("hostapd", main_obj);
hostapd.data.debug_sub = ubus.subscriber((req) => {
if (req.type != "config")
return;
handle_debug_config(req.data);
});
hostapd.data.debug_sub.subscribe("udebug");
handle_debug_config(ubus.call("udebug", "get_config", {}));
function bss_event(type, name, data) {
let ubus = hostapd.data.ubus;

View file

@ -244,8 +244,32 @@ let main_obj = {
},
};
function handle_debug_config(cfg) {
if (!cfg)
return;
let data = cfg.service;
if (!data)
return;
data = data.wpa_supplicant;
if (!data)
return;
wpas.udebug_set(!!+data.enabled);
}
wpas.data.ubus = ubus;
wpas.data.obj = ubus.publish("wpa_supplicant", main_obj);
wpas.data.debug_sub = ubus.subscriber((req) => {
if (req.type != "config")
return;
handle_debug_config(req.data);
});
wpas.data.debug_sub.subscribe("udebug");
handle_debug_config(ubus.call("udebug", "get_config", {}));
function iface_event(type, name, data) {
let ubus = wpas.data.ubus;

View file

@ -9,8 +9,12 @@
},
"hostapd": {
"methods": [ "apsta_state" ]
},
"udebug": {
"methods": [ "get_config" ]
}
},
"subscribe": [ "udebug" ],
"publish": [ "hostapd", "hostapd.*", "wpa_supplicant", "wpa_supplicant.*" ],
"send": [ "bss.*", "wps_credentials" ]
}

View file

@ -196,7 +196,7 @@
#ifdef CONFIG_BGSCAN
if (state == WPA_COMPLETED && wpa_s->current_ssid != wpa_s->bgscan_ssid)
@@ -7596,6 +7597,7 @@ struct wpa_supplicant * wpa_supplicant_a
@@ -7594,6 +7595,7 @@ struct wpa_supplicant * wpa_supplicant_a
#endif /* CONFIG_P2P */
wpas_ubus_add_bss(wpa_s);
@ -204,7 +204,7 @@
return wpa_s;
}
@@ -7623,6 +7625,7 @@ int wpa_supplicant_remove_iface(struct w
@@ -7621,6 +7623,7 @@ int wpa_supplicant_remove_iface(struct w
struct wpa_supplicant *parent = wpa_s->parent;
#endif /* CONFIG_MESH */
@ -212,7 +212,7 @@
wpas_ubus_free_bss(wpa_s);
/* Remove interface from the global list of interfaces */
@@ -7933,6 +7936,7 @@ struct wpa_global * wpa_supplicant_init(
@@ -7931,6 +7934,7 @@ struct wpa_global * wpa_supplicant_init(
eloop_register_timeout(WPA_SUPPLICANT_CLEANUP_INTERVAL, 0,
wpas_periodic, global, NULL);
@ -220,7 +220,7 @@
return global;
}
@@ -7971,12 +7975,8 @@ int wpa_supplicant_run(struct wpa_global
@@ -7969,12 +7973,8 @@ int wpa_supplicant_run(struct wpa_global
eloop_register_signal_terminate(wpa_supplicant_terminate, global);
eloop_register_signal_reconfig(wpa_supplicant_reconfig, global);
@ -233,7 +233,7 @@
return 0;
}
@@ -8009,6 +8009,8 @@ void wpa_supplicant_deinit(struct wpa_gl
@@ -8007,6 +8007,8 @@ void wpa_supplicant_deinit(struct wpa_gl
wpas_notify_supplicant_deinitialized(global);
@ -395,7 +395,60 @@
{
--- a/src/drivers/driver_nl80211.c
+++ b/src/drivers/driver_nl80211.c
@@ -1333,7 +1333,7 @@ static void wpa_driver_nl80211_event_rtm
@@ -73,6 +73,16 @@ enum nlmsgerr_attrs {
#endif /* ANDROID */
+static void handle_nl_debug_hook(struct nl_msg *msg, int tx)
+{
+ const struct nlmsghdr *nlh;
+
+ if (!wpa_netlink_hook)
+ return;
+
+ nlh = nlmsg_hdr(msg);
+ wpa_netlink_hook(tx, nlh, nlh->nlmsg_len);
+}
static struct nl_sock * nl_create_handle(struct nl_cb *cb, const char *dbg)
{
@@ -379,6 +389,11 @@ static int no_seq_check(struct nl_msg *m
return NL_OK;
}
+static int debug_handler(struct nl_msg *msg, void *arg)
+{
+ handle_nl_debug_hook(msg, 0);
+ return NL_OK;
+}
static void nl80211_nlmsg_clear(struct nl_msg *msg)
{
@@ -415,6 +430,7 @@ static int send_and_recv(struct nl80211_
if (!msg)
return -ENOMEM;
+ handle_nl_debug_hook(msg, 1);
cb = nl_cb_clone(global->nl_cb);
if (!cb)
goto out;
@@ -443,6 +459,7 @@ static int send_and_recv(struct nl80211_
err = 1;
+ nl_cb_set(cb, NL_CB_MSG_IN, NL_CB_CUSTOM, debug_handler, NULL);
nl_cb_err(cb, NL_CB_CUSTOM, error_handler, &err);
nl_cb_set(cb, NL_CB_FINISH, NL_CB_CUSTOM, finish_handler, &err);
if (ack_handler_custom) {
@@ -919,6 +936,7 @@ nl80211_get_wiphy_data_ap(struct i802_bs
os_free(w);
return NULL;
}
+ nl_cb_set(w->nl_cb, NL_CB_MSG_IN, NL_CB_CUSTOM, debug_handler, NULL);
nl_cb_set(w->nl_cb, NL_CB_SEQ_CHECK, NL_CB_CUSTOM,
no_seq_check, NULL);
nl_cb_set(w->nl_cb, NL_CB_VALID, NL_CB_CUSTOM,
@@ -1333,7 +1351,7 @@ static void wpa_driver_nl80211_event_rtm
}
wpa_printf(MSG_DEBUG, "nl80211: Interface down (%s/%s)",
namebuf, ifname);
@ -404,7 +457,7 @@
wpa_printf(MSG_DEBUG,
"nl80211: Not the main interface (%s) - do not indicate interface down",
drv->first_bss->ifname);
@@ -1369,7 +1369,7 @@ static void wpa_driver_nl80211_event_rtm
@@ -1369,7 +1387,7 @@ static void wpa_driver_nl80211_event_rtm
}
wpa_printf(MSG_DEBUG, "nl80211: Interface up (%s/%s)",
namebuf, ifname);
@ -413,7 +466,23 @@
wpa_printf(MSG_DEBUG,
"nl80211: Not the main interface (%s) - do not indicate interface up",
drv->first_bss->ifname);
@@ -8432,6 +8432,7 @@ static void *i802_init(struct hostapd_da
@@ -1992,6 +2010,7 @@ static int wpa_driver_nl80211_init_nl_gl
/* Continue without vendor events */
}
+ nl_cb_set(global->nl_cb, NL_CB_MSG_IN, NL_CB_CUSTOM, debug_handler, NULL);
nl_cb_set(global->nl_cb, NL_CB_SEQ_CHECK, NL_CB_CUSTOM,
no_seq_check, NULL);
nl_cb_set(global->nl_cb, NL_CB_VALID, NL_CB_CUSTOM,
@@ -2160,6 +2179,7 @@ static int nl80211_init_bss(struct i802_
if (!bss->nl_cb)
return -1;
+ nl_cb_set(bss->nl_cb, NL_CB_MSG_IN, NL_CB_CUSTOM, debug_handler, NULL);
nl_cb_set(bss->nl_cb, NL_CB_SEQ_CHECK, NL_CB_CUSTOM,
no_seq_check, NULL);
nl_cb_set(bss->nl_cb, NL_CB_VALID, NL_CB_CUSTOM,
@@ -8432,6 +8452,7 @@ static void *i802_init(struct hostapd_da
char master_ifname[IFNAMSIZ];
int ifindex, br_ifindex = 0;
int br_added = 0;
@ -421,7 +490,7 @@
bss = wpa_driver_nl80211_drv_init(hapd, params->ifname,
params->global_priv, 1,
@@ -8491,21 +8492,17 @@ static void *i802_init(struct hostapd_da
@@ -8491,21 +8512,17 @@ static void *i802_init(struct hostapd_da
(params->num_bridge == 0 || !params->bridge[0]))
add_ifidx(drv, br_ifindex, drv->ifindex);
@ -453,7 +522,7 @@
}
if (drv->capa.flags2 & WPA_DRIVER_FLAGS2_CONTROL_PORT_RX) {
@@ -8875,6 +8872,50 @@ static int wpa_driver_nl80211_if_remove(
@@ -8875,6 +8892,50 @@ static int wpa_driver_nl80211_if_remove(
return 0;
}
@ -504,7 +573,7 @@
static int cookie_handler(struct nl_msg *msg, void *arg)
{
@@ -10513,6 +10554,37 @@ static int driver_nl80211_if_remove(void
@@ -10513,6 +10574,37 @@ static int driver_nl80211_if_remove(void
}
@ -542,7 +611,7 @@
static int driver_nl80211_send_mlme(void *priv, const u8 *data,
size_t data_len, int noack,
unsigned int freq,
@@ -13697,6 +13769,8 @@ const struct wpa_driver_ops wpa_driver_n
@@ -13697,6 +13789,8 @@ const struct wpa_driver_ops wpa_driver_n
.set_acl = wpa_driver_nl80211_set_acl,
.if_add = wpa_driver_nl80211_if_add,
.if_remove = driver_nl80211_if_remove,
@ -551,3 +620,52 @@
.send_mlme = driver_nl80211_send_mlme,
.get_hw_feature_data = nl80211_get_hw_feature_data,
.sta_add = wpa_driver_nl80211_sta_add,
--- a/src/utils/wpa_debug.c
+++ b/src/utils/wpa_debug.c
@@ -26,6 +26,10 @@ static FILE *wpa_debug_tracing_file = NU
#define WPAS_TRACE_PFX "wpas <%d>: "
#endif /* CONFIG_DEBUG_LINUX_TRACING */
+void (*wpa_printf_hook)(int level, const char *fmt, va_list ap);
+void (*wpa_hexdump_hook)(int level, const char *title, const void *buf,
+ size_t len);
+void (*wpa_netlink_hook)(int tx, const void *data, size_t len);
int wpa_debug_level = MSG_INFO;
int wpa_debug_show_keys = 0;
@@ -210,6 +214,12 @@ void _wpa_printf(int level, const char *
{
va_list ap;
+ if (wpa_printf_hook) {
+ va_start(ap, fmt);
+ wpa_printf_hook(level, fmt, ap);
+ va_end(ap);
+ }
+
if (level >= wpa_debug_level) {
#ifdef CONFIG_ANDROID_LOG
va_start(ap, fmt);
@@ -260,6 +270,9 @@ void _wpa_hexdump(int level, const char
{
size_t i;
+ if (wpa_hexdump_hook)
+ wpa_hexdump_hook(level, title, buf, len);
+
#ifdef CONFIG_DEBUG_LINUX_TRACING
if (wpa_debug_tracing_file != NULL) {
fprintf(wpa_debug_tracing_file,
--- a/src/utils/wpa_debug.h
+++ b/src/utils/wpa_debug.h
@@ -11,6 +11,10 @@
#include "wpabuf.h"
+extern void (*wpa_printf_hook)(int level, const char *fmt, va_list ap);
+extern void (*wpa_hexdump_hook)(int level, const char *title,
+ const void *buf, size_t len);
+extern void (*wpa_netlink_hook)(int tx, const void *data, size_t len);
extern int wpa_debug_level;
extern int wpa_debug_show_keys;
extern int wpa_debug_timestamp;

View file

@ -711,6 +711,7 @@ int hostapd_ucode_init(struct hapd_interfaces *ifaces)
{ "freq_info", uc_wpa_freq_info },
{ "add_iface", uc_hostapd_add_iface },
{ "remove_iface", uc_hostapd_remove_iface },
{ "udebug_set", uc_wpa_udebug_set },
};
static const uc_function_list_t bss_fns[] = {
{ "ctrl", uc_hostapd_bss_ctrl },

View file

@ -4,12 +4,20 @@
#include "crypto/crypto.h"
#include "crypto/sha1.h"
#include "common/ieee802_11_common.h"
#include <linux/netlink.h>
#include <linux/genetlink.h>
#include <linux/nl80211.h>
#include <libubox/uloop.h>
#include <ucode/compiler.h>
#include <udebug.h>
static uc_value_t *registry;
static uc_vm_t vm;
static struct uloop_timeout gc_timer;
static struct udebug ud;
static struct udebug_buf ud_log, ud_nl[3];
#define UDEBUG_FLAG_RX_FRAME (1ULL << 0)
static void uc_gc_timer(struct uloop_timeout *timeout)
{
@ -251,6 +259,115 @@ int wpa_ucode_call_prepare(const char *fname)
return 0;
}
static void udebug_printf_hook(int level, const char *fmt, va_list ap)
{
udebug_entry_init(&ud_log);
udebug_entry_vprintf(&ud_log, fmt, ap);
udebug_entry_add(&ud_log);
}
static void udebug_hexdump_hook(int level, const char *title,
const void *data, size_t len)
{
char *buf;
udebug_entry_init(&ud_log);
udebug_entry_printf(&ud_log, "%s - hexdump:", title);
buf = udebug_entry_append(&ud_log, NULL, 3 * len);
for (size_t i = 0; i < len; i++)
buf += sprintf(buf, " %02x", *(uint8_t *)(data + i));
udebug_entry_add(&ud_log);
}
static void udebug_netlink_hook(int tx, const void *data, size_t len)
{
struct {
uint16_t pkttype;
uint16_t arphdr;
uint16_t _pad[5];
uint16_t proto;
} hdr = {
.pkttype = host_to_be16(tx ? 7 : 6),
.arphdr = host_to_be16(824),
.proto = host_to_be16(16),
};
const struct nlmsghdr *nlh = data;
const struct genlmsghdr *gnlh = data + NLMSG_HDRLEN;
struct udebug_buf *buf = &ud_nl[!!tx];
if (nlh->nlmsg_type == 0x10)
buf = &ud_nl[2];
else if (!tx && gnlh->cmd == NL80211_CMD_FRAME &&
!(udebug_buf_flags(buf) & UDEBUG_FLAG_RX_FRAME))
return;
udebug_entry_init(buf);
udebug_entry_append(buf, &hdr, sizeof(hdr));
udebug_entry_append(buf, data, len);
udebug_entry_add(buf);
}
uc_value_t *uc_wpa_udebug_set(uc_vm_t *vm, size_t nargs)
{
static const struct udebug_buf_meta meta_log = {
.name = "wpa_log",
.format = UDEBUG_FORMAT_STRING,
};
static const struct udebug_buf_meta meta_nl_ll = {
.name = "wpa_nl_ctrl",
.format = UDEBUG_FORMAT_PACKET,
.sub_format = UDEBUG_DLT_NETLINK,
};
static const struct udebug_buf_meta meta_nl_tx = {
.name = "wpa_nl_tx",
.format = UDEBUG_FORMAT_PACKET,
.sub_format = UDEBUG_DLT_NETLINK,
};
static const struct udebug_buf_flag rx_flags[] = {
{ "rx_frame", UDEBUG_FLAG_RX_FRAME },
};
static const struct udebug_buf_meta meta_nl_rx = {
.name = "wpa_nl_rx",
.format = UDEBUG_FORMAT_PACKET,
.sub_format = UDEBUG_DLT_NETLINK,
.flags = rx_flags,
.n_flags = ARRAY_SIZE(rx_flags),
};
bool val = ucv_is_truish(uc_fn_arg(0));
static bool enabled = false;
if (enabled == val)
return ucv_boolean_new(true);
enabled = val;
if (val) {
udebug_init(&ud);
udebug_auto_connect(&ud, NULL);
udebug_buf_init(&ud_log, 1024, 64 * 1024);
udebug_buf_add(&ud, &ud_log, &meta_log);
udebug_buf_init(&ud_nl[0], 1024, 256 * 1024);
udebug_buf_add(&ud, &ud_nl[0], &meta_nl_rx);
udebug_buf_init(&ud_nl[1], 1024, 64 * 1024);
udebug_buf_add(&ud, &ud_nl[1], &meta_nl_tx);
udebug_buf_init(&ud_nl[2], 256, 32 * 1024);
udebug_buf_add(&ud, &ud_nl[2], &meta_nl_ll);
wpa_printf_hook = udebug_printf_hook;
wpa_hexdump_hook = udebug_hexdump_hook;
wpa_netlink_hook = udebug_netlink_hook;
} else {
for (size_t i = 0; i < ARRAY_SIZE(ud_nl); i++)
udebug_buf_free(&ud_nl[i]);
udebug_buf_free(&ud_log);
udebug_free(&ud);
wpa_printf_hook = NULL;
wpa_hexdump_hook = NULL;
wpa_netlink_hook = NULL;
}
return ucv_boolean_new(true);
}
uc_value_t *wpa_ucode_global_init(const char *name, uc_resource_type_t *global_type)
{
uc_value_t *global = uc_resource_new(global_type, NULL);

View file

@ -21,6 +21,7 @@ int wpa_ucode_registry_add(uc_value_t *reg, uc_value_t *val);
uc_value_t *wpa_ucode_registry_get(uc_value_t *reg, int idx);
uc_value_t *wpa_ucode_registry_remove(uc_value_t *reg, int idx);
uc_value_t *uc_wpa_udebug_set(uc_vm_t *vm, size_t nargs);
uc_value_t *uc_wpa_printf(uc_vm_t *vm, size_t nargs);
uc_value_t *uc_wpa_getpid(uc_vm_t *vm, size_t nargs);
uc_value_t *uc_wpa_sha1(uc_vm_t *vm, size_t nargs);

View file

@ -262,6 +262,7 @@ int wpas_ucode_init(struct wpa_global *gl)
{ "getpid", uc_wpa_getpid },
{ "add_iface", uc_wpas_add_iface },
{ "remove_iface", uc_wpas_remove_iface },
{ "udebug_set", uc_wpa_udebug_set },
};
static const uc_function_list_t iface_fns[] = {
{ "status", uc_wpas_iface_status },

View file

@ -8,13 +8,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=umdns
PKG_RELEASE:=5
PKG_RELEASE:=1
PKG_SOURCE_URL=$(PROJECT_GIT)/project/mdnsd.git
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2023-10-19
PKG_SOURCE_VERSION:=d45c443aa1e6514aab58bbbf9311913e484d31a6
PKG_MIRROR_HASH:=20d91d867f4f34a37c7b2a600327884375f9f16c1ea9bbb3199347d8b617d856
PKG_SOURCE_DATE:=2023-11-21
PKG_SOURCE_VERSION:=b1e023eda3584da4a5dfbc33016839f977a02040
PKG_MIRROR_HASH:=e0619afc3b8e1b8a627b35bbe0734746303db02e6d62fd8a3ff047d4fbaa0522
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
PKG_LICENSE:=LGPL-2.1
@ -27,7 +27,7 @@ define Package/umdns
SECTION:=net
CATEGORY:=Network
TITLE:=OpenWrt Multicast DNS Daemon
DEPENDS:=+libubox +libubus +libblobmsg-json
DEPENDS:=+libubox +libubus +libblobmsg-json +libudebug
endef
TARGET_CFLAGS += -I$(STAGING_DIR)/usr/include

View file

@ -19,6 +19,7 @@
"fcntl",
"fcntl64",
"fstat",
"ftruncate",
"getdents64",
"getsockname",
"getrandom",
@ -48,6 +49,7 @@
"statx",
"time",
"uname",
"unlinkat",
"write",
"writev"
],

View file

@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubus.git
PKG_SOURCE_DATE:=2023-06-05
PKG_SOURCE_VERSION:=f787c97b34894a38b15599886cacbca01271684f
PKG_MIRROR_HASH:=f4e898eb9207f069652f1767835f6aa9f015df2282d51e50ab57a0c3736f36e3
PKG_SOURCE_DATE:=2023-11-14
PKG_SOURCE_VERSION:=b3e8c4ef07ebb6f0f34a5c1f0dc1539068363619
PKG_MIRROR_HASH:=bb7296b17d5a59b9080d4c9ae188dee49f49c0ce88a5cbe0317102123583d663
PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE))
CMAKE_INSTALL:=1

View file

@ -3,13 +3,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=firmware-utils
PKG_RELEASE:=2
PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git
PKG_SOURCE_DATE:=2023-05-18
PKG_SOURCE_VERSION:=02cdbc6a4d61605c008efef09162f772f553fcde
PKG_MIRROR_HASH:=f5188fc38bb03ddbcc34763ff049597e2d8af98c0854910dc87f10e5927096e2
PKG_SOURCE_DATE:=2023-11-21
PKG_SOURCE_VERSION:=12bf1a99bd6eebae90caa144bb4d8b0cd763ff8f
PKG_MIRROR_HASH:=f711bf80123a6f14737da27ab8dfff87a4d429c74057de355b1693e89f223abc
PKG_BUILD_DEPENDS:=openssl zlib

View file

@ -34,7 +34,7 @@ def get_pid(args):
enc = args.hw_version.rjust(8, '0').encode('ascii')
struct.pack_into('>8s', buf, 0x0, enc)
enc = binascii.hexlify(args.hw_id.encode())
enc = binascii.hexlify(args.hw_id.encode()).upper()
struct.pack_into('>6s', buf, 0x8, enc)
enc = args.sw_version.rjust(4, '0').encode('ascii')

View file

@ -0,0 +1,8 @@
GRUB_SERIAL:=$(call qstrip,$(CONFIG_GRUB_SERIAL))
ifeq ($(GRUB_SERIAL),)
$(error This platform requires CONFIG_GRUB_SERIAL be set!)
endif
define Package/base-files/install-target
$(SED) "s#@GRUB_SERIAL@#$(GRUB_SERIAL)#" $(1)/etc/inittab
endef

View file

@ -1,7 +1,7 @@
::sysinit:/etc/init.d/rcS S boot
::shutdown:/etc/init.d/rcS K shutdown
ttyAMA0::askfirst:/usr/libexec/login.sh
ttyS0::askfirst:/usr/libexec/login.sh
@GRUB_SERIAL@::askfirst:/usr/libexec/login.sh
tty0::askfirst:/usr/libexec/login.sh
hvc0::askfirst:/usr/libexec/login.sh
ttymxc0::askfirst:/usr/libexec/login.sh

View file

@ -17,14 +17,10 @@ endif
GRUB_SERIAL:=$(call qstrip,$(CONFIG_GRUB_SERIAL))
ifneq ($(GRUB_SERIAL),)
GRUB_SERIAL_CONFIG := serial --unit=0 --speed=$(CONFIG_GRUB_BAUDRATE) --word=8 --parity=no --stop=1 --rtscts=$(if $(CONFIG_GRUB_FLOWCONTROL),on,off)
GRUB_TERMINALS += serial
endif
GRUB_SERIAL_CONFIG := serial --unit=0 --speed=$(CONFIG_GRUB_BAUDRATE) --word=8 --parity=no --stop=1 --rtscts=$(if $(CONFIG_GRUB_FLOWCONTROL),on,off)
GRUB_TERMINALS += serial
ifneq ($(GRUB_TERMINALS),)
GRUB_TERMINAL_CONFIG := terminal_input $(GRUB_TERMINALS); terminal_output $(GRUB_TERMINALS)
endif
GRUB_TERMINAL_CONFIG := terminal_input $(GRUB_TERMINALS); terminal_output $(GRUB_TERMINALS)
ROOTPART:=$(call qstrip,$(CONFIG_TARGET_ROOTFS_PARTNAME))
ROOTPART:=$(if $(ROOTPART),$(ROOTPART),PARTUUID=$(IMG_PART_SIGNATURE)-02)

View file

@ -0,0 +1,211 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca956x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/mtd/partitions/uimage.h>
/ {
compatible = "dlink,covr-p2500-a1", "qca,qca9563";
model = "D-Link COVR-P2500 A1";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_red;
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
};
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&jtag_disable_pins>;
lan {
label = "green:lan";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
};
led_power_green: power_green {
label = "green:power";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan5g {
label = "green:wlan5g";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0radio";
};
led_power_red: power_red {
label = "red:power";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
wlan2g {
label = "green:wlan2g";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1radio";
};
};
virtual_flash {
compatible = "mtd-concat";
devices = <&fwconcat0 &fwconcat1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
compatible = "openwrt,uimage", "denx,uimage";
openwrt,ih-magic = <0x68737173>;
label = "firmware";
reg = <0x0 0x0>;
};
};
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x40000 0x10000>;
read-only;
};
fwconcat0: partition@50000 {
label = "fwconcat0";
reg = <0x50000 0xe30000>;
};
partition@e80000 {
label = "loader";
reg = <0xe80000 0x10000>;
read-only;
};
fwconcat1: partition@e90000 {
label = "fwconcat1";
reg = <0xe90000 0x160000>;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x10000>;
read-only;
compatible = "nvmem-cells";
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
calibration_ath9k: calibration@1000 {
reg = <0x1000 0x440>;
};
precalibration_ath10k: pre-calibration@5000 {
reg = <0x5000 0x2f20>;
};
};
};
};
};
};
&pcie {
status = "okay";
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0 0 0 0 0>;
nvmem-cells = <&precalibration_ath10k>;
nvmem-cell-names = "pre-calibration";
};
};
&gpio {
phy-reset {
gpio-hog;
gpios = <11 GPIO_ACTIVE_LOW>;
output-low;
line-name = "phy-reset";
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */
0x10 0x81000080 /* POWER_ON_STRAP */
0x50 0xcc35cc35 /* LED_CTRL0 */
0x54 0xcb37cb37 /* LED_CTRL1 */
0x58 0x00000000 /* LED_CTRL2 */
0x5c 0x00f3cf00 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
&eth0 {
status = "okay";
pll-data = <0x03000101 0x00000101 0x00001919>;
phy-mode = "sgmii";
phy-handle = <&phy0>;
};
&wmac {
status = "okay";
nvmem-cells = <&calibration_ath9k>;
nvmem-cell-names = "calibration";
};

View file

@ -230,6 +230,9 @@ devolo,dlan-pro-1200plus-ac|\
devolo,magic-2-wifi)
ucidef_set_led_netdev "plcw" "dLAN" "white:dlan" "eth0.1" "rx"
;;
dlink,covr-p2500-a1)
ucidef_set_led_switch "lan" "LAN" "green:lan" "switch0" "0x0e" "" "link"
;;
dlink,dap-1330-a1|\
dlink,dap-1365-a1)
ucidef_set_rssimon "wlan0" "200000" "1"

View file

@ -286,6 +286,10 @@ ath79_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth0" "2:wan" "3:lan" "4:lan"
;;
dlink,covr-p2500-a1)
ucidef_add_switch "switch0" \
"0@eth0" "1:lan" "2:lan" "3:wan" "4:plc"
;;
dlink,dap-2695-a1)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan" "3:wan" "6@eth1"
@ -634,6 +638,13 @@ ath79_setup_macs()
devolo,magic-2-wifi)
label_mac=$(macaddr_add "$(mtd_get_mac_binary art 0x1002)" 3)
;;
dlink,covr-p2500-a1)
lan_mac=$(mtd_get_mac_ascii art "protest_lan_mac")
wan_mac=$(mtd_get_mac_ascii art "protest_lan_mac")
label_mac=$(mtd_get_mac_ascii art "protest_plc_mac")
plc_mac=$(mtd_get_mac_ascii art "protest_plc_mac")
[ -n "$plc_mac" ] && ucidef_set_interface_macaddr "plc" $plc_mac
;;
dlink,dap-1330-a1|\
dlink,dap-1365-a1|\
dlink,dch-g020-a1)

View file

@ -17,6 +17,12 @@ case "$board" in
adtran,bsap1840)
macaddr_add "$(mtd_get_mac_binary 'Board data' 2)" $(($PHYNBR * 8 + 1)) > /sys${DEVPATH}/macaddress
;;
dlink,covr-p2500-a1)
[ "$PHYNBR" -eq 0 ] && \
mtd_get_mac_ascii art "protest_ath1_mac" > /sys${DEVPATH}/macaddress
[ "$PHYNBR" -eq 1 ] && \
mtd_get_mac_ascii art "protest_ath0_mac" > /sys${DEVPATH}/macaddress
;;
dlink,dap-1330-a1|\
dlink,dap-1365-a1|\
dlink,dch-g020-a1)

View file

@ -33,6 +33,17 @@ define Build/cybertan-trx
-rm $@-empty.bin
endef
define Build/dlink-sge-signature
( \
crc=$$(gzip -c $@ | tail -c 8 | od -An -tx4 --endian little | cut -d " " -f2); \
cat $@; \
$(MKHASH) md5 $@ ; \
echo $(1); \
echo -n $$crc; \
) > $@.new
mv $@.new $@
endef
define Build/edimax-headers
$(eval edimax_magic=$(word 1,$(1)))
$(eval edimax_model=$(word 2,$(1)))
@ -995,6 +1006,26 @@ define Device/devolo_magic-2-wifi
endef
TARGET_DEVICES += devolo_magic-2-wifi
define Device/dlink_covr-p2500-a1
$(Device/loader-okli-uimage)
SOC := qca9563
DEVICE_VENDOR := D-Link
DEVICE_MODEL := COVR-P2500
DEVICE_VARIANT := A1
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct
LOADER_FLASH_OFFS := 0x050000
LOADER_KERNEL_MAGIC := 0x68737173
KERNEL := kernel-bin | append-dtb | lzma | uImage lzma -M 0x68737173
IMAGE_SIZE := 14528k
IMAGES += factory.bin recovery.bin
IMAGE/recovery.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | \
append-rootfs | pad-rootfs | check-size | pad-to 14528k | \
append-loader-okli-uimage $(1) | pad-to 15616k
IMAGE/factory.bin := $$(IMAGE/recovery.bin) | \
dlink-sge-image COVR-P2500 | dlink-sge-signature COVR-P2500
endef
TARGET_DEVICES += dlink_covr-p2500-a1
define Device/dlink_dap-13xx
SOC := qca9533
DEVICE_VENDOR := D-Link

View file

@ -50,10 +50,10 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+ while (!num_words) {
+ if (!wait || !retries)
return 0;
- hwrng_msleep(rng, 1000);
- hwrng_yield(rng);
+ retries--;
+ usleep_range((u32)RNG_US_PER_WORD,
+ (u32)RNG_US_PER_WORD * RNG_FIFO_WORDS);
+ (u32)RNG_US_PER_WORD * RNG_FIFO_WORDS);
+ num_words = rng_readl(priv, RNG_STATUS) >> 24;
}

View file

@ -61,7 +61,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
#include <linux/clockchips.h>
#include <linux/clocksource.h>
#include <linux/clocksource_ids.h>
@@ -1028,6 +1029,16 @@ static void __init arch_timer_of_configu
@@ -1029,6 +1030,16 @@ static void __init arch_timer_of_configu
if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
arch_timer_rate = rate;

View file

@ -187,6 +187,16 @@
label = "cferom";
reg = <0x0000000 0x0020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};
};
partition@20000 {
@ -284,13 +294,3 @@
&usbh {
status = "okay";
};
&cferom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -170,6 +170,16 @@
label = "cferom";
reg = <0x0000000 0x0020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};
};
partition@20000 {
@ -228,13 +238,3 @@
&usbh {
status = "okay";
};
&cferom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -46,9 +46,8 @@
pci-bus = <1>;
pci-dev = <0>;
nvmem-cells = <&macaddr_cferom_6a0>;
nvmem-cells = <&macaddr_cferom_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm4360-sprom.bin";
};
@ -61,7 +60,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cferom_6a0>;
nvmem-cells = <&macaddr_cferom_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -196,6 +195,18 @@
label = "cferom";
reg = <0x0000000 0x0020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@20000 {
@ -309,13 +320,3 @@
&usbh {
status = "okay";
};
&cferom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -185,6 +185,16 @@
label = "cferom";
reg = <0x0000000 0x0020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};
};
partition@20000 {
@ -225,13 +235,3 @@
&usbh {
status = "okay";
};
&cferom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -38,9 +38,8 @@
pci-bus = <1>;
pci-dev = <0>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm43217-sprom.bin";
brcm,sprom-fixups = <6 0x1c00>,
@ -64,7 +63,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -90,6 +89,18 @@
reg = <0x000000 0x010000>;
label = "cfe";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@10000 {
@ -247,13 +258,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -36,9 +36,8 @@
pci-bus = <1>;
pci-dev = <0>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm43227-sprom.bin";
};
@ -51,7 +50,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -74,6 +73,18 @@
label = "cfe";
reg = <0x000000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@10000 {
@ -174,13 +185,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -31,9 +31,8 @@
pci-bus = <1>;
pci-dev = <0>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm43225-sprom.bin";
brcm,sprom-fixups = <97 0xfee5>,
@ -52,7 +51,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -78,6 +77,18 @@
reg = <0x000000 0x010000>;
label = "cfe";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@10000 {
@ -178,13 +189,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -31,9 +31,8 @@
pci-bus = <1>;
pci-dev = <0>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm43225-sprom.bin";
brcm,sprom-fixups = <2 0x05bb>,
@ -70,7 +69,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -96,6 +95,18 @@
reg = <0x000000 0x010000>;
label = "cfe";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@10000 {
@ -205,13 +216,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -38,9 +38,8 @@
pci-bus = <1>;
pci-dev = <0>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm43217-sprom.bin";
};
@ -53,7 +52,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -76,6 +75,18 @@
label = "cfe";
reg = <0x000000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@10000 {
@ -204,13 +215,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -45,9 +45,8 @@
pci-bus = <1>;
pci-dev = <0>;
nvmem-cells = <&macaddr_cferom_6a0>;
nvmem-cells = <&macaddr_cferom_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm43217-sprom.bin";
brcm,sprom-fixups = <6 0x1c00>,
@ -77,7 +76,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cferom_6a0>;
nvmem-cells = <&macaddr_cferom_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -192,6 +191,18 @@
label = "cferom";
reg = <0x0000000 0x0020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@20000 {
@ -300,13 +311,3 @@
&usbh {
status = "okay";
};
&cferom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -134,7 +134,7 @@
&ethernet1 {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
phy-mode = "mii";
@ -162,9 +162,8 @@
qca,no-eeprom;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
#gpio-cells = <2>;
gpio-controller;
@ -183,6 +182,18 @@
label = "cfe";
reg = <0x000000 0x020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@20000 {
@ -195,6 +206,16 @@
label = "cal_data";
reg = <0xee0000 0x100000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
cal_data_1e000: cal@1e000 {
reg = <0x1e000 0xeb8>;
};
};
};
partition@fe0000 {
@ -211,23 +232,3 @@
&usbh {
status = "okay";
};
&cal_data {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
cal_data_1e000: cal@1e000 {
reg = <0x1e000 0xeb8>;
};
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -164,6 +164,16 @@
label = "cferom";
reg = <0x0000000 0x0020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};
};
partition@20000 {
@ -224,13 +234,3 @@
&usbh {
status = "okay";
};
&cferom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -216,6 +216,16 @@
label = "cferom";
reg = <0x0000000 0x0004000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};
};
partition@4000 {
@ -298,13 +308,3 @@
&usbh {
status = "okay";
};
&cferom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -178,6 +178,16 @@
label = "CFE";
reg = <0x000000 0x020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};
};
partition@20000 {
@ -208,13 +218,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -61,9 +61,8 @@
pci-bus = <0>;
pci-dev = <1>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm43222-sprom.bin";
brcm,sprom-fixups = <97 0xfeb3>,
@ -82,7 +81,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -106,6 +105,18 @@
label = "CFE";
reg = <0x0000000 0x0020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@20000 {
@ -170,13 +181,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -61,9 +61,8 @@
pci-bus = <0>;
pci-dev = <1>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm43222-sprom.bin";
brcm,sprom-fixups = <97 0xfeb3>,
@ -82,7 +81,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -106,6 +105,18 @@
label = "CFE";
reg = <0x000000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@20000 {
@ -170,13 +181,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -207,6 +207,16 @@
label = "CFE";
reg = <0x0000000 0x0020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};
};
partition@20000 {
@ -253,13 +263,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -83,9 +83,8 @@
pci-bus = <0>;
pci-dev = <1>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm43222-sprom.bin";
brcm,sprom-fixups = <2 0x04d2>, <4 0x4350>,
@ -124,7 +123,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -157,6 +156,18 @@
label = "CFE";
reg = <0x0000000 0x0020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@20000 {
@ -221,13 +232,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -80,9 +80,8 @@
pci-bus = <0>;
pci-dev = <1>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm4322-sprom.bin";
brcm,sprom-fixups = <97 0xfeed>,
@ -101,7 +100,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -170,6 +169,18 @@
label = "CFE";
reg = <0x000000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@20000 {
@ -218,13 +229,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -88,9 +88,8 @@
pci-bus = <0>;
pci-dev = <1>;
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
brcm,sprom = "brcm/bcm4322-sprom.bin";
brcm,sprom-fixups = <219 0xec08>;
@ -104,7 +103,7 @@
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cfe_6a0>;
nvmem-cells = <&macaddr_cfe_6a0 0>;
nvmem-cell-names = "mac-address";
};
@ -189,6 +188,18 @@
label = "CFE";
reg = <0x000000 0x020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
compatible = "mac-base";
reg = <0x6a0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@20000 {
@ -225,13 +236,3 @@
&usbh {
status = "okay";
};
&cfe {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cfe_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};

View file

@ -414,7 +414,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
/* forking complete and child started to run, tell ptracer */
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -5010,6 +5010,7 @@ context_switch(struct rq *rq, struct tas
@@ -5014,6 +5014,7 @@ context_switch(struct rq *rq, struct tas
* finish_task_switch()'s mmdrop().
*/
switch_mm_irqs_off(prev->active_mm, next->mm, next);

View file

@ -37,7 +37,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
config->val_bits + config->pad_bits, 8);
@@ -1735,6 +1736,7 @@ static int _regmap_raw_write_impl(struct
@@ -1737,6 +1738,7 @@ static int _regmap_raw_write_impl(struct
return ret;
}
@ -45,7 +45,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
map->format.format_reg(map->work_buf, reg, map->reg_shift);
regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
map->write_flag_mask);
@@ -1905,6 +1907,7 @@ static int _regmap_bus_formatted_write(v
@@ -1907,6 +1909,7 @@ static int _regmap_bus_formatted_write(v
return ret;
}
@ -53,7 +53,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
map->format.format_write(map, reg, val);
trace_regmap_hw_write_start(map, reg, 1);
@@ -2346,6 +2349,7 @@ static int _regmap_raw_multi_reg_write(s
@@ -2348,6 +2351,7 @@ static int _regmap_raw_multi_reg_write(s
unsigned int reg = regs[i].reg;
unsigned int val = regs[i].def;
trace_regmap_hw_write_start(map, reg, 1);
@ -61,7 +61,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
map->format.format_reg(u8, reg, map->reg_shift);
u8 += reg_bytes + pad_bytes;
map->format.format_val(u8, val, 0);
@@ -2673,6 +2677,7 @@ static int _regmap_raw_read(struct regma
@@ -2675,6 +2679,7 @@ static int _regmap_raw_read(struct regma
return ret;
}

View file

@ -42,7 +42,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
map->format.pad_bytes = config->pad_bits / 8;
map->format.reg_downshift = config->reg_downshift;
@@ -1736,6 +1738,7 @@ static int _regmap_raw_write_impl(struct
@@ -1738,6 +1740,7 @@ static int _regmap_raw_write_impl(struct
return ret;
}
@ -50,7 +50,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
reg >>= map->format.reg_downshift;
map->format.format_reg(map->work_buf, reg, map->reg_shift);
regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
@@ -1907,6 +1910,7 @@ static int _regmap_bus_formatted_write(v
@@ -1909,6 +1912,7 @@ static int _regmap_bus_formatted_write(v
return ret;
}
@ -58,7 +58,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
reg >>= map->format.reg_downshift;
map->format.format_write(map, reg, val);
@@ -2349,6 +2353,7 @@ static int _regmap_raw_multi_reg_write(s
@@ -2351,6 +2355,7 @@ static int _regmap_raw_multi_reg_write(s
unsigned int reg = regs[i].reg;
unsigned int val = regs[i].def;
trace_regmap_hw_write_start(map, reg, 1);
@ -66,7 +66,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
reg >>= map->format.reg_downshift;
map->format.format_reg(u8, reg, map->reg_shift);
u8 += reg_bytes + pad_bytes;
@@ -2677,6 +2682,7 @@ static int _regmap_raw_read(struct regma
@@ -2679,6 +2684,7 @@ static int _regmap_raw_read(struct regma
return ret;
}

View file

@ -28,7 +28,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -1929,6 +1929,8 @@ static int _regmap_bus_reg_write(void *c
@@ -1931,6 +1931,8 @@ static int _regmap_bus_reg_write(void *c
{
struct regmap *map = context;
@ -37,7 +37,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
return map->bus->reg_write(map->bus_context, reg, val);
}
@@ -2703,6 +2705,8 @@ static int _regmap_bus_reg_read(void *co
@@ -2705,6 +2707,8 @@ static int _regmap_bus_reg_read(void *co
{
struct regmap *map = context;
@ -46,7 +46,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
return map->bus->reg_read(map->bus_context, reg, val);
}
@@ -3078,6 +3082,8 @@ static int _regmap_update_bits(struct re
@@ -3080,6 +3084,8 @@ static int _regmap_update_bits(struct re
*change = false;
if (regmap_volatile(map, reg) && map->reg_update_bits) {

View file

@ -25,7 +25,7 @@ Signed-off-by: Pavel Machek <pavel@ucw.cz>
--- a/drivers/leds/leds-turris-omnia.c
+++ b/drivers/leds/leds-turris-omnia.c
@@ -239,9 +239,6 @@ static int omnia_leds_probe(struct i2c_c
@@ -260,9 +260,6 @@ static int omnia_leds_probe(struct i2c_c
led += ret;
}
@ -35,7 +35,7 @@ Signed-off-by: Pavel Machek <pavel@ucw.cz>
return 0;
}
@@ -283,6 +280,7 @@ static struct i2c_driver omnia_leds_driv
@@ -304,6 +301,7 @@ static struct i2c_driver omnia_leds_driv
.driver = {
.name = "leds-turris-omnia",
.of_match_table = of_omnia_leds_match,

View file

@ -20,7 +20,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
--- a/drivers/leds/leds-turris-omnia.c
+++ b/drivers/leds/leds-turris-omnia.c
@@ -166,7 +166,7 @@ static ssize_t brightness_show(struct de
@@ -194,7 +194,7 @@ static ssize_t brightness_show(struct de
if (ret < 0)
return ret;

View file

@ -1,66 +0,0 @@
From 760b6b7925bf09491aafa4727eef74fc6bf738b0 Mon Sep 17 00:00:00 2001
From: Marek Behún <kabel@kernel.org>
Date: Wed, 2 Aug 2023 18:07:43 +0200
Subject: leds: turris-omnia: Drop unnecessary mutex locking
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Do not lock driver mutex in the global LED panel brightness sysfs
accessors brightness_show() and brightness_store().
The mutex locking is unnecessary here. The I2C transfers are guarded by
I2C core locking mechanism, and the LED commands itself do not interfere
with other commands.
Fixes: 089381b27abe ("leds: initial support for Turris Omnia LEDs")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230802160748.11208-2-kabel@kernel.org
Signed-off-by: Lee Jones <lee@kernel.org>
---
drivers/leds/leds-turris-omnia.c | 11 +----------
1 file changed, 1 insertion(+), 10 deletions(-)
(limited to 'drivers/leds/leds-turris-omnia.c')
--- a/drivers/leds/leds-turris-omnia.c
+++ b/drivers/leds/leds-turris-omnia.c
@@ -156,12 +156,9 @@ static ssize_t brightness_show(struct de
char *buf)
{
struct i2c_client *client = to_i2c_client(dev);
- struct omnia_leds *leds = i2c_get_clientdata(client);
int ret;
- mutex_lock(&leds->lock);
ret = i2c_smbus_read_byte_data(client, CMD_LED_GET_BRIGHTNESS);
- mutex_unlock(&leds->lock);
if (ret < 0)
return ret;
@@ -173,7 +170,6 @@ static ssize_t brightness_store(struct d
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
- struct omnia_leds *leds = i2c_get_clientdata(client);
unsigned long brightness;
int ret;
@@ -183,15 +179,10 @@ static ssize_t brightness_store(struct d
if (brightness > 100)
return -EINVAL;
- mutex_lock(&leds->lock);
ret = i2c_smbus_write_byte_data(client, CMD_LED_SET_BRIGHTNESS,
(u8)brightness);
- mutex_unlock(&leds->lock);
- if (ret < 0)
- return ret;
-
- return count;
+ return ret < 0 ? ret : count;
}
static DEVICE_ATTR_RW(brightness);

View file

@ -1,145 +0,0 @@
From 28350bc0ac77e17365ba87d3edb2db0a79c98fdd Mon Sep 17 00:00:00 2001
From: Marek Behún <kabel@kernel.org>
Date: Mon, 18 Sep 2023 18:11:01 +0200
Subject: leds: turris-omnia: Do not use SMBUS calls
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The leds-turris-omnia driver uses three function for I2C access:
- i2c_smbus_write_byte_data() and i2c_smbus_read_byte_data(), which
cause an emulated SMBUS transfer,
- i2c_master_send(), which causes an ordinary I2C transfer.
The Turris Omnia MCU LED controller is not semantically SMBUS, it
operates as a simple I2C bus. It does not implement any of the SMBUS
specific features, like PEC, or procedure calls, or anything. Moreover
the I2C controller driver also does not implement SMBUS, and so the
emulated SMBUS procedure from drivers/i2c/i2c-core-smbus.c is used for
the SMBUS calls, which gives an unnecessary overhead.
When I first wrote the driver, I was unaware of these facts, and I
simply used the first function that worked.
Drop the I2C SMBUS calls and instead use simple I2C transfers.
Fixes: 089381b27abe ("leds: initial support for Turris Omnia LEDs")
Signed-off-by: Marek Behún <kabel@kernel.org>
Link: https://lore.kernel.org/r/20230918161104.20860-2-kabel@kernel.org
Signed-off-by: Lee Jones <lee@kernel.org>
---
drivers/leds/leds-turris-omnia.c | 54 +++++++++++++++++++++++++++++++---------
1 file changed, 42 insertions(+), 12 deletions(-)
--- a/drivers/leds/leds-turris-omnia.c
+++ b/drivers/leds/leds-turris-omnia.c
@@ -2,7 +2,7 @@
/*
* CZ.NIC's Turris Omnia LEDs driver
*
- * 2020 by Marek Behún <kabel@kernel.org>
+ * 2020, 2023 by Marek Behún <kabel@kernel.org>
*/
#include <linux/i2c.h>
@@ -41,6 +41,37 @@ struct omnia_leds {
struct omnia_led leds[];
};
+static int omnia_cmd_write_u8(const struct i2c_client *client, u8 cmd, u8 val)
+{
+ u8 buf[2] = { cmd, val };
+
+ return i2c_master_send(client, buf, sizeof(buf));
+}
+
+static int omnia_cmd_read_u8(const struct i2c_client *client, u8 cmd)
+{
+ struct i2c_msg msgs[2];
+ u8 reply;
+ int ret;
+
+ msgs[0].addr = client->addr;
+ msgs[0].flags = 0;
+ msgs[0].len = 1;
+ msgs[0].buf = &cmd;
+ msgs[1].addr = client->addr;
+ msgs[1].flags = I2C_M_RD;
+ msgs[1].len = 1;
+ msgs[1].buf = &reply;
+
+ ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
+ if (likely(ret == ARRAY_SIZE(msgs)))
+ return reply;
+ else if (ret < 0)
+ return ret;
+ else
+ return -EIO;
+}
+
static int omnia_led_brightness_set_blocking(struct led_classdev *cdev,
enum led_brightness brightness)
{
@@ -64,7 +95,7 @@ static int omnia_led_brightness_set_bloc
if (buf[2] || buf[3] || buf[4])
state |= CMD_LED_STATE_ON;
- ret = i2c_smbus_write_byte_data(leds->client, CMD_LED_STATE, state);
+ ret = omnia_cmd_write_u8(leds->client, CMD_LED_STATE, state);
if (ret >= 0 && (state & CMD_LED_STATE_ON))
ret = i2c_master_send(leds->client, buf, 5);
@@ -114,9 +145,9 @@ static int omnia_led_register(struct i2c
cdev->brightness_set_blocking = omnia_led_brightness_set_blocking;
/* put the LED into software mode */
- ret = i2c_smbus_write_byte_data(client, CMD_LED_MODE,
- CMD_LED_MODE_LED(led->reg) |
- CMD_LED_MODE_USER);
+ ret = omnia_cmd_write_u8(client, CMD_LED_MODE,
+ CMD_LED_MODE_LED(led->reg) |
+ CMD_LED_MODE_USER);
if (ret < 0) {
dev_err(dev, "Cannot set LED %pOF to software mode: %i\n", np,
ret);
@@ -124,8 +155,8 @@ static int omnia_led_register(struct i2c
}
/* disable the LED */
- ret = i2c_smbus_write_byte_data(client, CMD_LED_STATE,
- CMD_LED_STATE_LED(led->reg));
+ ret = omnia_cmd_write_u8(client, CMD_LED_STATE,
+ CMD_LED_STATE_LED(led->reg));
if (ret < 0) {
dev_err(dev, "Cannot set LED %pOF brightness: %i\n", np, ret);
return ret;
@@ -158,7 +189,7 @@ static ssize_t brightness_show(struct de
struct i2c_client *client = to_i2c_client(dev);
int ret;
- ret = i2c_smbus_read_byte_data(client, CMD_LED_GET_BRIGHTNESS);
+ ret = omnia_cmd_read_u8(client, CMD_LED_GET_BRIGHTNESS);
if (ret < 0)
return ret;
@@ -179,8 +210,7 @@ static ssize_t brightness_store(struct d
if (brightness > 100)
return -EINVAL;
- ret = i2c_smbus_write_byte_data(client, CMD_LED_SET_BRIGHTNESS,
- (u8)brightness);
+ ret = omnia_cmd_write_u8(client, CMD_LED_SET_BRIGHTNESS, brightness);
return ret < 0 ? ret : count;
}
@@ -238,8 +268,8 @@ static int omnia_leds_remove(struct i2c_
u8 buf[5];
/* put all LEDs into default (HW triggered) mode */
- i2c_smbus_write_byte_data(client, CMD_LED_MODE,
- CMD_LED_MODE_LED(OMNIA_BOARD_LEDS));
+ omnia_cmd_write_u8(client, CMD_LED_MODE,
+ CMD_LED_MODE_LED(OMNIA_BOARD_LEDS));
/* set all LEDs color to [255, 255, 255] */
buf[0] = CMD_LED_COLOR;

View file

@ -0,0 +1,183 @@
From e1fbfa4a995d42e02e22b0dff2f8b4fdee1504b3 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 14 Nov 2023 15:08:42 +0100
Subject: [PATCH 2/3] net: phy: aquantia: move MMD_VEND define to header
Move MMD_VEND define to header to clean things up and in preparation for
firmware loading support that require some define placed in
aquantia_main.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/aquantia/aquantia.h | 69 +++++++++++++++++++++++
drivers/net/phy/aquantia/aquantia_hwmon.c | 14 -----
drivers/net/phy/aquantia/aquantia_main.c | 55 ------------------
3 files changed, 69 insertions(+), 69 deletions(-)
--- a/drivers/net/phy/aquantia/aquantia.h
+++ b/drivers/net/phy/aquantia/aquantia.h
@@ -9,6 +9,75 @@
#include <linux/device.h>
#include <linux/phy.h>
+/* Vendor specific 1, MDIO_MMD_VEND1 */
+#define VEND1_GLOBAL_FW_ID 0x0020
+#define VEND1_GLOBAL_FW_ID_MAJOR GENMASK(15, 8)
+#define VEND1_GLOBAL_FW_ID_MINOR GENMASK(7, 0)
+
+/* The following registers all have similar layouts; first the registers... */
+#define VEND1_GLOBAL_CFG_10M 0x0310
+#define VEND1_GLOBAL_CFG_100M 0x031b
+#define VEND1_GLOBAL_CFG_1G 0x031c
+#define VEND1_GLOBAL_CFG_2_5G 0x031d
+#define VEND1_GLOBAL_CFG_5G 0x031e
+#define VEND1_GLOBAL_CFG_10G 0x031f
+/* ...and now the fields */
+#define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7)
+#define VEND1_GLOBAL_CFG_RATE_ADAPT_NONE 0
+#define VEND1_GLOBAL_CFG_RATE_ADAPT_USX 1
+#define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2
+
+/* Vendor specific 1, MDIO_MMD_VEND2 */
+#define VEND1_THERMAL_PROV_HIGH_TEMP_FAIL 0xc421
+#define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422
+#define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423
+#define VEND1_THERMAL_PROV_LOW_TEMP_WARN 0xc424
+#define VEND1_THERMAL_STAT1 0xc820
+#define VEND1_THERMAL_STAT2 0xc821
+#define VEND1_THERMAL_STAT2_VALID BIT(0)
+#define VEND1_GENERAL_STAT1 0xc830
+#define VEND1_GENERAL_STAT1_HIGH_TEMP_FAIL BIT(14)
+#define VEND1_GENERAL_STAT1_LOW_TEMP_FAIL BIT(13)
+#define VEND1_GENERAL_STAT1_HIGH_TEMP_WARN BIT(12)
+#define VEND1_GENERAL_STAT1_LOW_TEMP_WARN BIT(11)
+
+#define VEND1_GLOBAL_GEN_STAT2 0xc831
+#define VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG BIT(15)
+
+#define VEND1_GLOBAL_RSVD_STAT1 0xc885
+#define VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID GENMASK(7, 4)
+#define VEND1_GLOBAL_RSVD_STAT1_PROV_ID GENMASK(3, 0)
+
+#define VEND1_GLOBAL_RSVD_STAT9 0xc88d
+#define VEND1_GLOBAL_RSVD_STAT9_MODE GENMASK(7, 0)
+#define VEND1_GLOBAL_RSVD_STAT9_1000BT2 0x23
+
+#define VEND1_GLOBAL_INT_STD_STATUS 0xfc00
+#define VEND1_GLOBAL_INT_VEND_STATUS 0xfc01
+
+#define VEND1_GLOBAL_INT_STD_MASK 0xff00
+#define VEND1_GLOBAL_INT_STD_MASK_PMA1 BIT(15)
+#define VEND1_GLOBAL_INT_STD_MASK_PMA2 BIT(14)
+#define VEND1_GLOBAL_INT_STD_MASK_PCS1 BIT(13)
+#define VEND1_GLOBAL_INT_STD_MASK_PCS2 BIT(12)
+#define VEND1_GLOBAL_INT_STD_MASK_PCS3 BIT(11)
+#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS1 BIT(10)
+#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS2 BIT(9)
+#define VEND1_GLOBAL_INT_STD_MASK_AN1 BIT(8)
+#define VEND1_GLOBAL_INT_STD_MASK_AN2 BIT(7)
+#define VEND1_GLOBAL_INT_STD_MASK_GBE BIT(6)
+#define VEND1_GLOBAL_INT_STD_MASK_ALL BIT(0)
+
+#define VEND1_GLOBAL_INT_VEND_MASK 0xff01
+#define VEND1_GLOBAL_INT_VEND_MASK_PMA BIT(15)
+#define VEND1_GLOBAL_INT_VEND_MASK_PCS BIT(14)
+#define VEND1_GLOBAL_INT_VEND_MASK_PHY_XS BIT(13)
+#define VEND1_GLOBAL_INT_VEND_MASK_AN BIT(12)
+#define VEND1_GLOBAL_INT_VEND_MASK_GBE BIT(11)
+#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL1 BIT(2)
+#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2 BIT(1)
+#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 BIT(0)
+
#if IS_REACHABLE(CONFIG_HWMON)
int aqr_hwmon_probe(struct phy_device *phydev);
#else
--- a/drivers/net/phy/aquantia/aquantia_hwmon.c
+++ b/drivers/net/phy/aquantia/aquantia_hwmon.c
@@ -13,20 +13,6 @@
#include "aquantia.h"
-/* Vendor specific 1, MDIO_MMD_VEND2 */
-#define VEND1_THERMAL_PROV_HIGH_TEMP_FAIL 0xc421
-#define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422
-#define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423
-#define VEND1_THERMAL_PROV_LOW_TEMP_WARN 0xc424
-#define VEND1_THERMAL_STAT1 0xc820
-#define VEND1_THERMAL_STAT2 0xc821
-#define VEND1_THERMAL_STAT2_VALID BIT(0)
-#define VEND1_GENERAL_STAT1 0xc830
-#define VEND1_GENERAL_STAT1_HIGH_TEMP_FAIL BIT(14)
-#define VEND1_GENERAL_STAT1_LOW_TEMP_FAIL BIT(13)
-#define VEND1_GENERAL_STAT1_HIGH_TEMP_WARN BIT(12)
-#define VEND1_GENERAL_STAT1_LOW_TEMP_WARN BIT(11)
-
#if IS_REACHABLE(CONFIG_HWMON)
static umode_t aqr_hwmon_is_visible(const void *data,
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -89,61 +89,6 @@
#define MDIO_C22EXT_STAT_SGMII_TX_FRAME_ALIGN_ERR 0xd31a
#define MDIO_C22EXT_STAT_SGMII_TX_RUNT_FRAMES 0xd31b
-/* Vendor specific 1, MDIO_MMD_VEND1 */
-#define VEND1_GLOBAL_FW_ID 0x0020
-#define VEND1_GLOBAL_FW_ID_MAJOR GENMASK(15, 8)
-#define VEND1_GLOBAL_FW_ID_MINOR GENMASK(7, 0)
-
-#define VEND1_GLOBAL_GEN_STAT2 0xc831
-#define VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG BIT(15)
-
-/* The following registers all have similar layouts; first the registers... */
-#define VEND1_GLOBAL_CFG_10M 0x0310
-#define VEND1_GLOBAL_CFG_100M 0x031b
-#define VEND1_GLOBAL_CFG_1G 0x031c
-#define VEND1_GLOBAL_CFG_2_5G 0x031d
-#define VEND1_GLOBAL_CFG_5G 0x031e
-#define VEND1_GLOBAL_CFG_10G 0x031f
-/* ...and now the fields */
-#define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7)
-#define VEND1_GLOBAL_CFG_RATE_ADAPT_NONE 0
-#define VEND1_GLOBAL_CFG_RATE_ADAPT_USX 1
-#define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2
-
-#define VEND1_GLOBAL_RSVD_STAT1 0xc885
-#define VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID GENMASK(7, 4)
-#define VEND1_GLOBAL_RSVD_STAT1_PROV_ID GENMASK(3, 0)
-
-#define VEND1_GLOBAL_RSVD_STAT9 0xc88d
-#define VEND1_GLOBAL_RSVD_STAT9_MODE GENMASK(7, 0)
-#define VEND1_GLOBAL_RSVD_STAT9_1000BT2 0x23
-
-#define VEND1_GLOBAL_INT_STD_STATUS 0xfc00
-#define VEND1_GLOBAL_INT_VEND_STATUS 0xfc01
-
-#define VEND1_GLOBAL_INT_STD_MASK 0xff00
-#define VEND1_GLOBAL_INT_STD_MASK_PMA1 BIT(15)
-#define VEND1_GLOBAL_INT_STD_MASK_PMA2 BIT(14)
-#define VEND1_GLOBAL_INT_STD_MASK_PCS1 BIT(13)
-#define VEND1_GLOBAL_INT_STD_MASK_PCS2 BIT(12)
-#define VEND1_GLOBAL_INT_STD_MASK_PCS3 BIT(11)
-#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS1 BIT(10)
-#define VEND1_GLOBAL_INT_STD_MASK_PHY_XS2 BIT(9)
-#define VEND1_GLOBAL_INT_STD_MASK_AN1 BIT(8)
-#define VEND1_GLOBAL_INT_STD_MASK_AN2 BIT(7)
-#define VEND1_GLOBAL_INT_STD_MASK_GBE BIT(6)
-#define VEND1_GLOBAL_INT_STD_MASK_ALL BIT(0)
-
-#define VEND1_GLOBAL_INT_VEND_MASK 0xff01
-#define VEND1_GLOBAL_INT_VEND_MASK_PMA BIT(15)
-#define VEND1_GLOBAL_INT_VEND_MASK_PCS BIT(14)
-#define VEND1_GLOBAL_INT_VEND_MASK_PHY_XS BIT(13)
-#define VEND1_GLOBAL_INT_VEND_MASK_AN BIT(12)
-#define VEND1_GLOBAL_INT_VEND_MASK_GBE BIT(11)
-#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL1 BIT(2)
-#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2 BIT(1)
-#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 BIT(0)
-
/* Sleep and timeout for checking if the Processor-Intensive
* MDIO operation is finished
*/

View file

@ -0,0 +1,504 @@
From e93984ebc1c82bd34f7a1b3391efaceee0a8ae96 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 14 Nov 2023 15:08:43 +0100
Subject: [PATCH 3/3] net: phy: aquantia: add firmware load support
Aquantia PHY-s require firmware to be loaded before they start operating.
It can be automatically loaded in case when there is a SPI-NOR connected
to Aquantia PHY-s or can be loaded from the host via MDIO.
This patch adds support for loading the firmware via MDIO as in most cases
there is no SPI-NOR being used to save on cost.
Firmware loading code itself is ported from mainline U-boot with cleanups.
The firmware has mixed values both in big and little endian.
PHY core itself is big-endian but it expects values to be in little-endian.
The firmware is little-endian but CRC-16 value for it is stored at the end
of firmware in big-endian.
It seems the PHY does the conversion internally from firmware that is
little-endian to the PHY that is big-endian on using the mailbox
but mailbox returns a big-endian CRC-16 to verify the written data
integrity.
Co-developed-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/aquantia/Kconfig | 1 +
drivers/net/phy/aquantia/Makefile | 2 +-
drivers/net/phy/aquantia/aquantia.h | 32 ++
drivers/net/phy/aquantia/aquantia_firmware.c | 370 +++++++++++++++++++
drivers/net/phy/aquantia/aquantia_main.c | 6 +
5 files changed, 410 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/phy/aquantia/aquantia_firmware.c
--- a/drivers/net/phy/aquantia/Kconfig
+++ b/drivers/net/phy/aquantia/Kconfig
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
config AQUANTIA_PHY
tristate "Aquantia PHYs"
+ select CRC_CCITT
help
Currently supports the Aquantia AQ1202, AQ2104, AQR105, AQR405
--- a/drivers/net/phy/aquantia/Makefile
+++ b/drivers/net/phy/aquantia/Makefile
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
-aquantia-objs += aquantia_main.o
+aquantia-objs += aquantia_main.o aquantia_firmware.o
ifdef CONFIG_HWMON
aquantia-objs += aquantia_hwmon.o
endif
--- a/drivers/net/phy/aquantia/aquantia.h
+++ b/drivers/net/phy/aquantia/aquantia.h
@@ -10,10 +10,35 @@
#include <linux/phy.h>
/* Vendor specific 1, MDIO_MMD_VEND1 */
+#define VEND1_GLOBAL_SC 0x0
+#define VEND1_GLOBAL_SC_SOFT_RESET BIT(15)
+#define VEND1_GLOBAL_SC_LOW_POWER BIT(11)
+
#define VEND1_GLOBAL_FW_ID 0x0020
#define VEND1_GLOBAL_FW_ID_MAJOR GENMASK(15, 8)
#define VEND1_GLOBAL_FW_ID_MINOR GENMASK(7, 0)
+#define VEND1_GLOBAL_MAILBOX_INTERFACE1 0x0200
+#define VEND1_GLOBAL_MAILBOX_INTERFACE1_EXECUTE BIT(15)
+#define VEND1_GLOBAL_MAILBOX_INTERFACE1_WRITE BIT(14)
+#define VEND1_GLOBAL_MAILBOX_INTERFACE1_CRC_RESET BIT(12)
+#define VEND1_GLOBAL_MAILBOX_INTERFACE1_BUSY BIT(8)
+
+#define VEND1_GLOBAL_MAILBOX_INTERFACE2 0x0201
+#define VEND1_GLOBAL_MAILBOX_INTERFACE3 0x0202
+#define VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR_MASK GENMASK(15, 0)
+#define VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR_MASK, (u16)((x) >> 16))
+#define VEND1_GLOBAL_MAILBOX_INTERFACE4 0x0203
+#define VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_MASK GENMASK(15, 2)
+#define VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_MASK, (u16)(x))
+
+#define VEND1_GLOBAL_MAILBOX_INTERFACE5 0x0204
+#define VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA_MASK GENMASK(15, 0)
+#define VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA_MASK, (u16)((x) >> 16))
+#define VEND1_GLOBAL_MAILBOX_INTERFACE6 0x0205
+#define VEND1_GLOBAL_MAILBOX_INTERFACE6_LSW_DATA_MASK GENMASK(15, 0)
+#define VEND1_GLOBAL_MAILBOX_INTERFACE6_LSW_DATA(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE6_LSW_DATA_MASK, (u16)(x))
+
/* The following registers all have similar layouts; first the registers... */
#define VEND1_GLOBAL_CFG_10M 0x0310
#define VEND1_GLOBAL_CFG_100M 0x031b
@@ -28,6 +53,11 @@
#define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2
/* Vendor specific 1, MDIO_MMD_VEND2 */
+#define VEND1_GLOBAL_CONTROL2 0xc001
+#define VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_RST BIT(15)
+#define VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_OVD BIT(6)
+#define VEND1_GLOBAL_CONTROL2_UP_RUN_STALL BIT(0)
+
#define VEND1_THERMAL_PROV_HIGH_TEMP_FAIL 0xc421
#define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422
#define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423
@@ -83,3 +113,5 @@ int aqr_hwmon_probe(struct phy_device *p
#else
static inline int aqr_hwmon_probe(struct phy_device *phydev) { return 0; }
#endif
+
+int aqr_firmware_load(struct phy_device *phydev);
--- /dev/null
+++ b/drivers/net/phy/aquantia/aquantia_firmware.c
@@ -0,0 +1,370 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/bitfield.h>
+#include <linux/of.h>
+#include <linux/firmware.h>
+#include <linux/crc-ccitt.h>
+#include <linux/nvmem-consumer.h>
+
+#include <asm/unaligned.h>
+
+#include "aquantia.h"
+
+#define UP_RESET_SLEEP 100
+
+/* addresses of memory segments in the phy */
+#define DRAM_BASE_ADDR 0x3FFE0000
+#define IRAM_BASE_ADDR 0x40000000
+
+/* firmware image format constants */
+#define VERSION_STRING_SIZE 0x40
+#define VERSION_STRING_OFFSET 0x0200
+/* primary offset is written at an offset from the start of the fw blob */
+#define PRIMARY_OFFSET_OFFSET 0x8
+/* primary offset needs to be then added to a base offset */
+#define PRIMARY_OFFSET_SHIFT 12
+#define PRIMARY_OFFSET(x) ((x) << PRIMARY_OFFSET_SHIFT)
+#define HEADER_OFFSET 0x300
+
+struct aqr_fw_header {
+ u32 padding;
+ u8 iram_offset[3];
+ u8 iram_size[3];
+ u8 dram_offset[3];
+ u8 dram_size[3];
+} __packed;
+
+enum aqr_fw_src {
+ AQR_FW_SRC_NVMEM = 0,
+ AQR_FW_SRC_FS,
+};
+
+static const char * const aqr_fw_src_string[] = {
+ [AQR_FW_SRC_NVMEM] = "NVMEM",
+ [AQR_FW_SRC_FS] = "FS",
+};
+
+/* AQR firmware doesn't have fixed offsets for iram and dram section
+ * but instead provide an header with the offset to use on reading
+ * and parsing the firmware.
+ *
+ * AQR firmware can't be trusted and each offset is validated to be
+ * not negative and be in the size of the firmware itself.
+ */
+static bool aqr_fw_validate_get(size_t size, size_t offset, size_t get_size)
+{
+ return offset + get_size <= size;
+}
+
+static int aqr_fw_get_be16(const u8 *data, size_t offset, size_t size, u16 *value)
+{
+ if (!aqr_fw_validate_get(size, offset, sizeof(u16)))
+ return -EINVAL;
+
+ *value = get_unaligned_be16(data + offset);
+
+ return 0;
+}
+
+static int aqr_fw_get_le16(const u8 *data, size_t offset, size_t size, u16 *value)
+{
+ if (!aqr_fw_validate_get(size, offset, sizeof(u16)))
+ return -EINVAL;
+
+ *value = get_unaligned_le16(data + offset);
+
+ return 0;
+}
+
+static int aqr_fw_get_le24(const u8 *data, size_t offset, size_t size, u32 *value)
+{
+ if (!aqr_fw_validate_get(size, offset, sizeof(u8) * 3))
+ return -EINVAL;
+
+ *value = get_unaligned_le24(data + offset);
+
+ return 0;
+}
+
+/* load data into the phy's memory */
+static int aqr_fw_load_memory(struct phy_device *phydev, u32 addr,
+ const u8 *data, size_t len)
+{
+ u16 crc = 0, up_crc;
+ size_t pos;
+
+ /* PHY expect addr in LE */
+ addr = (__force u32)cpu_to_le32(addr);
+
+ phy_write_mmd(phydev, MDIO_MMD_VEND1,
+ VEND1_GLOBAL_MAILBOX_INTERFACE1,
+ VEND1_GLOBAL_MAILBOX_INTERFACE1_CRC_RESET);
+ phy_write_mmd(phydev, MDIO_MMD_VEND1,
+ VEND1_GLOBAL_MAILBOX_INTERFACE3,
+ VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR(addr));
+ phy_write_mmd(phydev, MDIO_MMD_VEND1,
+ VEND1_GLOBAL_MAILBOX_INTERFACE4,
+ VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR(addr));
+
+ /* We assume and enforce the size to be word aligned.
+ * If a firmware that is not word aligned is found, please report upstream.
+ */
+ for (pos = 0; pos < len; pos += sizeof(u32)) {
+ u32 word;
+
+ /* FW data is always stored in little-endian */
+ word = get_unaligned((const u32 *)(data + pos));
+
+ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_MAILBOX_INTERFACE5,
+ VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA(word));
+ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_MAILBOX_INTERFACE6,
+ VEND1_GLOBAL_MAILBOX_INTERFACE6_LSW_DATA(word));
+
+ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_MAILBOX_INTERFACE1,
+ VEND1_GLOBAL_MAILBOX_INTERFACE1_EXECUTE |
+ VEND1_GLOBAL_MAILBOX_INTERFACE1_WRITE);
+
+ /* calculate CRC as we load data to the mailbox.
+ * We convert word to big-endian as PHY is BE and mailbox will
+ * return a BE CRC.
+ */
+ word = (__force u32)cpu_to_be32(word);
+ crc = crc_ccitt_false(crc, (u8 *)&word, sizeof(word));
+ }
+
+ up_crc = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_MAILBOX_INTERFACE2);
+ if (crc != up_crc) {
+ phydev_err(phydev, "CRC mismatch: calculated 0x%04x PHY 0x%04x\n",
+ crc, up_crc);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int aqr_fw_boot(struct phy_device *phydev, const u8 *data, size_t size,
+ enum aqr_fw_src fw_src)
+{
+ u16 calculated_crc, read_crc, read_primary_offset;
+ u32 iram_offset = 0, iram_size = 0;
+ u32 dram_offset = 0, dram_size = 0;
+ char version[VERSION_STRING_SIZE];
+ u32 primary_offset = 0;
+ int ret;
+
+ /* extract saved CRC at the end of the fw
+ * CRC is saved in big-endian as PHY is BE
+ */
+ ret = aqr_fw_get_be16(data, size - sizeof(u16), size, &read_crc);
+ if (ret) {
+ phydev_err(phydev, "bad firmware CRC in firmware\n");
+ return ret;
+ }
+ calculated_crc = crc_ccitt_false(0, data, size - sizeof(u16));
+ if (read_crc != calculated_crc) {
+ phydev_err(phydev, "bad firmware CRC: file 0x%04x calculated 0x%04x\n",
+ read_crc, calculated_crc);
+ return -EINVAL;
+ }
+
+ /* Get the primary offset to extract DRAM and IRAM sections. */
+ ret = aqr_fw_get_le16(data, PRIMARY_OFFSET_OFFSET, size, &read_primary_offset);
+ if (ret) {
+ phydev_err(phydev, "bad primary offset in firmware\n");
+ return ret;
+ }
+ primary_offset = PRIMARY_OFFSET(read_primary_offset);
+
+ /* Find the DRAM and IRAM sections within the firmware file.
+ * Make sure the fw_header is correctly in the firmware.
+ */
+ if (!aqr_fw_validate_get(size, primary_offset + HEADER_OFFSET,
+ sizeof(struct aqr_fw_header))) {
+ phydev_err(phydev, "bad fw_header in firmware\n");
+ return -EINVAL;
+ }
+
+ /* offset are in LE and values needs to be converted to cpu endian */
+ ret = aqr_fw_get_le24(data, primary_offset + HEADER_OFFSET +
+ offsetof(struct aqr_fw_header, iram_offset),
+ size, &iram_offset);
+ if (ret) {
+ phydev_err(phydev, "bad iram offset in firmware\n");
+ return ret;
+ }
+ ret = aqr_fw_get_le24(data, primary_offset + HEADER_OFFSET +
+ offsetof(struct aqr_fw_header, iram_size),
+ size, &iram_size);
+ if (ret) {
+ phydev_err(phydev, "invalid iram size in firmware\n");
+ return ret;
+ }
+ ret = aqr_fw_get_le24(data, primary_offset + HEADER_OFFSET +
+ offsetof(struct aqr_fw_header, dram_offset),
+ size, &dram_offset);
+ if (ret) {
+ phydev_err(phydev, "bad dram offset in firmware\n");
+ return ret;
+ }
+ ret = aqr_fw_get_le24(data, primary_offset + HEADER_OFFSET +
+ offsetof(struct aqr_fw_header, dram_size),
+ size, &dram_size);
+ if (ret) {
+ phydev_err(phydev, "invalid dram size in firmware\n");
+ return ret;
+ }
+
+ /* Increment the offset with the primary offset.
+ * Validate iram/dram offset and size.
+ */
+ iram_offset += primary_offset;
+ if (iram_size % sizeof(u32)) {
+ phydev_err(phydev, "iram size if not aligned to word size. Please report this upstream!\n");
+ return -EINVAL;
+ }
+ if (!aqr_fw_validate_get(size, iram_offset, iram_size)) {
+ phydev_err(phydev, "invalid iram offset for iram size\n");
+ return -EINVAL;
+ }
+
+ dram_offset += primary_offset;
+ if (dram_size % sizeof(u32)) {
+ phydev_err(phydev, "dram size if not aligned to word size. Please report this upstream!\n");
+ return -EINVAL;
+ }
+ if (!aqr_fw_validate_get(size, dram_offset, dram_size)) {
+ phydev_err(phydev, "invalid iram offset for iram size\n");
+ return -EINVAL;
+ }
+
+ phydev_dbg(phydev, "primary %d IRAM offset=%d size=%d DRAM offset=%d size=%d\n",
+ primary_offset, iram_offset, iram_size, dram_offset, dram_size);
+
+ if (!aqr_fw_validate_get(size, dram_offset + VERSION_STRING_OFFSET,
+ VERSION_STRING_SIZE)) {
+ phydev_err(phydev, "invalid version in firmware\n");
+ return -EINVAL;
+ }
+ strscpy(version, (char *)data + dram_offset + VERSION_STRING_OFFSET,
+ VERSION_STRING_SIZE);
+ if (version[0] == '\0') {
+ phydev_err(phydev, "invalid version in firmware\n");
+ return -EINVAL;
+ }
+ phydev_info(phydev, "loading firmware version '%s' from '%s'\n", version,
+ aqr_fw_src_string[fw_src]);
+
+ /* stall the microcprocessor */
+ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_CONTROL2,
+ VEND1_GLOBAL_CONTROL2_UP_RUN_STALL | VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_OVD);
+
+ phydev_dbg(phydev, "loading DRAM 0x%08x from offset=%d size=%d\n",
+ DRAM_BASE_ADDR, dram_offset, dram_size);
+ ret = aqr_fw_load_memory(phydev, DRAM_BASE_ADDR, data + dram_offset,
+ dram_size);
+ if (ret)
+ return ret;
+
+ phydev_dbg(phydev, "loading IRAM 0x%08x from offset=%d size=%d\n",
+ IRAM_BASE_ADDR, iram_offset, iram_size);
+ ret = aqr_fw_load_memory(phydev, IRAM_BASE_ADDR, data + iram_offset,
+ iram_size);
+ if (ret)
+ return ret;
+
+ /* make sure soft reset and low power mode are clear */
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_SC,
+ VEND1_GLOBAL_SC_SOFT_RESET | VEND1_GLOBAL_SC_LOW_POWER);
+
+ /* Release the microprocessor. UP_RESET must be held for 100 usec. */
+ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_CONTROL2,
+ VEND1_GLOBAL_CONTROL2_UP_RUN_STALL |
+ VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_OVD |
+ VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_RST);
+ usleep_range(UP_RESET_SLEEP, UP_RESET_SLEEP * 2);
+
+ phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_CONTROL2,
+ VEND1_GLOBAL_CONTROL2_UP_RUN_STALL_OVD);
+
+ return 0;
+}
+
+static int aqr_firmware_load_nvmem(struct phy_device *phydev)
+{
+ struct nvmem_cell *cell;
+ size_t size;
+ u8 *buf;
+ int ret;
+
+ cell = nvmem_cell_get(&phydev->mdio.dev, "firmware");
+ if (IS_ERR(cell))
+ return PTR_ERR(cell);
+
+ buf = nvmem_cell_read(cell, &size);
+ if (IS_ERR(buf)) {
+ ret = PTR_ERR(buf);
+ goto exit;
+ }
+
+ ret = aqr_fw_boot(phydev, buf, size, AQR_FW_SRC_NVMEM);
+ if (ret)
+ phydev_err(phydev, "firmware loading failed: %d\n", ret);
+
+ kfree(buf);
+exit:
+ nvmem_cell_put(cell);
+
+ return ret;
+}
+
+static int aqr_firmware_load_fs(struct phy_device *phydev)
+{
+ struct device *dev = &phydev->mdio.dev;
+ const struct firmware *fw;
+ const char *fw_name;
+ int ret;
+
+ ret = of_property_read_string(dev->of_node, "firmware-name",
+ &fw_name);
+ if (ret)
+ return ret;
+
+ ret = request_firmware(&fw, fw_name, dev);
+ if (ret) {
+ phydev_err(phydev, "failed to find FW file %s (%d)\n",
+ fw_name, ret);
+ return ret;
+ }
+
+ ret = aqr_fw_boot(phydev, fw->data, fw->size, AQR_FW_SRC_FS);
+ if (ret)
+ phydev_err(phydev, "firmware loading failed: %d\n", ret);
+
+ release_firmware(fw);
+
+ return ret;
+}
+
+int aqr_firmware_load(struct phy_device *phydev)
+{
+ int ret;
+
+ /* Check if the firmware is not already loaded by pooling
+ * the current version returned by the PHY. If 0 is returned,
+ * no firmware is loaded.
+ */
+ ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID);
+ if (ret > 0)
+ goto exit;
+
+ ret = aqr_firmware_load_nvmem(phydev);
+ if (!ret)
+ goto exit;
+
+ ret = aqr_firmware_load_fs(phydev);
+ if (ret)
+ return ret;
+
+exit:
+ return 0;
+}
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -656,11 +656,17 @@ static int aqr107_resume(struct phy_devi
static int aqr107_probe(struct phy_device *phydev)
{
+ int ret;
+
phydev->priv = devm_kzalloc(&phydev->mdio.dev,
sizeof(struct aqr107_priv), GFP_KERNEL);
if (!phydev->priv)
return -ENOMEM;
+ ret = aqr_firmware_load(phydev);
+ if (ret)
+ return ret;
+
return aqr_hwmon_probe(phydev);
}

View file

@ -31,7 +31,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
F: drivers/net/phy/motorcomm.c
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -260,7 +260,7 @@ config MOTORCOMM_PHY
@@ -257,7 +257,7 @@ config MOTORCOMM_PHY
tristate "Motorcomm PHYs"
help
Enables support for Motorcomm network PHYs.

View file

@ -22,7 +22,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -260,7 +260,7 @@ config MOTORCOMM_PHY
@@ -257,7 +257,7 @@ config MOTORCOMM_PHY
tristate "Motorcomm PHYs"
help
Enables support for Motorcomm network PHYs.

View file

@ -19,7 +19,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -260,7 +260,7 @@ config MOTORCOMM_PHY
@@ -257,7 +257,7 @@ config MOTORCOMM_PHY
tristate "Motorcomm PHYs"
help
Enables support for Motorcomm network PHYs.

View file

@ -18,7 +18,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
--- a/drivers/leds/leds-turris-omnia.c
+++ b/drivers/leds/leds-turris-omnia.c
@@ -166,7 +166,7 @@ static ssize_t brightness_show(struct de
@@ -194,7 +194,7 @@ static ssize_t brightness_show(struct de
if (ret < 0)
return ret;

View file

@ -1,64 +0,0 @@
From 8f3d612a5c949489b2860b74ff34c5914a9216dd Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Wed, 2 Aug 2023 18:07:43 +0200
Subject: [PATCH 2/6] leds: turris-omnia: Drop unnecessary mutex locking
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Do not lock driver mutex in the global LED panel brightness sysfs
accessors brightness_show() and brightness_store().
The mutex locking is unnecessary here. The I2C transfers are guarded by
I2C core locking mechanism, and the LED commands itself do not interfere
with other commands.
Fixes: 089381b27abe ("leds: initial support for Turris Omnia LEDs")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230802160748.11208-2-kabel@kernel.org
Signed-off-by: Lee Jones <lee@kernel.org>
---
drivers/leds/leds-turris-omnia.c | 11 +----------
1 file changed, 1 insertion(+), 10 deletions(-)
--- a/drivers/leds/leds-turris-omnia.c
+++ b/drivers/leds/leds-turris-omnia.c
@@ -156,12 +156,9 @@ static ssize_t brightness_show(struct de
char *buf)
{
struct i2c_client *client = to_i2c_client(dev);
- struct omnia_leds *leds = i2c_get_clientdata(client);
int ret;
- mutex_lock(&leds->lock);
ret = i2c_smbus_read_byte_data(client, CMD_LED_GET_BRIGHTNESS);
- mutex_unlock(&leds->lock);
if (ret < 0)
return ret;
@@ -173,7 +170,6 @@ static ssize_t brightness_store(struct d
const char *buf, size_t count)
{
struct i2c_client *client = to_i2c_client(dev);
- struct omnia_leds *leds = i2c_get_clientdata(client);
unsigned long brightness;
int ret;
@@ -183,15 +179,10 @@ static ssize_t brightness_store(struct d
if (brightness > 100)
return -EINVAL;
- mutex_lock(&leds->lock);
ret = i2c_smbus_write_byte_data(client, CMD_LED_SET_BRIGHTNESS,
(u8)brightness);
- mutex_unlock(&leds->lock);
- if (ret < 0)
- return ret;
-
- return count;
+ return ret < 0 ? ret : count;
}
static DEVICE_ATTR_RW(brightness);

View file

@ -1,145 +0,0 @@
From 1848bb28f0579582f653ae95355b544fd8a51d1e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Mon, 18 Sep 2023 18:11:01 +0200
Subject: [PATCH 3/6] leds: turris-omnia: Do not use SMBUS calls
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The leds-turris-omnia driver uses three function for I2C access:
- i2c_smbus_write_byte_data() and i2c_smbus_read_byte_data(), which
cause an emulated SMBUS transfer,
- i2c_master_send(), which causes an ordinary I2C transfer.
The Turris Omnia MCU LED controller is not semantically SMBUS, it
operates as a simple I2C bus. It does not implement any of the SMBUS
specific features, like PEC, or procedure calls, or anything. Moreover
the I2C controller driver also does not implement SMBUS, and so the
emulated SMBUS procedure from drivers/i2c/i2c-core-smbus.c is used for
the SMBUS calls, which gives an unnecessary overhead.
When I first wrote the driver, I was unaware of these facts, and I
simply used the first function that worked.
Drop the I2C SMBUS calls and instead use simple I2C transfers.
Fixes: 089381b27abe ("leds: initial support for Turris Omnia LEDs")
Signed-off-by: Marek Behún <kabel@kernel.org>
Link: https://lore.kernel.org/r/20230918161104.20860-2-kabel@kernel.org
Signed-off-by: Lee Jones <lee@kernel.org>
---
drivers/leds/leds-turris-omnia.c | 54 +++++++++++++++++++++++++-------
1 file changed, 42 insertions(+), 12 deletions(-)
--- a/drivers/leds/leds-turris-omnia.c
+++ b/drivers/leds/leds-turris-omnia.c
@@ -2,7 +2,7 @@
/*
* CZ.NIC's Turris Omnia LEDs driver
*
- * 2020 by Marek Behún <kabel@kernel.org>
+ * 2020, 2023 by Marek Behún <kabel@kernel.org>
*/
#include <linux/i2c.h>
@@ -41,6 +41,37 @@ struct omnia_leds {
struct omnia_led leds[];
};
+static int omnia_cmd_write_u8(const struct i2c_client *client, u8 cmd, u8 val)
+{
+ u8 buf[2] = { cmd, val };
+
+ return i2c_master_send(client, buf, sizeof(buf));
+}
+
+static int omnia_cmd_read_u8(const struct i2c_client *client, u8 cmd)
+{
+ struct i2c_msg msgs[2];
+ u8 reply;
+ int ret;
+
+ msgs[0].addr = client->addr;
+ msgs[0].flags = 0;
+ msgs[0].len = 1;
+ msgs[0].buf = &cmd;
+ msgs[1].addr = client->addr;
+ msgs[1].flags = I2C_M_RD;
+ msgs[1].len = 1;
+ msgs[1].buf = &reply;
+
+ ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
+ if (likely(ret == ARRAY_SIZE(msgs)))
+ return reply;
+ else if (ret < 0)
+ return ret;
+ else
+ return -EIO;
+}
+
static int omnia_led_brightness_set_blocking(struct led_classdev *cdev,
enum led_brightness brightness)
{
@@ -64,7 +95,7 @@ static int omnia_led_brightness_set_bloc
if (buf[2] || buf[3] || buf[4])
state |= CMD_LED_STATE_ON;
- ret = i2c_smbus_write_byte_data(leds->client, CMD_LED_STATE, state);
+ ret = omnia_cmd_write_u8(leds->client, CMD_LED_STATE, state);
if (ret >= 0 && (state & CMD_LED_STATE_ON))
ret = i2c_master_send(leds->client, buf, 5);
@@ -114,9 +145,9 @@ static int omnia_led_register(struct i2c
cdev->brightness_set_blocking = omnia_led_brightness_set_blocking;
/* put the LED into software mode */
- ret = i2c_smbus_write_byte_data(client, CMD_LED_MODE,
- CMD_LED_MODE_LED(led->reg) |
- CMD_LED_MODE_USER);
+ ret = omnia_cmd_write_u8(client, CMD_LED_MODE,
+ CMD_LED_MODE_LED(led->reg) |
+ CMD_LED_MODE_USER);
if (ret < 0) {
dev_err(dev, "Cannot set LED %pOF to software mode: %i\n", np,
ret);
@@ -124,8 +155,8 @@ static int omnia_led_register(struct i2c
}
/* disable the LED */
- ret = i2c_smbus_write_byte_data(client, CMD_LED_STATE,
- CMD_LED_STATE_LED(led->reg));
+ ret = omnia_cmd_write_u8(client, CMD_LED_STATE,
+ CMD_LED_STATE_LED(led->reg));
if (ret < 0) {
dev_err(dev, "Cannot set LED %pOF brightness: %i\n", np, ret);
return ret;
@@ -158,7 +189,7 @@ static ssize_t brightness_show(struct de
struct i2c_client *client = to_i2c_client(dev);
int ret;
- ret = i2c_smbus_read_byte_data(client, CMD_LED_GET_BRIGHTNESS);
+ ret = omnia_cmd_read_u8(client, CMD_LED_GET_BRIGHTNESS);
if (ret < 0)
return ret;
@@ -179,8 +210,7 @@ static ssize_t brightness_store(struct d
if (brightness > 100)
return -EINVAL;
- ret = i2c_smbus_write_byte_data(client, CMD_LED_SET_BRIGHTNESS,
- (u8)brightness);
+ ret = omnia_cmd_write_u8(client, CMD_LED_SET_BRIGHTNESS, brightness);
return ret < 0 ? ret : count;
}
@@ -238,8 +268,8 @@ static void omnia_leds_remove(struct i2c
u8 buf[5];
/* put all LEDs into default (HW triggered) mode */
- i2c_smbus_write_byte_data(client, CMD_LED_MODE,
- CMD_LED_MODE_LED(OMNIA_BOARD_LEDS));
+ omnia_cmd_write_u8(client, CMD_LED_MODE,
+ CMD_LED_MODE_LED(OMNIA_BOARD_LEDS));
/* set all LEDs color to [255, 255, 255] */
buf[0] = CMD_LED_COLOR;

View file

@ -1479,6 +1479,7 @@ CONFIG_DEVPORT=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
# CONFIG_DEVTMPFS is not set
# CONFIG_DEVTMPFS_MOUNT is not set
# CONFIG_DEVTMPFS_SAFE is not set
# CONFIG_DEV_DAX is not set
# CONFIG_DGAP is not set
# CONFIG_DGNC is not set

View file

@ -125,7 +125,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#include <linux/mutex.h>
#include <linux/err.h>
#include <linux/property.h>
@@ -3358,3 +3359,5 @@ static int __init regmap_initcall(void)
@@ -3360,3 +3361,5 @@ static int __init regmap_initcall(void)
return 0;
}
postcore_initcall(regmap_initcall);

View file

@ -72,7 +72,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+MODULE_LICENSE("GPL");
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -4216,6 +4216,7 @@ int wake_up_state(struct task_struct *p,
@@ -4220,6 +4220,7 @@ int wake_up_state(struct task_struct *p,
{
return try_to_wake_up(p, state, 0);
}

View file

@ -125,7 +125,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#include <linux/mutex.h>
#include <linux/err.h>
#include <linux/property.h>
@@ -3511,3 +3512,5 @@ static int __init regmap_initcall(void)
@@ -3513,3 +3514,5 @@ static int __init regmap_initcall(void)
return 0;
}
postcore_initcall(regmap_initcall);

View file

@ -7,8 +7,8 @@ PHYs AQR113C and AQR813.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
--- a/drivers/net/phy/aquantia_main.c
+++ b/drivers/net/phy/aquantia_main.c
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -23,6 +23,7 @@
#define PHY_ID_AQCS109 0x03a1b5c2
#define PHY_ID_AQR405 0x03a1b4b0
@ -17,7 +17,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
@@ -415,6 +416,49 @@ static int aqr107_read_rate(struct phy_d
@@ -360,6 +361,49 @@ static int aqr107_read_rate(struct phy_d
return 0;
}
@ -67,7 +67,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
static int aqr107_read_status(struct phy_device *phydev)
{
int val, ret;
@@ -554,7 +598,7 @@ static void aqr107_chip_info(struct phy_
@@ -499,7 +543,7 @@ static void aqr107_chip_info(struct phy_
build_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID, val);
prov_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_PROV_ID, val);
@ -76,7 +76,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
fw_major, fw_minor, build_id, prov_id);
}
@@ -809,7 +853,7 @@ static struct phy_driver aqr_driver[] =
@@ -760,7 +804,7 @@ static struct phy_driver aqr_driver[] =
.config_aneg = aqr_config_aneg,
.config_intr = aqr_config_intr,
.handle_interrupt = aqr_handle_interrupt,
@ -85,7 +85,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
.get_tunable = aqr107_get_tunable,
.set_tunable = aqr107_set_tunable,
.suspend = aqr107_suspend,
@@ -819,6 +863,24 @@ static struct phy_driver aqr_driver[] =
@@ -770,6 +814,24 @@ static struct phy_driver aqr_driver[] =
.get_stats = aqr107_get_stats,
.link_change_notify = aqr107_link_change_notify,
},
@ -110,7 +110,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
};
module_phy_driver(aqr_driver);
@@ -832,6 +894,7 @@ static struct mdio_device_id __maybe_unu
@@ -783,6 +845,7 @@ static struct mdio_device_id __maybe_unu
{ PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },

View file

@ -10,11 +10,11 @@ different firmware on the PHY.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
---
drivers/net/phy/aquantia_main.c | 88 +++++++++++++++++++++++++++++++++++++++++
drivers/net/phy/aquantia/aquantia_main.c | 88 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
--- a/drivers/net/phy/aquantia_main.c
+++ b/drivers/net/phy/aquantia_main.c
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -24,6 +24,8 @@
#define PHY_ID_AQR405 0x03a1b4b0
#define PHY_ID_AQR113C 0x31c31c12
@ -24,7 +24,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
@@ -151,6 +153,29 @@
@@ -96,6 +98,29 @@
#define AQR107_OP_IN_PROG_SLEEP 1000
#define AQR107_OP_IN_PROG_TIMEOUT 100000
@ -54,7 +54,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
struct aqr107_hw_stat {
const char *name;
int reg;
@@ -282,6 +307,51 @@ static int aqr_config_aneg(struct phy_de
@@ -227,6 +252,51 @@ static int aqr_config_aneg(struct phy_de
return genphy_c45_check_and_restart_aneg(phydev, changed);
}
@ -106,7 +106,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
static int aqr_config_intr(struct phy_device *phydev)
{
bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED;
@@ -881,6 +951,30 @@ static struct phy_driver aqr_driver[] =
@@ -832,6 +902,30 @@ static struct phy_driver aqr_driver[] =
.get_stats = aqr107_get_stats,
.link_change_notify = aqr107_link_change_notify,
},
@ -137,7 +137,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
};
module_phy_driver(aqr_driver);
@@ -895,6 +989,8 @@ static struct mdio_device_id __maybe_unu
@@ -846,6 +940,8 @@ static struct mdio_device_id __maybe_unu
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },

View file

@ -9,12 +9,12 @@ these protocols leads to link issues on system side.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
---
drivers/net/phy/aquantia_main.c | 8 +++++++-
drivers/net/phy/aquantia/aquantia_main.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/net/phy/aquantia_main.c
+++ b/drivers/net/phy/aquantia_main.c
@@ -340,10 +340,16 @@ static int aqr_config_aneg_set_prot(stru
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -285,10 +285,16 @@ static int aqr_config_aneg_set_prot(stru
phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
aquantia_syscfg[if_type].start_rate);

View file

@ -5,11 +5,11 @@ Subject: [PATCH] PONRTSYS-8842: aquantia: Add AQR113 driver support
Add a new entry for AQR113 PHY_ID
---
drivers/net/phy/aquantia_main.c | 10 ++++++++++
drivers/net/phy/aquantia/aquantia_main.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/drivers/net/phy/aquantia_main.c
+++ b/drivers/net/phy/aquantia_main.c
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -26,6 +26,7 @@
#define PHY_ID_AQR813 0x31c31cb2
#define PHY_ID_AQR112 0x03a1b662
@ -18,7 +18,7 @@ Add a new entry for AQR113 PHY_ID
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
@@ -981,6 +982,14 @@ static struct phy_driver aqr_driver[] =
@@ -932,6 +933,14 @@ static struct phy_driver aqr_driver[] =
.get_strings = aqr107_get_strings,
.get_stats = aqr107_get_stats,
},
@ -33,7 +33,7 @@ Add a new entry for AQR113 PHY_ID
};
module_phy_driver(aqr_driver);
@@ -997,6 +1006,7 @@ static struct mdio_device_id __maybe_unu
@@ -948,6 +957,7 @@ static struct mdio_device_id __maybe_unu
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },

View file

@ -7,11 +7,11 @@ As advised by Ian Chang this PHY is used in Puzzle devices.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/phy/aquantia_main.c | 10 ++++++++++
drivers/net/phy/aquantia/aquantia_main.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/drivers/net/phy/aquantia_main.c
+++ b/drivers/net/phy/aquantia_main.c
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -27,6 +27,8 @@
#define PHY_ID_AQR112 0x03a1b662
#define PHY_ID_AQR412 0x03a1b712
@ -21,7 +21,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
@@ -990,6 +992,30 @@ static struct phy_driver aqr_driver[] =
@@ -941,6 +943,30 @@ static struct phy_driver aqr_driver[] =
.handle_interrupt = aqr_handle_interrupt,
.read_status = aqr107_read_status,
},
@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
};
module_phy_driver(aqr_driver);
@@ -1007,6 +1033,8 @@ static struct mdio_device_id __maybe_unu
@@ -958,6 +984,8 @@ static struct mdio_device_id __maybe_unu
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },

View file

@ -10,8 +10,8 @@ This is a 5GbE chip but it reports support for 10G. Implement config_init()
to set max speed to 5G.
Signed-off-by: Thomas Kupper <thomas.kupper@gmail.com>
--- a/drivers/net/phy/aquantia_main.c
+++ b/drivers/net/phy/aquantia_main.c
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -24,6 +24,8 @@
#define PHY_ID_AQR405 0x03a1b4b0
#define PHY_ID_AQR113C 0x31c31c12
@ -21,7 +21,7 @@ Signed-off-by: Thomas Kupper <thomas.kupper@gmail.com>
#define PHY_ID_AQR112 0x03a1b662
#define PHY_ID_AQR412 0x03a1b712
#define PHY_ID_AQR113 0x31c31c40
@@ -729,6 +731,34 @@ static int aqcs109_config_init(struct ph
@@ -674,6 +676,34 @@ static int aqcs109_config_init(struct ph
return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
}
@ -56,7 +56,7 @@ Signed-off-by: Thomas Kupper <thomas.kupper@gmail.com>
static void aqr107_link_change_notify(struct phy_device *phydev)
{
u8 fw_major, fw_minor;
@@ -961,6 +991,42 @@ static struct phy_driver aqr_driver[] =
@@ -912,6 +942,42 @@ static struct phy_driver aqr_driver[] =
.link_change_notify = aqr107_link_change_notify,
},
{
@ -99,7 +99,7 @@ Signed-off-by: Thomas Kupper <thomas.kupper@gmail.com>
PHY_ID_MATCH_MODEL(PHY_ID_AQR112),
.name = "Aquantia AQR112",
.probe = aqr107_probe,
@@ -1030,6 +1096,8 @@ static struct mdio_device_id __maybe_unu
@@ -981,6 +1047,8 @@ static struct mdio_device_id __maybe_unu
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },

View file

@ -73,7 +73,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+MODULE_LICENSE("GPL");
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -4363,6 +4363,7 @@ int wake_up_state(struct task_struct *p,
@@ -4367,6 +4367,7 @@ int wake_up_state(struct task_struct *p,
{
return try_to_wake_up(p, state, 0);
}

View file

@ -20,14 +20,12 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
--- a/net/core/of_net.c
+++ b/net/core/of_net.c
@@ -119,28 +119,63 @@ static int of_get_mac_addr_nvmem(struct
@@ -119,10 +119,19 @@ static int of_get_mac_addr_nvmem(struct
* this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
* but is all zeros.
*
+ * DT can tell the system to increment the mac-address after is extracted by
+ * using:
+ * - mac-address-increment-byte to decide what byte to increase
+ * (if not defined is increased the last byte)
+ * - mac-address-increment to decide how much to increase. The value WILL
+ * overflow to other bytes if the increment is over 255 or the total
+ * increment will exceed 255 of the current byte.
@ -38,19 +36,11 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
*/
int of_get_mac_address(struct device_node *np, u8 *addr)
{
+ u32 inc_idx, mac_inc, mac_val;
+ u32 mac_inc, mac_val;
int ret;
+ /* Check first if the increment byte is present and valid.
+ * If not set assume to increment the last byte if found.
+ */
+ if (of_property_read_u32(np, "mac-address-increment-byte", &inc_idx))
+ inc_idx = 5;
+ if (inc_idx < 3 || inc_idx > 5)
+ return -EINVAL;
+
if (!np)
return -ENODEV;
@@ -130,17 +139,33 @@ int of_get_mac_address(struct device_nod
ret = of_get_mac_addr(np, "mac-address", addr);
if (!ret)
@ -75,7 +65,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+ if (!of_property_read_u32(np, "mac-address-increment", &mac_inc)) {
+ /* Convert to a contiguous value */
+ mac_val = (addr[3] << 16) + (addr[4] << 8) + addr[5];
+ mac_val += mac_inc << 8 * (5-inc_idx);
+ mac_val += mac_inc;
+
+ /* Apply the incremented value handling overflow case */
+ addr[3] = (mac_val >> 16) & 0xff;

View file

@ -45,7 +45,7 @@ property. This way, the MAC address can be accessed using procfs.
/**
* of_get_mac_address()
* @np: Caller's Device Node
@@ -175,6 +196,7 @@ found:
@@ -165,6 +186,7 @@ found:
addr[5] = (mac_val >> 0) & 0xff;
}

View file

@ -16,16 +16,15 @@ Signed-off-by: Will Moss <willormos@gmail.com>
--- a/net/core/of_net.c
+++ b/net/core/of_net.c
@@ -194,6 +194,12 @@ found:
@@ -184,6 +184,11 @@ found:
addr[3] = (mac_val >> 16) & 0xff;
addr[4] = (mac_val >> 8) & 0xff;
addr[5] = (mac_val >> 0) & 0xff;
+
+ /* Remove mac-address-increment and mac-address-increment-byte
+ * DT property to make sure MAC address would not get incremented
+ * more if this function is stared again. */
+ /* Remove mac-address-increment DT property to make sure MAC
+ * address would not get incremented more if this function is
+ * stared again. */
+ of_remove_property(np, of_find_property(np, "mac-address-increment", NULL));
+ of_remove_property(np, of_find_property(np, "mac-address-increment-byte", NULL));
}
of_add_mac_address(np, addr);

View file

@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -7707,7 +7707,7 @@ static int nft_register_flowtable_net_ho
@@ -7703,7 +7703,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev,
FLOW_BLOCK_BIND);

View file

@ -20,14 +20,12 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
--- a/net/core/of_net.c
+++ b/net/core/of_net.c
@@ -119,28 +119,63 @@ static int of_get_mac_addr_nvmem(struct
@@ -119,10 +119,19 @@ static int of_get_mac_addr_nvmem(struct
* this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
* but is all zeros.
*
+ * DT can tell the system to increment the mac-address after is extracted by
+ * using:
+ * - mac-address-increment-byte to decide what byte to increase
+ * (if not defined is increased the last byte)
+ * - mac-address-increment to decide how much to increase. The value WILL
+ * overflow to other bytes if the increment is over 255 or the total
+ * increment will exceed 255 of the current byte.
@ -38,19 +36,11 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
*/
int of_get_mac_address(struct device_node *np, u8 *addr)
{
+ u32 inc_idx, mac_inc, mac_val;
+ u32 mac_inc, mac_val;
int ret;
+ /* Check first if the increment byte is present and valid.
+ * If not set assume to increment the last byte if found.
+ */
+ if (of_property_read_u32(np, "mac-address-increment-byte", &inc_idx))
+ inc_idx = 5;
+ if (inc_idx < 3 || inc_idx > 5)
+ return -EINVAL;
+
if (!np)
return -ENODEV;
@@ -130,17 +139,33 @@ int of_get_mac_address(struct device_nod
ret = of_get_mac_addr(np, "mac-address", addr);
if (!ret)
@ -75,7 +65,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+ if (!of_property_read_u32(np, "mac-address-increment", &mac_inc)) {
+ /* Convert to a contiguous value */
+ mac_val = (addr[3] << 16) + (addr[4] << 8) + addr[5];
+ mac_val += mac_inc << 8 * (5-inc_idx);
+ mac_val += mac_inc;
+
+ /* Apply the incremented value handling overflow case */
+ addr[3] = (mac_val >> 16) & 0xff;

View file

@ -45,7 +45,7 @@ property. This way, the MAC address can be accessed using procfs.
/**
* of_get_mac_address()
* @np: Caller's Device Node
@@ -175,6 +196,7 @@ found:
@@ -165,6 +186,7 @@ found:
addr[5] = (mac_val >> 0) & 0xff;
}

View file

@ -16,16 +16,15 @@ Signed-off-by: Will Moss <willormos@gmail.com>
--- a/net/core/of_net.c
+++ b/net/core/of_net.c
@@ -194,6 +194,12 @@ found:
@@ -184,6 +184,11 @@ found:
addr[3] = (mac_val >> 16) & 0xff;
addr[4] = (mac_val >> 8) & 0xff;
addr[5] = (mac_val >> 0) & 0xff;
+
+ /* Remove mac-address-increment and mac-address-increment-byte
+ * DT property to make sure MAC address would not get incremented
+ * more if this function is stared again. */
+ /* Remove mac-address-increment DT property to make sure MAC
+ * address would not get incremented more if this function is
+ * stared again. */
+ of_remove_property(np, of_find_property(np, "mac-address-increment", NULL));
+ of_remove_property(np, of_find_property(np, "mac-address-increment-byte", NULL));
}
of_add_mac_address(np, addr);

View file

@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -7882,7 +7882,7 @@ static int nft_register_flowtable_net_ho
@@ -7878,7 +7878,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev,
FLOW_BLOCK_BIND);

View file

@ -136,7 +136,7 @@ Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
#include <net/dst.h>
#include <net/sock.h>
#include <net/checksum.h>
@@ -4515,6 +4519,9 @@ static const u8 skb_ext_type_len[] = {
@@ -4516,6 +4520,9 @@ static const u8 skb_ext_type_len[] = {
#if IS_ENABLED(CONFIG_MCTP_FLOWS)
[SKB_EXT_MCTP] = SKB_EXT_CHUNKSIZEOF(struct mctp_flow),
#endif
@ -146,7 +146,7 @@ Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
};
static __always_inline unsigned int skb_ext_total_length(void)
@@ -4535,6 +4542,9 @@ static __always_inline unsigned int skb_
@@ -4536,6 +4543,9 @@ static __always_inline unsigned int skb_
#if IS_ENABLED(CONFIG_MCTP_FLOWS)
skb_ext_type_len[SKB_EXT_MCTP] +
#endif

View file

@ -25,7 +25,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -369,6 +369,13 @@ config AT803X_PHY
@@ -366,6 +366,13 @@ config AT803X_PHY
Currently supports the AR8030, AR8031, AR8033, AR8035 and internal
QCA8337(Internal qca8k PHY) model
@ -41,7 +41,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
help
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -94,6 +94,7 @@ obj-$(CONFIG_MOTORCOMM_PHY) += motorcomm
@@ -90,6 +90,7 @@ obj-$(CONFIG_MOTORCOMM_PHY) += motorcomm
obj-$(CONFIG_NATIONAL_PHY) += national.o
obj-$(CONFIG_NXP_C45_TJA11XX_PHY) += nxp-c45-tja11xx.o
obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o

View file

@ -319,22 +319,47 @@
label = "PRODUCTDATA";
reg = <0x02b0000 0x0030000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_factory_6: macaddr@6 {
reg = <0x6 0x6>;
};
macaddr_PRODUCTDATA_c: macaddr@c {
reg = <0xc 0x6>;
};
macaddr_PRODUCTDATA_12: macaddr@12 {
reg = <0x12 0x6>;
};
};
};
partition@2e0000 {
label = "ART";
reg = <0x02e0000 0x0040000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
precal_ART_1000: precal@1000 {
reg = <0x1000 0x2f20>;
};
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
precal_ART_5000: precal@5000 {
reg = <0x5000 0x2f20>;
precal_ART_1000: precal@1000 {
reg = <0x1000 0x2f20>;
};
precal_ART_5000: precal@5000 {
reg = <0x5000 0x2f20>;
};
};
};
@ -691,28 +716,6 @@
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_factory_6: macaddr@6 {
reg = <0x6 0x6>;
};
macaddr_PRODUCTDATA_c: macaddr@c {
reg = <0xc 0x6>;
};
macaddr_PRODUCTDATA_12: macaddr@12 {
reg = <0x12 0x6>;
};
};
&hs_phy_0 {
status = "okay";
};

View file

@ -162,16 +162,19 @@
label = "radio";
reg = <0x1b0000 0x40000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
precal_radio_1000: precal@1000 {
reg = <0x1000 0x2f20>;
};
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
precal_radio_5000: precal@5000 {
reg = <0x5000 0x2f20>;
precal_radio_1000: precal@1000 {
reg = <0x1000 0x2f20>;
};
precal_radio_5000: precal@5000 {
reg = <0x5000 0x2f20>;
};
};
};
@ -189,6 +192,18 @@
label = "default-mac";
reg = <0x1ef0000 0x00200>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_defaultmac_8: macaddr@8 {
compatible = "mac-base";
reg = <0x8 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@1ef0200 {
@ -304,9 +319,8 @@
compatible = "pci168c,0040";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_defaultmac_8>, <&precal_radio_1000>;
nvmem-cells = <&macaddr_defaultmac_8 (-1)>, <&precal_radio_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
mac-address-increment = <(-1)>;
};
};
};
@ -325,7 +339,7 @@
compatible = "pci168c,0040";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_defaultmac_8>, <&precal_radio_5000>;
nvmem-cells = <&macaddr_defaultmac_8 0>, <&precal_radio_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};
@ -445,9 +459,8 @@
pinctrl-0 = <&rgmii2_pins>;
pinctrl-names = "default";
nvmem-cells = <&macaddr_defaultmac_8>;
nvmem-cells = <&macaddr_defaultmac_8 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
fixed-link {
speed = <1000>;
@ -460,7 +473,7 @@
phy-mode = "sgmii";
qcom,id = <2>;
nvmem-cells = <&macaddr_defaultmac_8>;
nvmem-cells = <&macaddr_defaultmac_8 0>;
nvmem-cell-names = "mac-address";
fixed-link {
@ -472,13 +485,3 @@
&adm_dma {
status = "okay";
};
&defaultmac {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_defaultmac_8: macaddr@8 {
reg = <0x8 0x6>;
};
};

View file

@ -209,9 +209,8 @@
compatible = "pci168c,0040";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
mac-address-increment = <(1)>;
};
};
};
@ -233,9 +232,8 @@
compatible = "pci168c,0040";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
mac-address-increment = <(2)>;
};
};
};
@ -288,24 +286,29 @@
label = "art";
reg = <0x1200000 0x0140000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_6: macaddr@6 {
reg = <0x6 0x6>;
};
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
precal_art_1000: precal@1000 {
reg = <0x1000 0x2f20>;
};
macaddr_art_6: macaddr@6 {
compatible = "mac-base";
reg = <0x6 0x6>;
#nvmem-cell-cells = <1>;
};
precal_art_5000: precal@5000 {
reg = <0x5000 0x2f20>;
precal_art_1000: precal@1000 {
reg = <0x1000 0x2f20>;
};
precal_art_5000: precal@5000 {
reg = <0x5000 0x2f20>;
};
};
};
@ -448,7 +451,7 @@
pinctrl-0 = <&rgmii2_pins>;
pinctrl-names = "default";
nvmem-cells = <&macaddr_art_6>;
nvmem-cells = <&macaddr_art_6 0>;
nvmem-cell-names = "mac-address";
fixed-link {

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