Merge branch 'openwrt:master' into master

This commit is contained in:
Hayzam Sherif 2023-12-30 19:08:21 +05:30 committed by GitHub
commit 18f3de3199
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
36 changed files with 1428 additions and 550 deletions

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@ -1,2 +1,2 @@
LINUX_VERSION-5.15 = .144
LINUX_KERNEL_HASH-5.15.144 = f053afafafce771acbf478afdd16e9aa85b0a0e328205c4f53276062300a5b3b
LINUX_VERSION-5.15 = .145
LINUX_KERNEL_HASH-5.15.145 = b2a49d87605f3a9491581150315e22337c1afb599efc1e2737481be3a2d6d620

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@ -270,11 +270,6 @@ default_postinst() {
add_group_and_user "${pkgname}"
if [ -f "$root/usr/lib/opkg/info/${pkgname}.postinst-pkg" ]; then
( . "$root/usr/lib/opkg/info/${pkgname}.postinst-pkg" )
ret=$?
fi
if [ -d "$root/rootfs-overlay" ]; then
cp -R $root/rootfs-overlay/. $root/
rm -fR $root/rootfs-overlay/
@ -300,6 +295,11 @@ default_postinst() {
rm -f /tmp/luci-indexcache
fi
if [ -f "$root/usr/lib/opkg/info/${pkgname}.postinst-pkg" ]; then
( . "$root/usr/lib/opkg/info/${pkgname}.postinst-pkg" )
ret=$?
fi
local shell="$(command -v bash)"
for i in $(grep -s "^/etc/init.d/" "$root$filelist"); do
if [ -n "$root" ]; then

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@ -56,7 +56,8 @@ cmcc,rax3000m)
;;
cetron,ct3003|\
netgear,wax220|\
zbtlink,zbt-z8102ax)
zbtlink,zbt-z8102ax|\
zbtlink,zbt-z8103ax)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
;;
h3c,magic-nx30-pro|\
@ -82,7 +83,8 @@ glinet,gl-mt6000)
glinet,gl-mt3000)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x20000"
;;
mercusys,mr90x-v1)
mercusys,mr90x-v1|\
routerich,ax3000)
local envdev=/dev/mtd$(find_mtd_index "u-boot-env")
ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1"
;;

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@ -0,0 +1,64 @@
From ee0db868ee4d88493dfdc82f59e3b4e449ddddd5 Mon Sep 17 00:00:00 2001
From: Oldřich Jedlička <oldium.pro@gmail.com>
Date: Sat, 4 Nov 2023 15:13:33 +0100
Subject: wifi: mac80211: do not pass AP_VLAN vif pointer to drivers during
flush
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
[ Upstream commit 3e3a2b645c043f7e3e488d5011478cefb69bbe8b ]
This fixes WARN_ONs when using AP_VLANs after station removal. The flush
call passed AP_VLAN vif to driver, but because these vifs are virtual and
not registered with drivers, we need to translate to the correct AP vif
first.
Closes: https://github.com/openwrt/openwrt/issues/12420
Fixes: 0b75a1b1e42e ("wifi: mac80211: flush queues on STA removal")
Fixes: d00800a289c9 ("wifi: mac80211: add flush_sta method")
Tested-by: Konstantin Demin <rockdrilla@gmail.com>
Tested-by: Koen Vandeputte <koen.vandeputte@citymesh.com>
Signed-off-by: Oldřich Jedlička <oldium.pro@gmail.com>
Link: https://lore.kernel.org/r/20231104141333.3710-1-oldium.pro@gmail.com
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
net/mac80211/driver-ops.h | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
--- a/net/mac80211/driver-ops.h
+++ b/net/mac80211/driver-ops.h
@@ -23,7 +23,7 @@
static inline struct ieee80211_sub_if_data *
get_bss_sdata(struct ieee80211_sub_if_data *sdata)
{
- if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
+ if (sdata && sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
sdata = container_of(sdata->bss, struct ieee80211_sub_if_data,
u.ap);
@@ -638,10 +638,13 @@ static inline void drv_flush(struct ieee
struct ieee80211_sub_if_data *sdata,
u32 queues, bool drop)
{
- struct ieee80211_vif *vif = sdata ? &sdata->vif : NULL;
+ struct ieee80211_vif *vif;
might_sleep();
+ sdata = get_bss_sdata(sdata);
+ vif = sdata ? &sdata->vif : NULL;
+
if (sdata && !check_sdata_in_driver(sdata))
return;
@@ -657,6 +660,8 @@ static inline void drv_flush_sta(struct
{
might_sleep();
+ sdata = get_bss_sdata(sdata);
+
if (sdata && !check_sdata_in_driver(sdata))
return;

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@ -155,6 +155,12 @@ dropbear_instance()
PIDCOUNT="$(( ${PIDCOUNT} + 1))"
local pid_file="/var/run/${NAME}.${PIDCOUNT}.pid"
# Increase default receive window size to increase
# throughput on high latency links
if [ "${RecvWindowSize}" -eq "0" ]; then
RecvWindowSize="262144"
fi
procd_open_instance
procd_set_param command "$PROG" -F -P "$pid_file"
[ "${PasswordAuth}" -eq 0 ] && procd_append_param command -s

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@ -0,0 +1,54 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=usbgadget
PKG_RELEASE:=1
PKG_LICENSE:=BSD-2-Clause
PKG_MAINTAINER:=Chuanhong Guo <gch981213@gmail.com>
include $(INCLUDE_DIR)/package.mk
define Package/$(PKG_NAME)
SECTION:=utils
CATEGORY:=Utilities
DEPENDS:=@USB_GADGET_SUPPORT +kmod-usb-gadget +kmod-usb-lib-composite
TITLE:=init script to create USB gadgets
endef
define Build/Compile
endef
define Package/$(PKG_NAME)/install
$(INSTALL_DIR) $(1)/etc/config $(1)/etc/init.d
$(INSTALL_CONF) ./files/usbgadget.conf $(1)/etc/config/usbgadget
$(INSTALL_BIN) ./files/usbgadget.init $(1)/etc/init.d/usbgadget
endef
$(eval $(call BuildPackage,$(PKG_NAME)))
# 1: short name
# 2: description
# 3: dependencies on other packages
define GadgetPreset
define Package/$(PKG_NAME)-$(1)
SECTION:=utils
CATEGORY:=Utilities
TITLE+= $(2) gadget preset
DEPENDS+= $(3)
endef
define Package/$(PKG_NAME)-$(1)/description
This package contains the USB gadget preset for $(3).
endef
define Package/$(PKG_NAME)-$(1)/install
$(INSTALL_DIR) $$(1)/usr/share/usbgadget
$(INSTALL_CONF) ./files/presets/$(1) $$(1)/usr/share/usbgadget
endef
$$(eval $$(call BuildPackage,$(PKG_NAME)-$(1)))
endef
$(eval $(call GadgetPreset,ncm,CDC-NCM,+kmod-usb-gadget-ncm))
$(eval $(call GadgetPreset,acm,CDC-ACM,+kmod-usb-gadget-serial))

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@ -0,0 +1,13 @@
config gadget 'g1'
option idVendor '0x0525'
option idProduct '0xa4a7'
option bDeviceClass '2'
option product 'Gadget Serial v2.4'
config configuration 'cfg1'
option configuration 'ACM'
option gadget 'g1'
config function 'acm1'
option function 'acm'
option configuration 'cfg1'

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@ -0,0 +1,13 @@
config gadget 'g1'
option idVendor '0x0525'
option idProduct '0xa4a1'
option bDeviceClass '2'
option product 'NCM Gadget'
config configuration 'cfg1'
option configuration 'NCM'
option gadget 'g1'
config function 'ncm1'
option function 'ncm'
option configuration 'cfg1'

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@ -0,0 +1,12 @@
# apply a preset under /usr/share/usbgadget
config preset
option name 'ncm'
# specify a UDC to enable this gadget:
# option UDC 'musb-hdrc.2.auto'
# or create a custom gadget here following the content of presets:
#config gadget 'g1'
# option idVendor ...
# ...
# and add an UDC under the gadget section to enable it:
# option UDC 'musb-hdrc.2.auto'

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@ -0,0 +1,144 @@
#!/bin/sh /etc/rc.common
START=19
GADGET_FS=/sys/kernel/config/usb_gadget
GADGET_PRESETS_DIR=/usr/share/usbgadget
GADGET_PREFIX=owrt_
log() {
logger -t usbgadget "$@"
}
apply_configs() {
local fs_path="$1"
local cfg="$2"
for param in $(find "$fs_path" -maxdepth 1 -type f -exec basename '{}' ';'); do
[ "$param" = "UDC" ] && continue
config_get val "$cfg" "$param"
[ -n "$val" ] && echo "$val" > "${fs_path}/${param}"
done
}
setup_gadget() {
local cfg="$1"
local gadget_path="${GADGET_FS}/${GADGET_PREFIX}${cfg}"
local param udc
config_get udc "$cfg" UDC
[ -z "$udc" ] && return
mkdir "$gadget_path" || return
apply_configs "$gadget_path" "$cfg"
local strings_path="${gadget_path}/strings/0x409"
mkdir "$strings_path"
apply_configs "$strings_path" "$cfg"
}
setup_configuration() {
local cfg="$1"
local gadget
config_get gadget "$cfg" gadget
local cfgs_path="${GADGET_FS}/${GADGET_PREFIX}${gadget}/configs"
[ -d "${cfgs_path}" ] || return
local cfg_path="${cfgs_path}/${cfg}.1"
mkdir "$cfg_path" || {
log "failed to create configuration ${cfg}"
return
}
apply_configs "$cfg_path" "$cfg"
local strings_path="${cfg_path}/strings/0x409"
mkdir "$strings_path"
apply_configs "$strings_path" "$cfg"
}
setup_function() {
local cfg="$1"
local usbcfg gadget usbfun
config_get usbcfg "$cfg" configuration
[ -z "$usbcfg" ] && return
config_get usbfun "$cfg" function
[ -z "$usbfun" ] && return
config_get gadget "$usbcfg" gadget
local gadget_path="${GADGET_FS}/${GADGET_PREFIX}${gadget}"
local cfg_path="${gadget_path}/configs/${usbcfg}.1"
[ -d "${cfg_path}" ] || return
local fun_path="${gadget_path}/functions/${usbfun}.${cfg}"
mkdir "$fun_path" || {
log "failed to create function ${usbfun}.${cfg}"
return
}
apply_configs "$fun_path" "$cfg"
ln -s "$fun_path" "$cfg_path"
}
attach_gadget() {
local cfg="$1"
local gadget_path="${GADGET_FS}/${GADGET_PREFIX}${cfg}"
local param udc
config_get udc "$cfg" UDC
[ -z "$udc" ] && return
echo "$udc" > "$gadget_path/UDC"
}
load_gadget() {
config_foreach setup_gadget gadget
config_foreach setup_configuration configuration
config_foreach setup_function function
config_foreach attach_gadget gadget
}
# use subshell for isolated env
apply_preset() (
local preset="$1"
local gadget="$2"
UCI_CONFIG_DIR=$GADGET_PRESETS_DIR config_load "$1"
config_set g1 UDC "$2"
load_gadget
)
load_preset() {
local cfg="$1"
config_get name "$cfg" name
config_get udc "$cfg" UDC
[ -z "$udc" ] && return
apply_preset $name $udc
}
start() {
grep -q /sys/kernel/config /proc/mounts || \
mount -t configfs configfs /sys/kernel/config
[ -d /sys/kernel/config/usb_gadget ] || {
log "usb_gadget support not found."
return 1
}
config_load usbgadget
config_foreach load_preset preset
load_gadget
}
stop() {
for gadget_path in ${GADGET_FS}/${GADGET_PREFIX}* ; do
[ -d "$gadget_path" ] || continue
echo "" > ${gadget_path}/UDC
find ${gadget_path}/configs -maxdepth 2 -type l -exec rm '{}' ';'
rmdir ${gadget_path}/configs/*/strings/*
rmdir ${gadget_path}/configs/*
rmdir ${gadget_path}/functions/*
rmdir ${gadget_path}/strings/*
rmdir $gadget_path
done
}

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@ -15,6 +15,8 @@ CONFIG_LEDS_RESET=y
CONFIG_MARVELL_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_SPI_NOR_SWP_DISABLE=y
# CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE is not set
CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y
CONFIG_MTD_SPLIT_EVA_FW=y
CONFIG_NVMEM_SYSFS=y

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@ -0,0 +1,337 @@
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "mt7981.dtsi"
/ {
model = "Routerich AX3000";
compatible = "routerich,ax3000", "mediatek,mt7981";
aliases {
label-mac-device = &wan;
led-boot = &led_power_blue;
led-failsafe = &led_power_blue;
led-running = &led_power_blue;
led-upgrade = &led_power_blue;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
button-0 {
label = "mesh";
linux,input-type = <EV_SW>;
linux,code = <BTN_0>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
button-1 {
label = "reset";
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN;
function-enumerator = <50>;
gpios = <&pio 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
led-1 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WAN;
gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
};
led_power_blue: led-2 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
gpios = <&pio 7 GPIO_ACTIVE_LOW>;
};
led-3 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
led-4 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
led-5 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
led-6 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN;
gpios = <&pio 12 GPIO_ACTIVE_LOW>;
};
led-7 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN;
function-enumerator = <24>;
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led-8 {
color = <LED_COLOR_ID_BLUE>;
/* LED_FUNCTION_MESH isn't implemented yet */
function = "mesh";
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
};
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 (-1)>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <0x1f>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
/* ESMT F50L1G41LB (128M) */
spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0_all {
label = "spi0.0";
reg = <0x0 0x8000000>;
read-only;
};
partition@0 {
label = "BL2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
partition@4580000 {
label = "firmware_backup";
reg = <0x4580000 0x2000000>;
read-only;
};
partition@6580000 {
label = "zrsave";
reg = <0x6580000 0x100000>;
read-only;
};
partition@6680000 {
label = "config2";
reg = <0x6680000 0x100000>;
read-only;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
wan: port@4 {
reg = <4>;
label = "wan";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 (-2)>;
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&uart0 {
status = "okay";
};
&usb_phy {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_0>;
};
&xhci {
status = "okay";
mediatek,u3p-dis-msk = <0x1>;
};

View file

@ -0,0 +1,269 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981.dtsi"
/ {
model = "Zbtlink ZBT-Z8103AX";
compatible = "zbtlink,zbt-z8103ax", "mediatek,mt7981";
aliases {
serial0 = &uart0;
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_green;
label-mac-device = &gmac0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 loglevel=8";
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
compatible = "gpio-keys";
button-mesh {
label = "mesh";
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
};
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led-wan {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
};
led-status-blue {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 23 GPIO_ACTIVE_HIGH>;
};
led_status_green: led-status-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 24 GPIO_ACTIVE_LOW>;
};
led_status_red: led-status-red {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 25 GPIO_ACTIVE_LOW>;
};
led-wlan2g {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
function-enumerator = <0>;
linux,default-trigger = "phy0tpt";
};
led-wlan5g {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
function-enumerator = <1>;
linux,default-trigger = "phy1tpt";
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
/* LAN */
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 2>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
/* WAN */
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 3>;
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0000000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory>;
nvmem-cell-names = "eeprom";
};

View file

@ -19,11 +19,13 @@
#address-cells = <2>;
#size-cells = <2>;
clk40m: oscillator@0 {
compatible = "fixed-clock";
clock-frequency = <40000000>;
#clock-cells = <0>;
clock-output-names = "clkxtal";
cci: cci {
compatible = "mediatek,mt7988-cci",
"mediatek,mt8183-cci";
clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
<&topckgen CLK_TOP_XTAL>;
clock-names = "cci", "intermediate";
operating-points-v2 = <&cci_opp>;
};
cpus {
@ -99,15 +101,6 @@
};
};
cci: cci {
compatible = "mediatek,mt7988-cci",
"mediatek,mt8183-cci";
clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
<&topckgen CLK_TOP_XTAL>;
clock-names = "cci", "intermediate";
operating-points-v2 = <&cci_opp>;
};
cci_opp: opp_table_cci {
compatible = "operating-points-v2";
opp-shared;
@ -129,6 +122,13 @@
};
};
clk40m: oscillator@0 {
compatible = "fixed-clock";
clock-frequency = <40000000>;
#clock-cells = <0>;
clock-output-names = "clkxtal";
};
pmu {
compatible = "arm,cortex-a73-pmu";
interrupt-parent = <&gic>;
@ -140,86 +140,6 @@
method = "smc";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */
secmon_reserved: secmon@43000000 {
reg = <0 0x43000000 0 0x50000>;
no-map;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors = <&lvts 0>;
trips {
cpu_trip_crit: crit {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <120000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active_high: active-high {
temperature = <115000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_med: active-med {
temperature = <85000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_low: active-low {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active-high {
/* active: set fan to cooling level 2 */
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_active_high>;
};
cpu-active-low {
/* active: set fan to cooling level 1 */
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_active_med>;
};
cpu-passive {
/* passive: set fan to cooling level 0 */
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active_low>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
@ -238,6 +158,18 @@
regulator-always-on;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */
secmon_reserved: secmon@43000000 {
reg = <0 0x43000000 0 0x50000>;
no-map;
};
};
soc {
#address-cells = <2>;
#size-cells = <2>;
@ -539,6 +471,25 @@
};
};
pwm: pwm@10048000 {
compatible = "mediatek,mt7988-pwm";
reg = <0 0x10048000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
<&infracfg CLK_INFRA_66M_PWM_HCK>,
<&infracfg CLK_INFRA_66M_PWM_CK1>,
<&infracfg CLK_INFRA_66M_PWM_CK2>,
<&infracfg CLK_INFRA_66M_PWM_CK3>,
<&infracfg CLK_INFRA_66M_PWM_CK4>,
<&infracfg CLK_INFRA_66M_PWM_CK5>,
<&infracfg CLK_INFRA_66M_PWM_CK6>,
<&infracfg CLK_INFRA_66M_PWM_CK7>,
<&infracfg CLK_INFRA_66M_PWM_CK8>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
"pwm4","pwm5","pwm6","pwm7","pwm8";
status = "disabled";
};
sgmiisys0: syscon@10060000 {
compatible = "mediatek,mt7988-sgmiisys",
"mediatek,mt7988-sgmiisys_0",
@ -571,28 +522,6 @@
#clock-cells = <1>;
};
xfi_pextp0: xfi-pextp@11f20000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_0",
"syscon";
reg = <0 0x11f20000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pextp1: xfi-pextp@11f30000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_1",
"syscon";
reg = <0 0x11f30000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pll: xfi-pll@11f40000 {
compatible = "mediatek,mt7988-xfi-pll", "syscon";
reg = <0 0x11f40000 0 0x1000>;
#clock-cells = <1>;
};
mcusys: mcusys@100e0000 {
compatible = "mediatek,mt7988-mcusys", "syscon";
reg = <0 0x100e0000 0 0x1000>;
@ -742,25 +671,6 @@
status = "disabled";
};
pwm: pwm@10048000 {
compatible = "mediatek,mt7988-pwm";
reg = <0 0x10048000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
<&infracfg CLK_INFRA_66M_PWM_HCK>,
<&infracfg CLK_INFRA_66M_PWM_CK1>,
<&infracfg CLK_INFRA_66M_PWM_CK2>,
<&infracfg CLK_INFRA_66M_PWM_CK3>,
<&infracfg CLK_INFRA_66M_PWM_CK4>,
<&infracfg CLK_INFRA_66M_PWM_CK5>,
<&infracfg CLK_INFRA_66M_PWM_CK6>,
<&infracfg CLK_INFRA_66M_PWM_CK7>,
<&infracfg CLK_INFRA_66M_PWM_CK8>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
"pwm4","pwm5","pwm6","pwm7","pwm8";
status = "disabled";
};
fan: pwm-fan {
compatible = "pwm-fan";
/* cooling level (0, 1, 2) : (0% duty, 50% duty, 100% duty) */
@ -780,15 +690,53 @@
nvmem-cell-names = "e_data1";
};
crypto: crypto@15600000 {
compatible = "inside-secure,safexcel-eip197b";
reg = <0 0x15600000 0 0x180000>;
interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ring0", "ring1", "ring2", "ring3";
status = "okay";
ssusb0: usb@11190000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11190000 0 0x2e00>,
<0 0x11193e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
phys = <&xphyu2port0 PHY_TYPE_USB2>,
<&xphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS>,
<&infracfg CLK_INFRA_USB_XHCI>,
<&infracfg CLK_INFRA_USB_REF>,
<&infracfg CLK_INFRA_66M_USB_HCK>,
<&infracfg CLK_INFRA_133M_USB_HCK>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
mediatek,p0_speed_fixup;
status = "disabled";
};
ssusb1: usb@11200000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x2e00>,
<0 0x11203e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
phys = <&tphyu2port0 PHY_TYPE_USB2>,
<&tphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS_CK_P1>,
<&infracfg CLK_INFRA_USB_XHCI_CK_P1>,
<&infracfg CLK_INFRA_USB_CK_P1>,
<&infracfg CLK_INFRA_66M_USB_HCK_CK_P1>,
<&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
};
afe: audio-controller@11210000 {
@ -820,6 +768,29 @@
status = "disabled";
};
mmc0: mmc@11230000 {
compatible = "mediatek,mt7986-mmc",
"mediatek,mt7981-mmc";
reg = <0 0x11230000 0 0x1000>,
<0 0x11D60000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&infracfg CLK_INFRA_MSDC400>,
<&infracfg CLK_INFRA_MSDC2_HCK>,
<&infracfg CLK_INFRA_66M_MSDC_0_HCK>,
<&infracfg CLK_INFRA_133M_MSDC_0_HCK>;
assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>,
<&topckgen CLK_TOP_EMMC_400M_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>,
<&apmixedsys CLK_APMIXED_MSDCPLL>;
clock-names = "source",
"hclk",
"axi_cg",
"ahb_cg";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pcie2: pcie@11280000 {
compatible = "mediatek,mt7988-pcie",
"mediatek,mt7986-pcie",
@ -979,78 +950,6 @@
};
};
ssusb0: usb@11190000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11190000 0 0x2e00>,
<0 0x11193e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
phys = <&xphyu2port0 PHY_TYPE_USB2>,
<&xphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS>,
<&infracfg CLK_INFRA_USB_XHCI>,
<&infracfg CLK_INFRA_USB_REF>,
<&infracfg CLK_INFRA_66M_USB_HCK>,
<&infracfg CLK_INFRA_133M_USB_HCK>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
mediatek,p0_speed_fixup;
status = "disabled";
};
ssusb1: usb@11200000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x2e00>,
<0 0x11203e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
phys = <&tphyu2port0 PHY_TYPE_USB2>,
<&tphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS_CK_P1>,
<&infracfg CLK_INFRA_USB_XHCI_CK_P1>,
<&infracfg CLK_INFRA_USB_CK_P1>,
<&infracfg CLK_INFRA_66M_USB_HCK_CK_P1>,
<&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
};
mmc0: mmc@11230000 {
compatible = "mediatek,mt7986-mmc",
"mediatek,mt7981-mmc";
reg = <0 0x11230000 0 0x1000>,
<0 0x11D60000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&infracfg CLK_INFRA_MSDC400>,
<&infracfg CLK_INFRA_MSDC2_HCK>,
<&infracfg CLK_INFRA_66M_MSDC_0_HCK>,
<&infracfg CLK_INFRA_133M_MSDC_0_HCK>;
assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>,
<&topckgen CLK_TOP_EMMC_400M_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>,
<&apmixedsys CLK_APMIXED_MSDCPLL>;
clock-names = "source",
"hclk",
"axi_cg",
"ahb_cg";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
tphy: tphy@11c50000 {
compatible = "mediatek,mt7988",
"mediatek,generic-tphy-v2";
@ -1108,6 +1007,28 @@
};
};
xfi_pextp0: xfi-pextp@11f20000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_0",
"syscon";
reg = <0 0x11f20000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pextp1: xfi-pextp@11f30000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_1",
"syscon";
reg = <0 0x11f30000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pll: xfi-pll@11f40000 {
compatible = "mediatek,mt7988-xfi-pll", "syscon";
reg = <0 0x11f40000 0 0x1000>;
#clock-cells = <1>;
};
efuse: efuse@11f50000 {
compatible = "mediatek,efuse";
reg = <0 0x11f50000 0 0x1000>;
@ -1437,5 +1358,84 @@
};
};
};
crypto: crypto@15600000 {
compatible = "inside-secure,safexcel-eip197b";
reg = <0 0x15600000 0 0x180000>;
interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ring0", "ring1", "ring2", "ring3";
status = "okay";
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors = <&lvts 0>;
trips {
cpu_trip_crit: crit {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <120000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active_high: active-high {
temperature = <115000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_med: active-med {
temperature = <85000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_low: active-low {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active-high {
/* active: set fan to cooling level 2 */
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_active_high>;
};
cpu-active-low {
/* active: set fan to cooling level 1 */
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_active_med>;
};
cpu-passive {
/* passive: set fan to cooling level 0 */
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active_low>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
};

View file

@ -19,11 +19,13 @@
#address-cells = <2>;
#size-cells = <2>;
clk40m: oscillator@0 {
compatible = "fixed-clock";
clock-frequency = <40000000>;
#clock-cells = <0>;
clock-output-names = "clkxtal";
cci: cci {
compatible = "mediatek,mt7988-cci",
"mediatek,mt8183-cci";
clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
<&topckgen CLK_TOP_XTAL>;
clock-names = "cci", "intermediate";
operating-points-v2 = <&cci_opp>;
};
cpus {
@ -99,15 +101,6 @@
};
};
cci: cci {
compatible = "mediatek,mt7988-cci",
"mediatek,mt8183-cci";
clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
<&topckgen CLK_TOP_XTAL>;
clock-names = "cci", "intermediate";
operating-points-v2 = <&cci_opp>;
};
cci_opp: opp_table_cci {
compatible = "operating-points-v2";
opp-shared;
@ -129,6 +122,13 @@
};
};
clk40m: oscillator@0 {
compatible = "fixed-clock";
clock-frequency = <40000000>;
#clock-cells = <0>;
clock-output-names = "clkxtal";
};
pmu {
compatible = "arm,cortex-a73-pmu";
interrupt-parent = <&gic>;
@ -140,86 +140,6 @@
method = "smc";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */
secmon_reserved: secmon@43000000 {
reg = <0 0x43000000 0 0x50000>;
no-map;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors = <&lvts 0>;
trips {
cpu_trip_crit: crit {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <120000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active_high: active-high {
temperature = <115000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_med: active-med {
temperature = <85000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_low: active-low {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active-high {
/* active: set fan to cooling level 2 */
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_active_high>;
};
cpu-active-low {
/* active: set fan to cooling level 1 */
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_active_med>;
};
cpu-passive {
/* passive: set fan to cooling level 0 */
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active_low>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
@ -238,6 +158,18 @@
regulator-always-on;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */
secmon_reserved: secmon@43000000 {
reg = <0 0x43000000 0 0x50000>;
no-map;
};
};
soc {
#address-cells = <2>;
#size-cells = <2>;
@ -539,6 +471,25 @@
};
};
pwm: pwm@10048000 {
compatible = "mediatek,mt7988-pwm";
reg = <0 0x10048000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
<&infracfg CLK_INFRA_66M_PWM_HCK>,
<&infracfg CLK_INFRA_66M_PWM_CK1>,
<&infracfg CLK_INFRA_66M_PWM_CK2>,
<&infracfg CLK_INFRA_66M_PWM_CK3>,
<&infracfg CLK_INFRA_66M_PWM_CK4>,
<&infracfg CLK_INFRA_66M_PWM_CK5>,
<&infracfg CLK_INFRA_66M_PWM_CK6>,
<&infracfg CLK_INFRA_66M_PWM_CK7>,
<&infracfg CLK_INFRA_66M_PWM_CK8>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
"pwm4","pwm5","pwm6","pwm7","pwm8";
status = "disabled";
};
sgmiisys0: syscon@10060000 {
compatible = "mediatek,mt7988-sgmiisys",
"mediatek,mt7988-sgmiisys_0",
@ -571,28 +522,6 @@
#clock-cells = <1>;
};
xfi_pextp0: xfi-pextp@11f20000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_0",
"syscon";
reg = <0 0x11f20000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pextp1: xfi-pextp@11f30000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_1",
"syscon";
reg = <0 0x11f30000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pll: xfi-pll@11f40000 {
compatible = "mediatek,mt7988-xfi-pll", "syscon";
reg = <0 0x11f40000 0 0x1000>;
#clock-cells = <1>;
};
mcusys: mcusys@100e0000 {
compatible = "mediatek,mt7988-mcusys", "syscon";
reg = <0 0x100e0000 0 0x1000>;
@ -742,25 +671,6 @@
status = "disabled";
};
pwm: pwm@10048000 {
compatible = "mediatek,mt7988-pwm";
reg = <0 0x10048000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
<&infracfg CLK_INFRA_66M_PWM_HCK>,
<&infracfg CLK_INFRA_66M_PWM_CK1>,
<&infracfg CLK_INFRA_66M_PWM_CK2>,
<&infracfg CLK_INFRA_66M_PWM_CK3>,
<&infracfg CLK_INFRA_66M_PWM_CK4>,
<&infracfg CLK_INFRA_66M_PWM_CK5>,
<&infracfg CLK_INFRA_66M_PWM_CK6>,
<&infracfg CLK_INFRA_66M_PWM_CK7>,
<&infracfg CLK_INFRA_66M_PWM_CK8>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
"pwm4","pwm5","pwm6","pwm7","pwm8";
status = "disabled";
};
fan: pwm-fan {
compatible = "pwm-fan";
/* cooling level (0, 1, 2) : (0% duty, 50% duty, 100% duty) */
@ -780,15 +690,53 @@
nvmem-cell-names = "e_data1";
};
crypto: crypto@15600000 {
compatible = "inside-secure,safexcel-eip197b";
reg = <0 0x15600000 0 0x180000>;
interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ring0", "ring1", "ring2", "ring3";
status = "okay";
ssusb0: usb@11190000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11190000 0 0x2e00>,
<0 0x11193e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
phys = <&xphyu2port0 PHY_TYPE_USB2>,
<&xphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS>,
<&infracfg CLK_INFRA_USB_XHCI>,
<&infracfg CLK_INFRA_USB_REF>,
<&infracfg CLK_INFRA_66M_USB_HCK>,
<&infracfg CLK_INFRA_133M_USB_HCK>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
mediatek,p0_speed_fixup;
status = "disabled";
};
ssusb1: usb@11200000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x2e00>,
<0 0x11203e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
phys = <&tphyu2port0 PHY_TYPE_USB2>,
<&tphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS_CK_P1>,
<&infracfg CLK_INFRA_USB_XHCI_CK_P1>,
<&infracfg CLK_INFRA_USB_CK_P1>,
<&infracfg CLK_INFRA_66M_USB_HCK_CK_P1>,
<&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
};
afe: audio-controller@11210000 {
@ -820,6 +768,29 @@
status = "disabled";
};
mmc0: mmc@11230000 {
compatible = "mediatek,mt7986-mmc",
"mediatek,mt7981-mmc";
reg = <0 0x11230000 0 0x1000>,
<0 0x11D60000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&infracfg CLK_INFRA_MSDC400>,
<&infracfg CLK_INFRA_MSDC2_HCK>,
<&infracfg CLK_INFRA_66M_MSDC_0_HCK>,
<&infracfg CLK_INFRA_133M_MSDC_0_HCK>;
assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>,
<&topckgen CLK_TOP_EMMC_400M_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>,
<&apmixedsys CLK_APMIXED_MSDCPLL>;
clock-names = "source",
"hclk",
"axi_cg",
"ahb_cg";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pcie2: pcie@11280000 {
compatible = "mediatek,mt7988-pcie",
"mediatek,mt7986-pcie",
@ -979,78 +950,6 @@
};
};
ssusb0: usb@11190000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11190000 0 0x2e00>,
<0 0x11193e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
phys = <&xphyu2port0 PHY_TYPE_USB2>,
<&xphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS>,
<&infracfg CLK_INFRA_USB_XHCI>,
<&infracfg CLK_INFRA_USB_REF>,
<&infracfg CLK_INFRA_66M_USB_HCK>,
<&infracfg CLK_INFRA_133M_USB_HCK>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
mediatek,p0_speed_fixup;
status = "disabled";
};
ssusb1: usb@11200000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x2e00>,
<0 0x11203e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
phys = <&tphyu2port0 PHY_TYPE_USB2>,
<&tphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS_CK_P1>,
<&infracfg CLK_INFRA_USB_XHCI_CK_P1>,
<&infracfg CLK_INFRA_USB_CK_P1>,
<&infracfg CLK_INFRA_66M_USB_HCK_CK_P1>,
<&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
};
mmc0: mmc@11230000 {
compatible = "mediatek,mt7986-mmc",
"mediatek,mt7981-mmc";
reg = <0 0x11230000 0 0x1000>,
<0 0x11D60000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&infracfg CLK_INFRA_MSDC400>,
<&infracfg CLK_INFRA_MSDC2_HCK>,
<&infracfg CLK_INFRA_66M_MSDC_0_HCK>,
<&infracfg CLK_INFRA_133M_MSDC_0_HCK>;
assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>,
<&topckgen CLK_TOP_EMMC_400M_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>,
<&apmixedsys CLK_APMIXED_MSDCPLL>;
clock-names = "source",
"hclk",
"axi_cg",
"ahb_cg";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
tphy: tphy@11c50000 {
compatible = "mediatek,mt7988",
"mediatek,generic-tphy-v2";
@ -1108,6 +1007,28 @@
};
};
xfi_pextp0: xfi-pextp@11f20000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_0",
"syscon";
reg = <0 0x11f20000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pextp1: xfi-pextp@11f30000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_1",
"syscon";
reg = <0 0x11f30000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pll: xfi-pll@11f40000 {
compatible = "mediatek,mt7988-xfi-pll", "syscon";
reg = <0 0x11f40000 0 0x1000>;
#clock-cells = <1>;
};
efuse: efuse@11f50000 {
compatible = "mediatek,efuse";
reg = <0 0x11f50000 0 0x1000>;
@ -1437,5 +1358,84 @@
};
};
};
crypto: crypto@15600000 {
compatible = "inside-secure,safexcel-eip197b";
reg = <0 0x15600000 0 0x180000>;
interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ring0", "ring1", "ring2", "ring3";
status = "okay";
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors = <&lvts 0>;
trips {
cpu_trip_crit: crit {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <120000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active_high: active-high {
temperature = <115000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_med: active-med {
temperature = <85000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_low: active-low {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active-high {
/* active: set fan to cooling level 2 */
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_active_high>;
};
cpu-active-low {
/* active: set fan to cooling level 1 */
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_active_med>;
};
cpu-passive {
/* passive: set fan to cooling level 0 */
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active_low>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
};

View file

@ -26,6 +26,13 @@ netgear,wax220)
ucidef_set_led_netdev "wlan2g" "WLAN2G" "blue:wlan2g" "phy0-ap0"
ucidef_set_led_netdev "wlan5g" "WLAN5G" "blue:wlan5g" "phy1-ap0"
;;
routerich,ax3000)
ucidef_set_led_netdev "lan-1" "lan-1" "blue:lan-1" "lan1" "link tx rx"
ucidef_set_led_netdev "lan-2" "lan-2" "blue:lan-2" "lan2" "link tx rx"
ucidef_set_led_netdev "lan-3" "lan-3" "blue:lan-3" "lan3" "link tx rx"
ucidef_set_led_netdev "wan" "wan" "blue:wan" "wan" "link tx rx"
ucidef_set_led_netdev "wan-off" "wan-off" "red:wan" "wan" "link"
;;
xiaomi,mi-router-wr30u-112m-nmbm|\
xiaomi,mi-router-wr30u-stock|\
xiaomi,mi-router-wr30u-ubootmod)
@ -35,6 +42,9 @@ xiaomi,redmi-router-ax6000-stock|\
xiaomi,redmi-router-ax6000-ubootmod)
ucidef_set_led_netdev "wan" "wan" "rgb:network" "wan"
;;
zbtlink,zbt-z8103ax)
ucidef_set_led_netdev "wan" "wan" "green:wan" "eth1" "link tx rx"
;;
zyxel_ex5601-t0-stock|\
zyxel,ex5601-t0-ubootmod)
ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0" "link tx rx"

View file

@ -29,11 +29,13 @@ mediatek_setup_interfaces()
confiabits,mt7981|\
cudy,wr3000-v1|\
jcg,q30-pro|\
qihoo,360t7)
qihoo,360t7|\
routerich,ax3000)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
;;
cmcc,rax3000m|\
h3c,magic-nx30-pro)
h3c,magic-nx30-pro|\
zbtlink,zbt-z8103ax)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" eth1
;;
glinet,gl-mt2500|\

View file

@ -104,7 +104,9 @@ case "$board" in
[ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
;;
routerich,ax3000|\
zbtlink,zbt-z8102ax|\
zbtlink,zbt-z8103ax|\
zyxel,ex5601-t0|\
zyxel,ex5601-t0-ubootmod)
addr=$(mtd_get_mac_binary "Factory" 0x4)

View file

@ -324,7 +324,7 @@ define Device/confiabits_mt7981
IMAGE_SIZE := 65536k
KERNEL_IN_UBI := 1
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
DEVICE_PACKAGES := kmod-usb3 kmod-mt7981-firmware
DEVICE_PACKAGES := kmod-usb3 kmod-mt7981-firmware mt7981-wo-firmware
endef
TARGET_DEVICES += confiabits_mt7981
@ -343,7 +343,7 @@ define Device/cudy_wr3000-v1
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
IMAGE/sysupgrade.bin := append-kernel | pad-to 128k | append-rootfs | pad-rootfs | check-size | append-metadata
DEVICE_PACKAGES := kmod-mt7981-firmware
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
endef
TARGET_DEVICES += cudy_wr3000-v1
@ -653,6 +653,17 @@ define Device/qihoo_360t7
endef
TARGET_DEVICES += qihoo_360t7
define Device/routerich_ax3000
DEVICE_VENDOR := Routerich
DEVICE_MODEL := AX3000
DEVICE_DTS := mt7981b-routerich-ax3000
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
endef
TARGET_DEVICES += routerich_ax3000
define Device/tplink_tl-xdr-common
DEVICE_VENDOR := TP-Link
DEVICE_DTS_DIR := ../dts
@ -831,6 +842,23 @@ define Device/zbtlink_zbt-z8102ax
endef
TARGET_DEVICES += zbtlink_zbt-z8102ax
define Device/zbtlink_zbt-z8103ax
DEVICE_VENDOR := Zbtlink
DEVICE_MODEL := ZBT-Z8103AX
DEVICE_DTS := mt7981b-zbtlink-zbt-z8103ax
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
KERNEL_IN_UBI := 1
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 65536k
IMAGES += factory.bin
IMAGE/factory.bin := append-ubi | check-size $$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += zbtlink_zbt-z8103ax
define Device/zyxel_ex5601-t0-stock
DEVICE_VENDOR := Zyxel
DEVICE_MODEL := EX5601-T0

View file

@ -312,7 +312,7 @@
#size-cells = <2>;
ranges;
cpu1-bootpage@e000000 {
cpu1-bootpage@ff00000 {
/* Reserve upper 1 MB for second-core-bootpage */
reg = <0x0 0xff00000 0x0 0x100000>;
};

View file

@ -267,8 +267,9 @@
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>;
switch_wan_bmp = <ESS_PORT5>;
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>;
switch_wan_bmp = <ESS_PORT6>;
malibu_first_phy_addr = <0x18>;
switch_mac_mode = <MAC_MODE_QSGMII>;
switch_mac_mode1 = <MAC_MODE_USXGMII>;
switch_mac_mode2 = <MAC_MODE_USXGMII>;

View file

@ -74,9 +74,6 @@
compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 19>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -88,9 +85,6 @@
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -115,9 +109,6 @@
compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
reg = <0x600 0x34>;
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;
@ -285,9 +276,6 @@
compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
reg = <0xd00 0x10>;
resets = <&sysc 28>;
reset-names = "intc";
interrupt-parent = <&cpuintc>;
interrupts = <7>;
};

View file

@ -74,9 +74,6 @@
compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 19>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -88,9 +85,6 @@
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -99,9 +93,6 @@
compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
reg = <0x600 0x34>;
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;
@ -247,9 +238,6 @@
compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
reg = <0xd00 0x10>;
resets = <&sysc 28>;
reset-names = "intc";
interrupt-parent = <&cpuintc>;
interrupts = <7>;
};

View file

@ -120,17 +120,6 @@
status = "disabled";
};
systick: systick@500 {
compatible = "ralink,mt7621-systick", "ralink,cevt-systick";
reg = <0x500 0x10>;
resets = <&sysc MT7621_RST_AUX_STCK>;
reset-names = "intc";
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 5 IRQ_TYPE_LEVEL_HIGH>;
};
memc: memory-controller@5000 {
compatible = "mediatek,mt7621-memc", "syscon";
reg = <0x5000 0x1000>;

View file

@ -50,27 +50,26 @@
status = "okay";
};
&pcie0 {
&pcie1 { // MT7603EN
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <2400000 2500000>;
led {
led-active-low;
};
};
};
&pcie1 {
&pcie2 { // MT7612E
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
led {
led-sources = <2>;
};
};
};

View file

@ -55,9 +55,6 @@
compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 9>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -73,9 +70,6 @@
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 10>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -220,9 +214,6 @@
reg = <0x5000 0x1000>;
#pwm-cells = <2>;
resets = <&sysc 31>;
reset-names = "pwm";
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;

View file

@ -10,7 +10,7 @@
led-failsafe = &led_system_amber;
led-running = &led_system_blue;
led-upgrade = &led_system_amber;
label-mac-device = &ethernet;
label-mac-device = &wmac;
};
leds {

View file

@ -73,9 +73,6 @@
compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 19>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -87,9 +84,6 @@
compatible = "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -123,9 +117,6 @@
20 24 28 2c
30 34 ];
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;
};

View file

@ -85,9 +85,6 @@
compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -120,8 +117,6 @@
ralink,register-map = [ 00 04 08 0c
20 24 28 2c
30 34 ];
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;

View file

@ -74,9 +74,6 @@
compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 19>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -88,9 +85,6 @@
compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -115,9 +109,6 @@
compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
reg = <0x600 0x34>;
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;

View file

@ -74,9 +74,6 @@
compatible = "ralink,rt5350-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 19>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -88,9 +85,6 @@
compatible = "ralink,rt5350-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -115,9 +109,6 @@
compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
reg = <0x600 0x34>;
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;

View file

@ -50,43 +50,43 @@
read-only;
};
partition@0x60000 {
partition@60000 {
label = "bootware_data";
reg = <0x60000 0x30000>;
read-only;
};
partition@0x90000 {
partition@90000 {
label = "bootware_extend";
reg = <0x90000 0x40000>;
read-only;
};
partition@0x100000 {
partition@100000 {
label = "bootware_basic_backup";
reg = <0x100000 0x50000>;
read-only;
};
partition@0x160000 {
partition@160000 {
label = "bootware_data_backup";
reg = <0x160000 0x30000>;
read-only;
};
partition@0x190000 {
partition@190000 {
label = "bootware_extend_backup";
reg = <0x190000 0x40000>;
read-only;
};
partition@0x300000 {
partition@300000 {
label = "firmware";
compatible = "h3c,vfs-firmware";
reg = <0x300000 0x1cf0000>;
};
partition@0x1ff0000 {
partition@1ff0000 {
label = "factory";
reg = <0x1ff0000 0x10000>;
read-only;

View file

@ -29,7 +29,7 @@
};
/* i2c of the SFP cage: port 12 */
i2c0: i2c-rtl9300 {
i2c0: i2c-rtl9300@1b00036c {
compatible = "realtek,rtl9300-i2c";
reg = <0x1b00036c 0x3c>;
#address-cells = <1>;
@ -62,7 +62,7 @@
tx-disable-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
};
led_set: led_set@0 {
led_set: led_set {
compatible = "realtek,rtl9300-leds";
active-low;

View file

@ -854,8 +854,11 @@ static void rtl93xx_phylink_mac_config(struct dsa_switch *ds, int port,
case SPEED_1000:
reg |= 2 << 3;
break;
case SPEED_100:
reg |= 1 << 3;
break;
default:
reg |= 2 << 3;
/* Also covers 10M */
break;
}

View file

@ -31,9 +31,6 @@ cisco-mx100-hw)
ucidef_set_network_device_path "eth11" "pci0000:00/0000:00:01.1/0000:02:00.2"
ucidef_set_interfaces_lan_wan "mgmt eth2 eth3 eth4 eth5 eth6 eth7 eth8 eth9 eth10 eth11" "wan"
;;
mellanox-technologies-ltd-msn2100)
ucidef_set_interface_lan "eth1 eth2 eth3 eth4 eth5 eth6 eth7 eth8 eth9 eth10 eth11 eth12 eth13 eth14 eth15 eth16"
;;
pc-engines-apu1|pc-engines-apu2|pc-engines-apu3)
ucidef_set_interfaces_lan_wan "eth1 eth2" "eth0"
;;

View file

@ -4,11 +4,7 @@ define Device/generic
DEVICE_PACKAGES += \
kmod-amazon-ena kmod-amd-xgbe kmod-bnx2 kmod-dwmac-intel kmod-e1000e kmod-e1000 \
kmod-forcedeth kmod-fs-vfat kmod-igb kmod-igc kmod-ixgbe kmod-r8169 \
kmod-tg3 kmod-mlxsw-core kmod-mlxsw-pci kmod-mlxsw-i2c \
kmod-mlxsw-spectrum kmod-mlxsw-minimal kmod-mlxfw \
kmod-leds-mlxcpld kmod-lib-objagg kmod-lib-parman \
kmod-hwmon-coretemp kmod-hwmon-drivetemp kmod-hwmon-jc42 \
kmod-i2c-i801 mlxsw_spectrum-firmware
kmod-tg3
GRUB2_VARIANT := generic
endef
TARGET_DEVICES += generic