bmips: improve kernel patches

Add missing patch headers and regenerate the ones that contain an obsolete
patch header.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

target/linux/bmips/patches-5.15/100-irqchip-add-support-for-bcm6345-style-external-inter.patch

@@ -1,17 +1,17 @@
 From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Sun, 30 Nov 2014 14:54:27 +0100
-Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external
+Subject: [PATCH] irqchip: add support for bcm6345-style external interrupt
- interrupt controller
+ controller
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
- .../interrupt-controller/brcm,bcm6345-ext-intc.txt |   29 ++
+ .../brcm,bcm6345-ext-intc.txt                 |  29 ++
- drivers/irqchip/Kconfig                            |    4 +
+ drivers/irqchip/Kconfig                       |   4 +
- drivers/irqchip/Makefile                           |    1 +
+ drivers/irqchip/Makefile                      |   1 +
- drivers/irqchip/irq-bcm6345-ext.c                  |  287 ++++++++++++++++++++
+ drivers/irqchip/irq-bcm6345-ext.c             | 280 ++++++++++++++++++
- include/linux/irqchip/irq-bcm6345-ext.h            |   14 +
+ include/linux/irqchip/irq-bcm6345-ext.h       |  14 +
- 5 files changed, 335 insertions(+)
+ 5 files changed, 328 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
  create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
  create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h

target/linux/bmips/patches-5.15/200-mips-bmips-automatically-detect-CPU-frequency.patch

@@ -1,7 +1,7 @@
 From 0377ad93031d3e51c2afe44231241185f684b6af Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
 Date: Fri, 5 Mar 2021 15:14:32 +0100
-Subject: [PATCH 1/2] mips: bmips: automatically detect CPU frequency
+Subject: [PATCH] mips: bmips: automatically detect CPU frequency
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
 Content-Transfer-Encoding: 8bit
@@ -10,8 +10,8 @@ Some BCM63xx SoCs support multiple CPU frequencies depending on HW config.
 
 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 ---
- arch/mips/bmips/setup.c | 198 ++++++++++++++++++++++++++++++++++++++--
+ arch/mips/bmips/setup.c | 197 ++++++++++++++++++++++++++++++++++++++--
- 1 file changed, 191 insertions(+), 7 deletions(-)
+ 1 file changed, 190 insertions(+), 7 deletions(-)
 
 --- a/arch/mips/bmips/setup.c
 +++ b/arch/mips/bmips/setup.c

target/linux/bmips/patches-5.15/201-mips-bmips-automatically-detect-RAM-size.patch

@@ -1,7 +1,7 @@
 From f9ee3f28ecb979c77423be965ef9dd313bdb9e9b Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
 Date: Mon, 8 Mar 2021 16:58:34 +0100
-Subject: [PATCH 2/2] mips: bmips: automatically detect RAM size
+Subject: [PATCH] mips: bmips: automatically detect RAM size
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
 Content-Transfer-Encoding: 8bit
@@ -10,8 +10,8 @@ Some devices have different amounts of RAM installed depending on HW revision.
 
 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 ---
- arch/mips/bmips/setup.c | 118 ++++++++++++++++++++++++++++++++++++++++
+ arch/mips/bmips/setup.c | 119 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 118 insertions(+)
+ 1 file changed, 119 insertions(+)
 
 --- a/arch/mips/bmips/setup.c
 +++ b/arch/mips/bmips/setup.c

target/linux/bmips/patches-5.15/202-mips-bmips-tweak-Kconfig-options.patch

@@ -8,8 +8,8 @@ Content-Transfer-Encoding: 8bit
 
 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 ---
- Makefile | 2 +-
+ arch/mips/Kconfig | 7 +------
- 1 file changed, 1 insertion(+), 1 deletion(-)
+ 1 file changed, 1 insertion(+), 6 deletions(-)
 
 --- a/arch/mips/Kconfig
 +++ b/arch/mips/Kconfig

target/linux/bmips/patches-5.15/210-macronix_nand_block_protection_support.patch

@@ -14,12 +14,97 @@ devices since it hangs the device.
 
 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 ---
- drivers/mtd/nand/raw/nand_macronix.c | 5 -----
+ drivers/mtd/nand/raw/nand_macronix.c | 72 ----------------------------
- 1 file changed, 5 deletions(-)
+ 1 file changed, 72 deletions(-)
 
 --- a/drivers/mtd/nand/raw/nand_macronix.c
 +++ b/drivers/mtd/nand/raw/nand_macronix.c
-@@ -323,7 +323,6 @@ static int macronix_nand_init(struct nan
+@@ -12,10 +12,6 @@
+ #define MACRONIX_READ_RETRY_BIT BIT(0)
+ #define MACRONIX_NUM_READ_RETRY_MODES 6
+ 
+-#define ONFI_FEATURE_ADDR_MXIC_PROTECTION 0xA0
+-#define MXIC_BLOCK_PROTECTION_ALL_LOCK 0x38
+-#define MXIC_BLOCK_PROTECTION_ALL_UNLOCK 0x0
+-
+ #define ONFI_FEATURE_ADDR_MXIC_RANDOMIZER 0xB0
+ #define MACRONIX_RANDOMIZER_BIT BIT(1)
+ #define MACRONIX_RANDOMIZER_ENPGM BIT(0)
+@@ -179,73 +175,6 @@ static void macronix_nand_fix_broken_get
+ 		     ONFI_FEATURE_ADDR_TIMING_MODE, 1);
+ }
+ 
+-/*
+- * Macronix NAND supports Block Protection by Protectoin(PT) pin;
+- * active high at power-on which protects the entire chip even the #WP is
+- * disabled. Lock/unlock protection area can be partition according to
+- * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on.
+- */
+-static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len)
+-{
+-	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
+-	int ret;
+-
+-	feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK;
+-	nand_select_target(chip, 0);
+-	ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
+-				feature);
+-	nand_deselect_target(chip);
+-	if (ret)
+-		pr_err("%s all blocks failed\n", __func__);
+-
+-	return ret;
+-}
+-
+-static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len)
+-{
+-	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
+-	int ret;
+-
+-	feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
+-	nand_select_target(chip, 0);
+-	ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
+-				feature);
+-	nand_deselect_target(chip);
+-	if (ret)
+-		pr_err("%s all blocks failed\n", __func__);
+-
+-	return ret;
+-}
+-
+-static void macronix_nand_block_protection_support(struct nand_chip *chip)
+-{
+-	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
+-	int ret;
+-
+-	bitmap_set(chip->parameters.get_feature_list,
+-		   ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
+-
+-	feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
+-	nand_select_target(chip, 0);
+-	ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
+-				feature);
+-	nand_deselect_target(chip);
+-	if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) {
+-		if (ret)
+-			pr_err("Block protection check failed\n");
+-
+-		bitmap_clear(chip->parameters.get_feature_list,
+-			     ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
+-		return;
+-	}
+-
+-	bitmap_set(chip->parameters.set_feature_list,
+-		   ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
+-
+-	chip->ops.lock_area = mxic_nand_lock;
+-	chip->ops.unlock_area = mxic_nand_unlock;
+-}
+-
+ static int nand_power_down_op(struct nand_chip *chip)
+ {
+ 	int ret;
+@@ -323,7 +252,6 @@ static int macronix_nand_init(struct nan
  
  	macronix_nand_fix_broken_get_timings(chip);
  	macronix_nand_onfi_init(chip);

target/linux/bmips/patches-5.15/211-drivers-mtd-nand-macronix-comment-unused-function.patch

@@ -1,154 +0,0 @@
-From 00cf359b486a3d14c29014e9d57d92ab81972866 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Tue, 9 May 2023 14:03:08 +0200
-Subject: [PATCH] drivers: mtd: nand: macronix: comment unused function
-
-Comment unused function since macronix_nand_block_protection_support
-cause booting problems.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
----
- drivers/mtd/nand/raw/nand_macronix.c | 132 +++++++++++++--------------
- 1 file changed, 66 insertions(+), 66 deletions(-)
-
---- a/drivers/mtd/nand/raw/nand_macronix.c
-+++ b/drivers/mtd/nand/raw/nand_macronix.c
-@@ -179,72 +179,72 @@ static void macronix_nand_fix_broken_get
- 		     ONFI_FEATURE_ADDR_TIMING_MODE, 1);
- }
- 
--/*
-- * Macronix NAND supports Block Protection by Protectoin(PT) pin;
-- * active high at power-on which protects the entire chip even the #WP is
-- * disabled. Lock/unlock protection area can be partition according to
-- * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on.
-- */
--static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len)
--{
--	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
--	int ret;
--
--	feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK;
--	nand_select_target(chip, 0);
--	ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
--				feature);
--	nand_deselect_target(chip);
--	if (ret)
--		pr_err("%s all blocks failed\n", __func__);
--
--	return ret;
--}
--
--static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len)
--{
--	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
--	int ret;
--
--	feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
--	nand_select_target(chip, 0);
--	ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
--				feature);
--	nand_deselect_target(chip);
--	if (ret)
--		pr_err("%s all blocks failed\n", __func__);
--
--	return ret;
--}
--
--static void macronix_nand_block_protection_support(struct nand_chip *chip)
--{
--	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
--	int ret;
--
--	bitmap_set(chip->parameters.get_feature_list,
--		   ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
--
--	feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
--	nand_select_target(chip, 0);
--	ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
--				feature);
--	nand_deselect_target(chip);
--	if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) {
--		if (ret)
--			pr_err("Block protection check failed\n");
--
--		bitmap_clear(chip->parameters.get_feature_list,
--			     ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
--		return;
--	}
--
--	bitmap_set(chip->parameters.set_feature_list,
--		   ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
--
--	chip->ops.lock_area = mxic_nand_lock;
--	chip->ops.unlock_area = mxic_nand_unlock;
--}
-+// /*
-+//  * Macronix NAND supports Block Protection by Protectoin(PT) pin;
-+//  * active high at power-on which protects the entire chip even the #WP is
-+//  * disabled. Lock/unlock protection area can be partition according to
-+//  * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on.
-+//  */
-+// static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len)
-+// {
-+// 	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
-+// 	int ret;
-+
-+// 	feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK;
-+// 	nand_select_target(chip, 0);
-+// 	ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
-+// 				feature);
-+// 	nand_deselect_target(chip);
-+// 	if (ret)
-+// 		pr_err("%s all blocks failed\n", __func__);
-+
-+// 	return ret;
-+// }
-+
-+// static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len)
-+// {
-+// 	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
-+// 	int ret;
-+
-+// 	feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
-+// 	nand_select_target(chip, 0);
-+// 	ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
-+// 				feature);
-+// 	nand_deselect_target(chip);
-+// 	if (ret)
-+// 		pr_err("%s all blocks failed\n", __func__);
-+
-+// 	return ret;
-+// }
-+
-+// static void macronix_nand_block_protection_support(struct nand_chip *chip)
-+// {
-+// 	u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
-+// 	int ret;
-+
-+// 	bitmap_set(chip->parameters.get_feature_list,
-+// 		   ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
-+
-+// 	feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
-+// 	nand_select_target(chip, 0);
-+// 	ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
-+// 				feature);
-+// 	nand_deselect_target(chip);
-+// 	if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) {
-+// 		if (ret)
-+// 			pr_err("Block protection check failed\n");
-+
-+// 		bitmap_clear(chip->parameters.get_feature_list,
-+// 			     ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
-+// 		return;
-+// 	}
-+
-+// 	bitmap_set(chip->parameters.set_feature_list,
-+// 		   ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
-+
-+// 	chip->ops.lock_area = mxic_nand_lock;
-+// 	chip->ops.unlock_area = mxic_nand_unlock;
-+// }
- 
- static int nand_power_down_op(struct nand_chip *chip)
- {

target/linux/bmips/patches-5.15/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch

@@ -1,7 +1,7 @@
 From 590b60fb08cb1e70fe02d3f407c6b3dbe9ad06ff Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
 Date: Mon, 1 Mar 2021 07:34:39 +0100
-Subject: [PATCH 3/4] net: broadcom: add BCM6368 enetsw controller driver
+Subject: [PATCH] net: broadcom: add BCM6368 enetsw controller driver
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
 Content-Transfer-Encoding: 8bit
@@ -11,11 +11,9 @@ SoCs.
 
 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 ---
- drivers/net/ethernet/broadcom/Kconfig         |    8 +
+ drivers/net/ethernet/broadcom/Kconfig  | 8 ++++++++
- drivers/net/ethernet/broadcom/Makefile        |    1 +
+ drivers/net/ethernet/broadcom/Makefile | 1 +
- .../net/ethernet/broadcom/bcm6368-enetsw.c    | 1111 +++++++++++++++++
+ 2 files changed, 9 insertions(+)
- 3 files changed, 1120 insertions(+)
- create mode 100644 drivers/net/ethernet/broadcom/bcm6368-enetsw.c
 
 --- a/drivers/net/ethernet/broadcom/Kconfig
 +++ b/drivers/net/ethernet/broadcom/Kconfig

target/linux/bmips/patches-5.15/501-net-broadcom-add-BCM6348-enet-controller-driver.patch

@@ -10,10 +10,9 @@ This controller is present on BCM6338, BCM6348 and BCM6358 SoCs.
 
 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 ---
- drivers/net/ethernet/broadcom/Kconfig         |    8 +
+ drivers/net/ethernet/broadcom/Kconfig  | 8 ++++++++
- drivers/net/ethernet/broadcom/Makefile        |    1 +
+ drivers/net/ethernet/broadcom/Makefile | 1 +
- 3 files changed, 1120 insertions(+)
+ 2 files changed, 9 insertions(+)
- create mode 100644 drivers/net/ethernet/broadcom/bcm6368-enetsw.c
 
 --- a/drivers/net/ethernet/broadcom/Kconfig
 +++ b/drivers/net/ethernet/broadcom/Kconfig

target/linux/bmips/patches-5.15/502-net-mdio-mux-bcm6368-allow-disabling.patch

@@ -1,3 +1,16 @@
+From 21145a89c79a22c4fb719cce5a2f4e3373d39756 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 17 May 2023 18:16:46 +0200
+Subject: [PATCH] net: mdio: mux-bcm6368: allow disabling for bmips
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ drivers/net/mdio/Kconfig | 1 -
+ 1 file changed, 1 deletion(-)
+
 --- a/drivers/net/mdio/Kconfig
 +++ b/drivers/net/mdio/Kconfig
 @@ -219,7 +219,6 @@ config MDIO_BUS_MUX_BCM6368

target/linux/bmips/patches-5.15/600-mips-bmips-add-pci-support.patch

@@ -1,3 +1,17 @@
+From 7742c1ba191a005a1356ff89b5fe2279d6f0ec4d Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 17 May 2023 18:18:43 +0200
+Subject: [PATCH] mips: bmips: add PCI support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ arch/mips/Kconfig      | 1 +
+ arch/mips/pci/Makefile | 1 +
+ 2 files changed, 2 insertions(+)
+
 --- a/arch/mips/Kconfig
 +++ b/arch/mips/Kconfig
 @@ -274,6 +274,7 @@ config BMIPS_GENERIC

target/linux/bmips/patches-5.15/601-pci-controllers-add-bcm6328-pcie-support.patch

@@ -1,3 +1,17 @@
+From 49133041e0a5770decf1a25f575764d13a0d425c Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 17 May 2023 18:20:10 +0200
+Subject: [PATCH] pci: add bcm6328-pcie support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ drivers/pci/controller/Kconfig  | 5 +++++
+ drivers/pci/controller/Makefile | 1 +
+ 2 files changed, 6 insertions(+)
+
 --- a/drivers/pci/controller/Kconfig
 +++ b/drivers/pci/controller/Kconfig
 @@ -3,6 +3,11 @@

target/linux/bmips/patches-5.15/602-pci-controllers-add-bcm6318-pcie-support.patch

@@ -1,3 +1,17 @@
+From cc3c30bdc98eabbaa07c64302eb5124a0f4a74f0 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 17 May 2023 18:20:46 +0200
+Subject: [PATCH] pci: add bcm6318-pcie support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ drivers/pci/controller/Kconfig  | 5 +++++
+ drivers/pci/controller/Makefile | 1 +
+ 2 files changed, 6 insertions(+)
+
 --- a/drivers/pci/controller/Kconfig
 +++ b/drivers/pci/controller/Kconfig
 @@ -3,6 +3,11 @@

target/linux/bmips/patches-5.15/603-pci-controllers-add-bcm6348-pci-support.patch

@@ -1,3 +1,17 @@
+From 5e7813e5725d79d00e0988472c306490fc48b3e1 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 17 May 2023 18:21:19 +0200
+Subject: [PATCH] pci: add bcm6348-pci support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ drivers/pci/controller/Kconfig  | 5 +++++
+ drivers/pci/controller/Makefile | 1 +
+ 2 files changed, 6 insertions(+)
+
 --- a/drivers/pci/controller/Kconfig
 +++ b/drivers/pci/controller/Kconfig
 @@ -3,6 +3,11 @@

target/linux/bmips/patches-5.15/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch

@@ -13,8 +13,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 ---
  drivers/leds/Kconfig  | 9 +++++++++
  drivers/leds/Makefile | 1 +
- drivers/spi/spidev.c  | 2 ++
+ 2 files changed, 10 insertions(+)
- 3 files changed, 12 insertions(+)
 
 --- a/drivers/leds/Kconfig
 +++ b/drivers/leds/Kconfig