mac80211: ath9k: avoid a double reset
The original OF code effectively does a reset at ahb.c but then again in hw.c. For AR9330, it's already done in the driver and with the others, there are patches in here that do the same. hw.c looks like the proper place to handle this. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://github.com/openwrt/openwrt/pull/19031 Signed-off-by: Robert Marko <robimarko@gmail.com>
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1 changed files with 2 additions and 5 deletions
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@ -102,7 +102,7 @@
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int ret;
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int ret;
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if (!of_device_is_available(np))
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if (!of_device_is_available(np))
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@@ -677,6 +758,46 @@ static int ath9k_of_init(struct ath_soft
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@@ -677,6 +758,43 @@ static int ath9k_of_init(struct ath_soft
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ath_dbg(common, CONFIG, "parsing configuration from OF node\n");
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ath_dbg(common, CONFIG, "parsing configuration from OF node\n");
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@ -115,13 +115,11 @@
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+#ifdef CONFIG_ATH79
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+#ifdef CONFIG_ATH79
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+ if (ah->hw_version.devid == AR5416_AR9100_DEVID) {
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+ if (ah->hw_version.devid == AR5416_AR9100_DEVID) {
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+ ah->external_reset = ar913x_wmac_reset;
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+ ah->external_reset = ar913x_wmac_reset;
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+ ah->external_reset();
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+ } else if (ah->hw_version.devid == AR9300_DEVID_AR9330) {
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+ } else if (ah->hw_version.devid == AR9300_DEVID_AR9330) {
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+ ah->get_mac_revision = ar9330_get_soc_revision;
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+ ah->get_mac_revision = ar9330_get_soc_revision;
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+ u32 t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
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+ u32 t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
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+ ah->is_clk_25mhz = !(t & AR933X_BOOTSTRAP_REF_CLK_40);
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+ ah->is_clk_25mhz = !(t & AR933X_BOOTSTRAP_REF_CLK_40);
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+ ah->external_reset = ar933x_wmac_reset;
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+ ah->external_reset = ar933x_wmac_reset;
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+ ah->external_reset();
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+ } else if (ah->hw_version.devid == AR9300_DEVID_AR9340) {
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+ } else if (ah->hw_version.devid == AR9300_DEVID_AR9340) {
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+ ah->get_mac_revision = ath79_get_soc_revision;
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+ ah->get_mac_revision = ath79_get_soc_revision;
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+ u32 t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
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+ u32 t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
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@ -138,7 +136,6 @@
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+ u32 t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP);
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+ u32 t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP);
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+ ah->is_clk_25mhz = !(t & QCA955X_BOOTSTRAP_REF_CLK_40);
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+ ah->is_clk_25mhz = !(t & QCA955X_BOOTSTRAP_REF_CLK_40);
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+ ah->external_reset = qca955x_wmac_reset;
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+ ah->external_reset = qca955x_wmac_reset;
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+ ah->external_reset();
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+ } else if (ah->hw_version.devid == AR9300_DEVID_QCA956X) {
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+ } else if (ah->hw_version.devid == AR9300_DEVID_QCA956X) {
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+ ah->get_mac_revision = ath79_get_soc_revision;
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+ ah->get_mac_revision = ath79_get_soc_revision;
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+ u32 t = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP);
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+ u32 t = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP);
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@ -149,7 +146,7 @@
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if (of_property_read_bool(np, "qca,no-eeprom")) {
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if (of_property_read_bool(np, "qca,no-eeprom")) {
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/* ath9k-eeprom-<bus>-<id>.bin */
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/* ath9k-eeprom-<bus>-<id>.bin */
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scnprintf(eeprom_name, sizeof(eeprom_name),
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scnprintf(eeprom_name, sizeof(eeprom_name),
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@@ -693,6 +814,17 @@ static int ath9k_of_init(struct ath_soft
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@@ -693,6 +811,17 @@ static int ath9k_of_init(struct ath_soft
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of_get_mac_address(np, common->macaddr);
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of_get_mac_address(np, common->macaddr);
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