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qualcommax: ipq50xx: remove ECC user config from board files

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With the spi-qpic-snand driver now supporting reading ECC requirements
from the NAND chip itself, there's no need to set those in the DTS
anymore avoiding issues with devices of the same revision using
different NAND types with varying ECC requirements.

Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18723
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
George Moussalem 2025-05-06 10:18:09 +04:00 committed by Robert Marko
parent c5e359a236
commit 01b72ce61e
4 changed files with 0 additions and 15 deletions
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2
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-gl-b3000.dts
View file

@ -226,8 +226,6 @@
#size-cells = <1>;
nand-ecc-engine = <&qpic_nand>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {

6
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-mr5500.dts
View file

@ -28,12 +28,6 @@
};
};
&qpic_nand {
nand@0 {
nand-ecc-strength = <4>;
};
};
/*
* ===============================================================
* _______________________ _______________________

3
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-mx-base.dtsi
View file

@ -130,9 +130,6 @@
#size-cells = <1>;
nand-ecc-engine = <&qpic_nand>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {

4
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-wrc-x3000gs2.dts
View file

@ -164,10 +164,6 @@
#size-cells = <1>;
nand-ecc-engine = <&qpic_nand>;
/* strength=8 breaks NAND I/O, use 4 instead */
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {