2020-11-30 10:51:16 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qcom-ipq8064-v2.0.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Ubiquiti UniFi AC HD";
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compatible = "ubnt,unifi-ac-hd", "qcom,ipq8064";
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aliases {
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label-mac-device = &gmac2;
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led-boot = &led_dome_white;
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led-failsafe = &led_dome_white;
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led-running = &led_dome_blue;
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led-upgrade = &led_dome_blue;
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mdio-gpio0 = &mdio0;
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ipq806x: ubnt,unifi-ac-hd: reorder eth0 and eth1
The Ubiquiti UniFi AC HD (UAP-AC-HD, UAP301) has two Ethernet ports,
labeled MAIN and SECONDARY, connected to gmac2 and gmac1, respectively.
The standard probe order results in gmac1/SECONDARY being eth0 and
gmac2/MAIN being eth1. This does not match the stock firmware, is
contrary to user expectation, causes the wrong (high) MAC address to be
used in a bridged configuration (the default for this device), and makes
the gmac2/MAIN port unusable in the preinit environment (such as for
failsafe). Until a recent patch, gmac1/SECONDARY (eth0) was not even
usable.
This reorders the ports so that gmac2/MAIN is eth0, and the now-working
gmac1/SECONDARY is eth1. eth0 has the low MAC address and eth1 has the
high; when bridged, the bridge takes on the correct low MAC address.
This matches the stock firmware. The MAIN port is usable for failsafe
during preinit.
This device does not have a switch on board, so there's no possibility
to remap ports via switch configuration. "ip link set $interface name"
is used instead, during preinit before networking is configured.
Signed-off-by: Mark Mentovai <mark@moxienet.com>
Build-tested: ipq806x/ubnt,unifi-ac-hd
Run-tested: ipq806x/ubnt,unifi-ac-hd
2021-04-12 15:59:20 +00:00
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ethernet0 = &gmac2;
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ethernet1 = &gmac1;
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2020-11-30 10:51:16 +00:00
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&led_pins>;
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pinctrl-names = "default";
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led_dome_blue: dome_blue {
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label = "blue:dome";
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gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
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};
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led_dome_white: dome_white {
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label = "white:dome";
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gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
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};
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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reset {
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label = "reset";
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gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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debounce-interval = <60>;
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2021-04-08 13:09:32 +00:00
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wakeup-source;
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2020-11-30 10:51:16 +00:00
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};
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};
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};
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&qcom_pinmux {
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button_pins: button_pins {
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mux {
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pins = "gpio68";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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led_pins: led_pins {
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mux {
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pins = "gpio9", "gpio53";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-down;
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output-low;
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};
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};
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spi_pins: spi_pins {
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mux {
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pins = "gpio18", "gpio19", "gpio21";
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function = "gsbi5";
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drive-strength = <10>;
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bias-none;
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};
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cs {
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pins = "gpio20";
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drive-strength = <12>;
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};
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};
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};
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&CPU_SPC {
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status = "disabled";
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};
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&gsbi5 {
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status = "okay";
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qcom,mode = <GSBI_PROT_SPI>;
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spi@1a280000 {
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status = "okay";
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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cs-gpios = <&qcom_pinmux 20 0>;
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flash@0 {
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compatible = "mx25u25635f", "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "SBL1";
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reg = <0x0 0x20000>;
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read-only;
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};
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partition@20000 {
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label = "MIBIB";
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reg = <0x20000 0x10000>;
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read-only;
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};
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partition@30000 {
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label = "SBL2";
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reg = <0x30000 0x20000>;
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read-only;
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};
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partition@50000 {
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label = "SBL3";
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reg = <0x50000 0x30000>;
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read-only;
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};
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partition@80000 {
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label = "DDRCONFIG";
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reg = <0x80000 0x10000>;
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read-only;
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};
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partition@90000 {
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label = "SSD";
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2021-01-14 13:55:22 +00:00
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reg = <0x90000 0x10000>;
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2020-11-30 10:51:16 +00:00
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read-only;
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};
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partition@a0000 {
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label = "TZ";
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reg = <0xa0000 0x30000>;
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read-only;
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};
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partition@d0000 {
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label = "RPM";
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reg = <0xd0000 0x20000>;
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read-only;
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};
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partition@f0000 {
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label = "APPSBL";
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reg = <0xf0000 0xc0000>;
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read-only;
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};
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partition@1b0000 {
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label = "APPSBLENV";
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reg = <0x1b0000 0x10000>;
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read-only;
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};
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eeprom: partition@1c0000 {
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label = "EEPROM";
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reg = <0x1c0000 0x10000>;
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read-only;
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};
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partition@1d0000 {
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label = "bootselect";
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reg = <0x1d0000 0x10000>;
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};
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partition@1e0000 {
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compatible = "denx,fit";
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label = "firmware";
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reg = <0x1e0000 0xe70000>;
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};
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partition@1050000 {
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label = "kernel1";
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reg = <0x1050000 0xe70000>;
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read-only;
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};
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partition@1ec0000 {
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label = "debug";
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reg = <0x1ec0000 0x100000>;
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read-only;
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};
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partition@1fc0000 {
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label = "cfg";
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reg = <0x1fc0000 0x40000>;
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read-only;
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};
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};
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};
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};
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};
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&adm_dma {
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status = "okay";
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};
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&nand_controller {
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status = "okay";
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pinctrl-0 = <&nand_pins>;
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pinctrl-names = "default";
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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};
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&mdio0 {
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status = "okay";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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2021-04-12 15:59:19 +00:00
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phy4: ethernet-phy@4 {
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reg = <4>;
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};
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2020-11-30 10:51:16 +00:00
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2021-04-12 15:59:19 +00:00
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phy5: ethernet-phy@5 {
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reg = <5>;
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2020-11-30 10:51:16 +00:00
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};
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};
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&gmac1 {
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status = "okay";
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2021-04-12 15:59:19 +00:00
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mdiobus = <&mdio0>;
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phy-handle = <&phy5>;
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2020-11-30 10:51:16 +00:00
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phy-mode = "sgmii";
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qcom,id = <1>;
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2021-04-02 21:38:11 +00:00
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nvmem-cells = <&macaddr_eeprom_6>;
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nvmem-cell-names = "mac-address";
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2021-04-12 15:59:19 +00:00
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};
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2020-11-30 10:51:16 +00:00
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2021-04-12 15:59:19 +00:00
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&gmac2 {
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status = "okay";
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mdiobus = <&mdio0>;
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phy-handle = <&phy4>;
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phy-mode = "sgmii";
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qcom,id = <2>;
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2021-04-02 21:38:11 +00:00
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nvmem-cells = <&macaddr_eeprom_0>;
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nvmem-cell-names = "mac-address";
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2020-11-30 10:51:16 +00:00
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};
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&pcie0 {
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status = "okay";
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};
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&pcie1 {
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status = "okay";
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};
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&tcsr {
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status = "okay";
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};
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&hs_phy_0 {
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status = "okay";
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};
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&ss_phy_0 {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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};
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&hs_phy_1 {
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status = "okay";
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};
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&ss_phy_1 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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2021-04-02 21:38:11 +00:00
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&eeprom {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_eeprom_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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macaddr_eeprom_6: macaddr@6 {
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reg = <0x6 0x6>;
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};
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};
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