60 lines
1.7 KiB
Diff
60 lines
1.7 KiB
Diff
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From 4d5ce89b5a6faa347464221e4b674be46b951245 Mon Sep 17 00:00:00 2001
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From: Wen He <wen.he_1@nxp.com>
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Date: Wed, 27 Nov 2019 18:24:11 +0800
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Subject: [PATCH] drm: imx: mhdp: Adjustment core rate of DP TX CTRL for
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LS1028A
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This Display TX CTRL clock should be ACLK/4, update it to align with
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the specification.
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Signed-off-by: Wen He <wen.he_1@nxp.com>
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Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
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---
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drivers/gpu/drm/bridge/cadence/cdns-dp-core.c | 4 ++++
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drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c | 3 +++
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include/drm/bridge/cdns-mhdp-common.h | 1 +
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3 files changed, 8 insertions(+)
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--- a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c
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+++ b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c
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@@ -435,6 +435,7 @@ static int __cdns_dp_probe(struct platfo
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}
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mhdp->is_hpd = true;
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+ mhdp->is_ls1028a = false;
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mhdp->irq[IRQ_IN] = platform_get_irq_byname(pdev, "plug_in");
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if (mhdp->irq[IRQ_IN] < 0) {
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@@ -450,6 +451,9 @@ static int __cdns_dp_probe(struct platfo
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cdns_dp_parse_dt(mhdp);
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+ if (of_device_is_compatible(dev->of_node, "cdn,ls1028a-dp"))
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+ mhdp->is_ls1028a = true;
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+
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cdns_mhdp_plat_call(mhdp, power_on);
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cdns_mhdp_plat_call(mhdp, firmware_init);
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--- a/drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c
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+++ b/drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c
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@@ -526,6 +526,9 @@ int cdns_mhdp_firmware_init_imx8qm(struc
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/* configure HDMI/DP core clock */
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rate = clk_get_rate(imx_mhdp->clks.clk_core);
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+ if (mhdp->is_ls1028a)
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+ rate = rate / 4;
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+
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cdns_mhdp_set_fw_clk(&imx_mhdp->mhdp, rate);
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/* un-reset ucpu */
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--- a/include/drm/bridge/cdns-mhdp-common.h
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+++ b/include/drm/bridge/cdns-mhdp-common.h
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@@ -685,6 +685,7 @@ struct cdns_mhdp_device {
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bool power_up;
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bool plugged;
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bool is_hpd;
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+ bool is_ls1028a;
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struct mutex lock;
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struct mutex iolock;
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