2018-05-06 08:20:11 +00:00
|
|
|
#!/bin/sh
|
|
|
|
|
|
2019-09-22 09:57:13 +00:00
|
|
|
[ -e /lib/firmware/$FIRMWARE ] && exit 0
|
2018-05-06 08:20:11 +00:00
|
|
|
|
2019-09-22 09:57:13 +00:00
|
|
|
. /lib/functions/caldata.sh
|
|
|
|
|
. /lib/functions/k2t.sh
|
2018-05-06 08:20:11 +00:00
|
|
|
|
|
|
|
|
board=$(board_name)
|
|
|
|
|
|
|
|
|
|
case "$FIRMWARE" in
|
|
|
|
|
"ath10k/cal-pci-0000:00:00.0.bin")
|
|
|
|
|
case $board in
|
ath79: add support for ALLNET ALL-WAP02860AC
ALLNET ALL-WAP02860AC is a dual-band wireless access point.
Specification
SoC: Qualcomm Atheros QCA9558
RAM: 128 MB DDR2
Flash: 16 MB SPI NOR
WIFI: 2.4 GHz 3T3R integrated
5 GHz 3T3R QCA9880 Mini PCIe card
Ethernet: 1x 10/100/1000 Mbps AR8035-A, PoE capable (802.3at)
LEDS: 5x, which four are GPIO controlled
Buttons: 1x GPIO controlled
UART: 4 pin header near Mini PCIe card, starting count from white
triangle on PCB
1. VCC 3.3V, 2. GND, 3. TX, 4. RX
baud: 115200, parity: none, flow control: none
MAC addresses
Calibration data does not contain valid MAC addresses.
The calculated MAC addresses are chosen in accordance with OEM firmware.
Because of:
a) constrained environment (SNMP) when connecting through Telnet
or SSH,
b) hard-coded kernel and rootfs sizes,
c) checksum verification of kerenel and rootfs images in bootloder,
creating factory image accepted by OEM web interface is difficult,
therefore, to install OpenWrt on this device UART connection is needed.
The teardown is simple, unscrew four screws to disassemble the casing,
plus two screws to separate mainboard from the casing.
Before flashing, be sure to have a copy of factory firmware, in case You
wish to revert to original firmware.
Installation
1. Prepare TFTP server with OpenWrt initramfs-kernel image.
2. Connect to LAN port.
3. Connect to UART port.
4. Power on the device and when prompted to stop autoboot, hit any key.
5. Alter U-Boot environment with following commands:
setenv failsafe_boot bootm 0x9f0a0000
saveenv
6. Adjust "ipaddr" and "serverip" addresses in U-Boot environment, use
'setenv' to do that, then run following commands:
tftpboot 0x81000000 <openwrt_initramfs-kernel_image_name>
bootm 0x81000000
7. Wait about 1 minute for OpenWrt to boot.
8. Transfer OpenWrt sysupgrade image to /tmp directory and flash it
with:
sysupgrade -n /tmp/<openwrt_sysupgrade_image_name>
9. After flashing, the access point will reboot to OpenWrt. Wait few
minutes, until the Power LED stops blinking, then it's ready for
configuration.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
[add MAC address comment to commit message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-08-14 16:03:40 +00:00
|
|
|
allnet,all-wap02860ac|\
|
|
|
|
|
glinet,gl-x750)
|
|
|
|
|
caldata_extract "art" 0x5000 0x844
|
|
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x0) +2)
|
|
|
|
|
;;
|
2020-05-14 08:44:21 +00:00
|
|
|
avm,fritz1750e|\
|
|
|
|
|
avm,fritzdvbc)
|
2020-04-12 11:33:01 +00:00
|
|
|
caldata_extract "urlader" 0x198a 0x844
|
|
|
|
|
;;
|
2019-03-31 04:26:22 +00:00
|
|
|
comfast,cf-wr650ac-v1|\
|
|
|
|
|
comfast,cf-wr650ac-v2|\
|
ath79: add support for Devolo Magic 2 WIFI
This patch support Devolo Magic 2 WIFI, board devolo_dlan2-2400-ac.
This device is a plc wifi AC2400 router/extender with 2 Ethernet
ports, has a G.hn PLC and uses LCMP protocol from Home Grid Forum.
Hardware:
SoC: AR9344
CPU: 560 MHz
Flash: 16 MiB (W25Q128JVSIQ)
RAM: 128 MiB DDR2
Ethernet: 2xLAN 10/100/1000
PLC: 88LX5152 (MaxLinear G.hn)
PLC Flash: W25Q32JVSSIQ
PLC Uplink: 1Gbps MIMO
PLC Link: RGMII 1Gbps (WAN)
WiFi: Atheros AR9340 2.4GHz 802.11bgn
Atheros AR9882-BR4A 5GHz 802.11ac
Switch: QCA8337, Port0:CPU, Port2:PLC, Port3:LAN1, Port4:LAN2
Button: 3x Buttons (Reset, wifi and plc)
LED: 3x Leds (wifi, plc white, plc red)
GPIO Switch: 11-PLC Pairing (Active Low)
13-PLC Enable
21-WLAN power
MACs Details verified with the stock firmware:
Radio1: 2.4 GHz &wmac *:4c Art location: 0x1002
Radio0: 5.0 GHz &pcie *:4d Art location: 0x5006
Ethernet ðernet *:4e = 2.4 GHz + 2
PLC uplink --- *:4f = 2.4 GHz + 3
Label MAC address is from PLC uplink
OEM SSID: echo devolo-$(grep SerialNumber /dev/mtd1 | grep -o ...$)
OEM WiFi password: grep DlanSecurityID /dev/mtd1|tr -d -|cut -d'=' -f 2
Recommendations: Configure and link your PLC with OEM firmware
BEFORE you flash the device. PLC configuration/link should
remain in different memory and should work straight forward
after flashing.
Restrictions: PLC link detection to trigger plc red led is not
available. PLC G.hn chip is not compatible with open-plc-tools,
it uses LCMP protocol with AES-128 and requires different
software.
Notes: Pairing should be possible with gpio switch. Default
configuration will trigger wifi led with 2.4Ghz wifi traffic
and plc white led with wan traffic.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.100
2. Download the sysupgrade image and rename it to uploadfile
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Allow 1-2 minutes for the first boot.
Signed-off-by: Manuel Giganto <mgigantoregistros@gmail.com>
2019-09-16 10:25:23 +00:00
|
|
|
devolo,magic-2-wifi|\
|
2019-11-22 13:42:47 +00:00
|
|
|
ubnt,unifiac-lite|\
|
|
|
|
|
ubnt,unifiac-lr|\
|
|
|
|
|
ubnt,unifiac-mesh|\
|
|
|
|
|
ubnt,unifiac-mesh-pro|\
|
|
|
|
|
ubnt,lap-120|\
|
2019-04-12 17:21:58 +00:00
|
|
|
ubnt,litebeam-ac-gen2|\
|
2019-11-22 13:42:47 +00:00
|
|
|
ubnt,nanobeam-ac|\
|
|
|
|
|
ubnt,nanostation-ac|\
|
|
|
|
|
ubnt,nanostation-ac-loco|\
|
2020-04-24 00:22:44 +00:00
|
|
|
ubnt,powerbeam-5ac-500|\
|
2020-03-12 10:37:10 +00:00
|
|
|
ubnt,powerbeam-5ac-gen2|\
|
2019-11-22 13:42:47 +00:00
|
|
|
ubnt,unifiac-pro|\
|
2019-03-31 04:26:22 +00:00
|
|
|
yuncore,a770)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-03-31 04:26:22 +00:00
|
|
|
;;
|
2018-12-27 01:32:39 +00:00
|
|
|
devolo,dvl1200e|\
|
2019-01-01 18:17:23 +00:00
|
|
|
devolo,dvl1200i|\
|
2019-01-01 18:17:22 +00:00
|
|
|
devolo,dvl1750c|\
|
2019-01-20 16:46:42 +00:00
|
|
|
devolo,dvl1750e|\
|
2019-06-11 15:27:51 +00:00
|
|
|
devolo,dvl1750i|\
|
|
|
|
|
devolo,dvl1750x)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x0) -1)
|
2018-12-27 01:32:38 +00:00
|
|
|
;;
|
ath79: add support for D-Link DAP-2695-A1
Hardware:
* SoC: Qualcomm Atheros QCA9558
* RAM: 256MB
* Flash: 16MB SPI NOR
* Ethernet: 2x 10/100/1000 (1x 802.3at PoE-PD)
* WiFi 2.4GHz: Qualcomm Atheros QCA9558
* WiFi 5GHz: Qualcomm Ahteros QCA9880-2R4E
* LEDS: 1x 5GHz, 1x 2.4GHz, 1x LAN1(POE), 1x LAN2, 1x POWER
* Buttons: 1x RESET
* UART: 1x RJ45 RS-232 Console port
Installation via stock firmware:
* Install the factory image via the stock firmware web interface
Installation via bootloader Emergency Web Server:
* Connect your PC to the LAN1(PoE) port
* Configure your PC with IP address 192.168.0.90
* Open a serial console to the Console port (115200,8n1)
* Press "q" within 2s when "press 'q' to stop autoboot" appears
* Open http://192.168.0.50 in a browser
* Upload either the factory or the sysupgrade image
* Once you see "write image into flash...OK,dest addr=0x9f070000" you
can power-cycle the device. Ignore "checksum bad" messages.
Setting the MAC addresses for the ethernet interfaces via
/etc/board.d/02_network adds the following snippets to
/etc/config/network:
config device 'lan_eth0_1_dev'
option name 'eth0.1'
option macaddr 'xx:xx:xx:xx:xx:xx'
config device 'wan_eth1_2_dev'
option name 'eth1.2'
option macaddr 'xx:xx:xx:xx:xx:xx'
This would result in the proper MAC addresses being set for the VLAN
subinterfaces, but the parent interfaces would still have a random MAC
address. Using untagged VLANs could solve this, but would still leave
those extra snippets in /etc/config/network, and then the device VLAN
setup would differ from the one used in ar71xx. Therefore, the MAC
addresses of the ethernet interfaces are being set via preinit instead.
The bdcfg partition contains 4 MAC address labels:
- lanmac
- wanmac
- wlanmac
- wlanmac_a
The first 3 all contain the same MAC address, which is also the one on
the label.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Reviewed-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-06-07 23:11:34 +00:00
|
|
|
dlink,dap-2695-a1)
|
|
|
|
|
caldata_extract "art" 0x5000 0x844
|
|
|
|
|
ath10k_patch_mac $(mtd_get_mac_ascii bdcfg wlanmac_a)
|
|
|
|
|
;;
|
2018-12-29 09:22:32 +00:00
|
|
|
dlink,dir-859-a1)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(mtd_get_mac_ascii devdata "wlan5mac")
|
2018-12-29 09:22:32 +00:00
|
|
|
;;
|
2018-12-29 15:55:35 +00:00
|
|
|
elecom,wrc-1750ghbk2-i)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2018-12-29 15:55:35 +00:00
|
|
|
;;
|
2019-03-26 21:35:05 +00:00
|
|
|
engenius,ecb1750)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(mtd_get_mac_ascii u-boot-env athaddr)
|
2019-03-26 21:35:05 +00:00
|
|
|
;;
|
ath79: add suport for EnGenius EPG5000
EnGenius EPG5000 (v1.0.0, marketed as IoT Gateway) is a dual band
wireless router.
Specification
SoC: Qualcomm Atheros QCA9558
RAM: 256 MB DDR2
Flash: 16 MB SPI NOR
WIFI: 2.4 GHz 3T3R integrated
5 GHz 3T3R QCA9880 Mini PCIe card
Ethernet: 5x 10/100/1000 Mbps QCA8337N
USB: 1x 2.0
LEDS: 4x GPIO controlled
Buttons: 2x GPIO controlled
UART: 4 pin header, starting count from white triangle on PCB
1. VCC 3.3V, 2. GND, 3. TX, 4. RX
baud: 115200, parity: none, flow control: none
Installation
1. Connect to one of LAN (yellow) ethernet ports,
2. Open router configuration interface,
3. Go to Tools > Firmware,
4. Select OpenWrt factory image with dlf extension and hit Apply,
5. Wait few minutes, after the Power LED will stop blinking, the router
is ready for configuration.
Alternative installation
1. Prepare TFTP server with OpenWrt sysupgrade image,
2. Connect to one of LAN (yellow) ethernet ports,
3. Connect to UART port (leaving out VCC pin!),
4. Power on router,
5. When asked to enter a number 1 or 3 hit 2, this will select flashing
image from TFTP server option,
6. You'll be prompted to enter TFTP server ip (default is 192.168.99.8),
then router ip (default is 192.168.99.9) and for last, image name
downloaded from TFTP server (default is uImageESR1200_1750),
7. After providing all information U-Boot will start flashing the image,
You can observe progress on console, it'll take few minutes and when
the Power LED will stop blinking, router is ready for configuration.
Additional information
If connected to UART, when prompted for number on boot, one can enter
number 4 to open bootloader (U-Boot) command line.
OEM firmware shell password is: aigo3d0a0tdagr
useful for creating backup of original firmware.
When doing upgrade from OpenWrt ar71xx image, it is recomended to not keep
the old configuration.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
2019-03-04 14:18:53 +00:00
|
|
|
engenius,epg5000|\
|
|
|
|
|
iodata,wn-ac1167dgr|\
|
ath79: add support for Sitecom WLR-7100
Sitecom WLR-7100 v1 002 (marketed as X7 AC1200) is a dual band wireless
router.
Specification
SoC: Atheros AR1022
RAM: 64 MB DDR2
Flash: 8 MB SPI NOR
WIFI: 2.4 GHz 2T2R integrated
5 GHz 2T2R QCA9882 integrated (connected to PCIe lane)
Ethernet: 5x 10/100/1000 Mbps QCA8337N
USB: 1x 2.0
LEDS: 4x GPIO controlled, 5x switch
Buttons: 2x GPIO controlled
UART: row of 4 unpopulated holes near USB port, starting count from
white triangle on PCB
1. VCC 3.3V, 2. GND, 3. TX, 4. RX
baud: 115200, parity: none, flow control: none
Installation
1. Connect to one of LAN (yellow) ethernet ports,
2. Open router configuration interface,
3. Go to Toolbox > Firmware,
4. Browse for OpenWrt factory image with dlf extension and hit Apply,
5. Wait few minutes, after the Power LED will stop blinking, the router
is ready for configuration.
Known issues
5GHz LED doesn't work
Additional information
When TX line on UART is connected, and board is switched on from power
off state, the DDR memory training may fail.
If connected to UART, when prompted for number on boot, one can enter
number 4 to open bootloader (U-Boot) command line.
OEM firmware shell password is: SitecomSenao
useful for creating backup of original firmware.
There is also another revision of this device (v1 001), which may or may
not work with introduced images.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
2019-10-15 12:56:12 +00:00
|
|
|
iodata,wn-ac1600dgr2|\
|
ath79: add support for ZyXEL NBG6616
Specifications:
SoC: Qualcomm Atheros QCA9557
RAM: 128 MB (Nanya NT5TU32M16EG-AC)
Flash: 16 MB (Macronix MX25L12845EMI-10G)
Ethernet: 5x 10/100/1000 (1x WAN, 4x LAN)
Wireless: QCA9557 2.4GHz (nbg), QCA9882 5GHz (ac)
USB: 2x USB 2.0 port
Buttons: 1x Reset
Switches: 1x Wifi
LEDs: 11 (Pwr, WAN, 4x LAN, 2x Wifi, 2x USB, WPS)
MAC addresses:
WAN *:3f uboot-env ethaddr + 3
LAN *:3e uboot-env ethaddr + 2
2.4GHz *:3c uboot-env ethaddr
5GHz *:3d uboot-env ethaddr + 1
The label contains all four MAC addresses, however the one without
increment is first, so this one is taken for label MAC address.
Notes:
The Wifi is controlled by an on/off button, i.e. has to be implemented
by a switch (EV_SW). Despite, it appears that GPIO_ACTIVE_HIGH needs
to be used, just like recently fixed for the NBG6716.
Both parameters have been wrong at ar71xx.
Flash Instructions:
At first the U-Boot variables need to be changed in order to boot the
new combined image format. ZyXEL uses a split kernel + root setup and
the current kernel is too large to fit into the partition. As resizing
didnt do the trick, I've decided to use the prefered combined image
approach to be future-kernel-enlargement-proof (thanks to blocktrron for
the assistance).
First add a new variable called boot_openwrt:
setenv boot_openwrt bootm 0x9F120000
After that overwrite the bootcmd and save the environment:
setenv bootcmd run boot_openwrt
saveenv
After that you can flash the openwrt factory image via TFTP. The servers
IP has to be 192.168.1.33. Connect to one of the LAN ports and hold the
WPS Button while booting. After a few seconds the NBG6616 will look for
a image file called 'ras.bin' and flash it.
Return to vendor firmware is possible by resetting the bootcmd:
setenv bootcmd run boot_flash
saveenv
and flashing the vendor image via the TFTP method as described above.
Accessing the U-Boot Shell:
ZyXEL uses a proprietary loader/shell on top of u-boot: "ZyXEL zloader v2.02"
When the device is starting up, the user can enter the the loader shell
by simply pressing a key within the 3 seconds once the following string
appears on the serial console:
| Hit any key to stop autoboot: 3
The user is then dropped to a locked shell.
| NBG6616> ?
| ATEN x,(y) set BootExtension Debug Flag (y=password)
| ATSE x show the seed of password generator
| ATSH dump manufacturer related data in ROM
| ATRT (x,y,z,u) ATRT RAM read/write test (x=level, y=start addr, z=end addr, u=iterations
| ATGO boot up whole system
| ATUR x upgrade RAS image (filename)
In order to escape/unlock a password challenge has to be passed.
Note: the value is dynamic! you have to calculate your own!
First use ATSE $MODELNAME (MODELNAME is the hostname in u-boot env)
to get the challange value/seed.
| NBG6616> ATSE NBG6616
| 00C91D7EAC3C
This seed/value can be converted to the password with the help of this
bash script (Thanks to http://www.adslayuda.com/Zyxel650-9.html authors):
- tool.sh -
ror32() {
echo $(( ($1 >> $2) | (($1 << (32 - $2) & (2**32-1)) ) ))
}
v="0x$1"
a="0x${v:2:6}"
b=$(( $a + 0x10F0A563))
c=$(( 0x${v:12:14} & 7 ))
p=$(( $(ror32 $b $c) ^ $a ))
printf "ATEN 1,%X\n" $p
- end of tool.sh -
| # bash ./tool.sh 00C91D7EAC3C
| ATEN 1,10FDFF5
Copy and paste the result into the shell to unlock zloader.
| NBG6616> ATEN 1,10FDFF5
If the entered code was correct the shell will change to
use the ATGU command to enter the real u-boot shell.
| NBG6616> ATGU
| NBG6616#
Signed-off-by: Christoph Krapp <achterin@googlemail.com>
[move keys to DTSI, adjust usb_power DT label, remove kernel config
change, extend commit message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-08-09 11:00:05 +00:00
|
|
|
sitecom,wlr-7100|\
|
|
|
|
|
zyxel,nbg6616)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) +1)
|
ath79: add suport for EnGenius EPG5000
EnGenius EPG5000 (v1.0.0, marketed as IoT Gateway) is a dual band
wireless router.
Specification
SoC: Qualcomm Atheros QCA9558
RAM: 256 MB DDR2
Flash: 16 MB SPI NOR
WIFI: 2.4 GHz 3T3R integrated
5 GHz 3T3R QCA9880 Mini PCIe card
Ethernet: 5x 10/100/1000 Mbps QCA8337N
USB: 1x 2.0
LEDS: 4x GPIO controlled
Buttons: 2x GPIO controlled
UART: 4 pin header, starting count from white triangle on PCB
1. VCC 3.3V, 2. GND, 3. TX, 4. RX
baud: 115200, parity: none, flow control: none
Installation
1. Connect to one of LAN (yellow) ethernet ports,
2. Open router configuration interface,
3. Go to Tools > Firmware,
4. Select OpenWrt factory image with dlf extension and hit Apply,
5. Wait few minutes, after the Power LED will stop blinking, the router
is ready for configuration.
Alternative installation
1. Prepare TFTP server with OpenWrt sysupgrade image,
2. Connect to one of LAN (yellow) ethernet ports,
3. Connect to UART port (leaving out VCC pin!),
4. Power on router,
5. When asked to enter a number 1 or 3 hit 2, this will select flashing
image from TFTP server option,
6. You'll be prompted to enter TFTP server ip (default is 192.168.99.8),
then router ip (default is 192.168.99.9) and for last, image name
downloaded from TFTP server (default is uImageESR1200_1750),
7. After providing all information U-Boot will start flashing the image,
You can observe progress on console, it'll take few minutes and when
the Power LED will stop blinking, router is ready for configuration.
Additional information
If connected to UART, when prompted for number on boot, one can enter
number 4 to open bootloader (U-Boot) command line.
OEM firmware shell password is: aigo3d0a0tdagr
useful for creating backup of original firmware.
When doing upgrade from OpenWrt ar71xx image, it is recomended to not keep
the old configuration.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
2019-03-04 14:18:53 +00:00
|
|
|
;;
|
2019-06-05 13:31:32 +00:00
|
|
|
engenius,ews511ap)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +1)
|
2018-11-05 02:03:05 +00:00
|
|
|
;;
|
ath79: GL-AR750S: provide NAND support; increase kernel to 4 MB
The GL.iNet GL-AR750S has been supported by the ar71xx and ath79
platforms with access to its 16 MB NOR flash, but not its 128 MB
SPI NAND flash.
This commit provides support for the NAND through the upstream
SPI-NAND framework.
At this time, the OEM U-Boot appears to only support loading the
kernel from NOR. This configuration is preserved as this time,
with the glinet,gl-ar750s-nand name reserved for a potential,
future, NAND-only boot.
The family of GL-AR750S devices on the ath79 platform now includes:
* glinet,gl-ar750m-nor-nand "nand" target
* glinet,gl-ar750m-nor "nand" target (NAND-aware)
NB: This commit increases the kernel size from 2 MB to 4 MB
"Force-less" sysupgrade is presently supported from the current
versions of following NOR-based firmwre images to the version of
glinet,gl-ar750s-nor firmware produced by this commit:
* glinet,gl-ar750s -- OpenWrt 19.07 ar71xx
* glinet,gl-ar750s -- OpenWrt 19.07 ath79
Users who have sucessfully upgraded to glinet,gl-ar750m-nor may then
flash glinet,gl-ar750m-nor-nand with sysupgrade to transtion to the
NAND-based variant.
Other upgrades to these images, including directly to the NAND-based
glinet,gl-ar750s-nor-nand firmware, can be accomplished through U-Boot.
NB: See "ath79: restrict GL-AR750S kernel build-size to 2 MB" which
enables flashing of NAND factory.img with the current GL-iNet U-Boot,
"U-Boot 1.1.4-gcf378d80-dirty (Aug 16 2018 - 07:51:15)"
The GL-AR750S OEM U-Boot allows upload and flashing of either NOR
firmware (sysupgrade.bin) or NAND firmware (factory.img) through its
HTTP-based GUI. Serial connectivity is not required.
The glinet,gl-ar750s-nor and glinet,gl-ar750s-nor-nand images
generated after this commit flash each other directly.
This commit changes the control of the USB VBUS to gpio-hog from
regulator-fixed introduced by commit 0f6b944c92. This reduces the
compressed kernel size by ~14 kB, with no apparent loss of
functionality. No other ath79-nand boards are using regulator-fixed
at this time.
Note: mtd_get_mac_binary art 0x5006 does not return the proper MAC
and the GL.iNet source indicates that only the 0x0 offset is valid
The ar71xx targets are unmodified.
Cc: Alexander Wördekemper <alexwoerde@web.de>
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
2019-06-02 15:18:34 +00:00
|
|
|
glinet,gl-ar750)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x0) +1)
|
2019-06-05 13:31:32 +00:00
|
|
|
;;
|
2018-12-08 06:18:17 +00:00
|
|
|
nec,wg800hp)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(mtd_get_mac_text board_data 0x880)
|
2018-12-08 06:18:17 +00:00
|
|
|
;;
|
2019-03-21 15:43:27 +00:00
|
|
|
ocedo,koala|\
|
|
|
|
|
ocedo,ursus)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(mtd_get_mac_binary art 0xc)
|
2018-08-08 20:13:44 +00:00
|
|
|
;;
|
2018-08-02 07:14:10 +00:00
|
|
|
openmesh,om5p-ac-v2)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +16)
|
2018-05-06 08:20:11 +00:00
|
|
|
;;
|
2019-07-15 11:43:31 +00:00
|
|
|
qihoo,c301)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "radiocfg" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(mtd_get_mac_ascii devdata wlan5mac)
|
2019-07-15 11:43:31 +00:00
|
|
|
;;
|
2019-06-05 13:31:32 +00:00
|
|
|
tplink,archer-a7-v5|\
|
2019-06-05 13:59:30 +00:00
|
|
|
tplink,archer-c2-v3|\
|
2019-06-05 13:31:32 +00:00
|
|
|
tplink,archer-c7-v4|\
|
2019-06-11 11:28:02 +00:00
|
|
|
tplink,archer-c7-v5|\
|
|
|
|
|
tplink,archer-c25-v1)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary info 0x8) -1)
|
2019-06-05 13:31:32 +00:00
|
|
|
;;
|
2019-02-25 18:27:28 +00:00
|
|
|
tplink,archer-c5-v1|\
|
2018-08-02 07:14:10 +00:00
|
|
|
tplink,archer-c7-v2)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary u-boot 0x1fc00) -1)
|
2018-12-24 02:36:59 +00:00
|
|
|
;;
|
2019-07-09 11:05:46 +00:00
|
|
|
tplink,archer-d50-v1)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary romfile 0xf100) +2)
|
2019-07-09 11:05:46 +00:00
|
|
|
;;
|
ath79: add support for TP-Link Archer D7/D7b v1
TP-Link Archer D7 v1 is a dual-band AC1750 router + modem.
The router section is based on Qualcomm/Atheros QCA9558 + QCA9880.
The "DSL" section is based on BCM6318 but it's currently not supported.
The Archer D7b seems to differ from the Archer D7 only in the
partition table.
Router section - Specification:
775/650/258 MHz (CPU/DDR/AHB)
128 MB of RAM (DDR2)
16 MB of FLASH (SPI NOR)
3T3R 2.4 GHz
3T3R 5 GHz
4x 10/100/1000 Mbps Ethernet
7x LED, 2x button
UART header on PCB
Known issues:
- Broadband LED (missing GPIO - probably driven by the BCM6318)
- Internet LED (missing GPIO - probably driven by the BCM6318)
- WIFI LED (working only for one interface at a time, while in the
OEM firmware works for both wifi interfaces; thus, this patch does
not set a trigger by default)
- DSL not working (eth0)
UART connection
---------------
J1 HEADER (Qualcomm CPU)
. VCC
. GND
. RX
O TX
J41 HEADER (Broadcom CPU)
. VCC
. GND
. RX
O TX
The following instructions require a connection to the J1 UART header
and are tested for the Archer D7 v1.
For the Archer D7b v1, names should be changed accordingly.
Flash instructions under U-Boot, using UART
------------------------------------------
1. Press "tpl" to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d7-v1-squashfs-sysupgrade.bin
erase 0x9f020000 +f90000
cp.b 0x81000000 0x9f020000 0xf90000
reset
Initramfs instructions under U-Boot for testing, using UART
----------------------------------------------------------
1. Press "tpl" to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d7-v1-initramfs-kernel.bin
bootm 0x81000000
4. Here you can backup the original firmware and/or flash the sysupgrade openwrt if you want
Restore the original firmware
-----------------------------
0. Backup every partition using the OpenWrt web interface
1. Download the OEM firmware from the TP-Link website
2. Extract the bin file in a folder (eg. Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin)
3. Remove the U-Boot and the Broadcom image part from the file.
Issue the following command:
dd if="Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin" of="Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin.mod" skip=257 bs=512 count=31872
4. Double check the .mod file size. It must be 16318464 bytes.
5. Flash it using the OpenWrt web interface. Force the update if needed.
WARNING: Remember to NOT keep settings.
5b. (Alternative to 5.) Flash it using the U-Boot and UART connection.
Issue below commands in the U-Boot:
tftpboot 0x81000000 Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin.mod
erase 0x9f020000 +f90000
cp.b 0x81000000 0x9f020000 0xf90000
reset
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
[cosmetic DTS changes, remove TPLINK_HWREVADD := 0, do not use two
phyXtpt at once, add missing buttons, minor commit message adjustments]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-01-19 20:05:31 +00:00
|
|
|
tplink,archer-d7-v1|\
|
|
|
|
|
tplink,archer-d7b-v1)
|
|
|
|
|
caldata_extract "art" 0x5000 0x844
|
|
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary romfs 0xf100) +2)
|
|
|
|
|
;;
|
2019-03-11 17:50:42 +00:00
|
|
|
tplink,re350k-v1)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary config 0x10008) +2)
|
2019-06-05 13:31:32 +00:00
|
|
|
;;
|
2019-07-16 18:47:49 +00:00
|
|
|
tplink,re355-v1|\
|
|
|
|
|
tplink,re450-v1)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -2)
|
2019-07-16 18:47:49 +00:00
|
|
|
;;
|
2020-05-27 13:31:30 +00:00
|
|
|
tplink,re450-v2|\
|
|
|
|
|
tplink,re450-v3)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x844
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary info 0x8) +1)
|
2019-03-11 17:50:42 +00:00
|
|
|
;;
|
2020-07-09 10:49:17 +00:00
|
|
|
tplink,tl-wpa8630-v1)
|
|
|
|
|
caldata_extract "art" 0x5000 0x844
|
|
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary u-boot 0x0fc00) +1)
|
|
|
|
|
;;
|
ath79: add support for TP-Link TL-WR902AC v1
TP-Link TL-WR902AC v1 is a pocket-size, dual-band (AC750), successor of
TL-MR3020 (both devices use very similar enclosure, in same size). New
device is based on Qualcomm QCA9531 v2 + QCA9887. FCC ID: TE7WR902AC.
Specification:
- 650/391/216 MHz (CPU/DDR/AHB)
- 1x 10/100 Mbps Ethernet
- 1x USB 2.0 (GPIO-controlled power)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz (QCA9531)
- 1T1R 5 GHz (QCA9887)
- 5x LED (GPIO-controlled), 2x button, 1x 3-pos switch
- UART pads on PCB (TP1 -> TX, TP2 -> RX, TP3 -> GND, TP4 -> 3V3, jumper
resitors are missing on TX/RX lines)
- 1x micro USB (for power only)
Flash instructions:
Use "factory" image under vendor GUI.
Recovery instructions:
This device contains tftp recovery mode inside U-Boot. You can use it to
flash OpenWrt (use "factory" image) or vendor firmware.
1. Configure PC with static IP 192.168.0.66/24 and tftp server.
2. Rename "openwrt-ath79-generic-tplink_tl-wr902ac-v1-squashfs-factory.bin"
to "wr902acv1_un_tp_recovery.bin" and place it in tftp server dir.
3. Connect PC with LAN port, press the reset button, power up the router
and keep button pressed until WPS LED lights up.
4. Router will download file from server, write it to flash and reboot.
MAC Address summary:
- wlan1 (2.4GHz Wi-Fi): Label MAC
- wlan0 (5GHz Wi-Fi): Offset -1 from label
- eth0 (Wired): Offset +1 from label
Root access over serial line in vendor firmware: root/sohoadmin.
Based on support in ar71xx target by: Piotr Dymacz <pepe2k@gmail.com>
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
[remove size-cells from gpio-export]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-12-01 18:31:32 +00:00
|
|
|
tplink,tl-wr902ac-v1)
|
|
|
|
|
caldata_extract "art" 0x5000 0x844
|
|
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary tplink 0x8) -1)
|
|
|
|
|
;;
|
2018-05-06 08:20:11 +00:00
|
|
|
esac
|
|
|
|
|
;;
|
2019-11-04 17:05:38 +00:00
|
|
|
"ath10k/cal-pci-0000:01:00.0.bin")
|
|
|
|
|
case $board in
|
|
|
|
|
sitecom,wlr-8100)
|
|
|
|
|
caldata_extract "art" 0x5000 0x844
|
|
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) +1)
|
|
|
|
|
;;
|
|
|
|
|
esac
|
|
|
|
|
;;
|
2018-06-13 13:14:49 +00:00
|
|
|
"ath10k/pre-cal-pci-0000:00:00.0.bin")
|
|
|
|
|
case $board in
|
ath79: add support for COMFAST CF-E313AC
This patch adds support for the COMFAST CF-E313AC, an outdoor wireless
CPE with two Ethernet ports and a 802.11ac radio.
Specifications:
- QCA9531 SoC
- 650/400/216 MHz (CPU/DDR/AHB)
- 1x 10/100 Mbps WAN Ethernet, 48V PoE-in
- 1x 10/100 Mbps LAN Ethernet, pass-through 48V PoE-out
- 1x manual pass-through PoE switch
- 64 MB RAM (DDR2)
- 16 MB FLASH
- QCA9886 2T2R 5 GHz 802.11ac, 23 dBm
- 12 dBi built-in antenna
- POWER/LAN/WAN/WLAN green LEDs
- 4x RSSI LEDs (2x red, 2x green)
- UART (115200 8N1)
Flashing instructions:
The original firmware is based on OpenWrt so a sysupgrade image can be
installed via the stock web GUI. Settings from the original firmware
will be saved and restored on the new one, so a factory reset will be
needed. To do so, once the new firmware is flashed, enter into failsafe
mode by pressing the reset button several times during the boot
process, while the WAN LED flashes, until it starts flashing faster.
Once in failsafe mode, perform a factory reset as usual.
Alternatively, the U-boot bootloader contains a recovery HTTP server
to upload the firmware. Push the reset button while powering the
device on and keep it pressed for >10 seconds. The device's LEDs will
blink several times and the recovery page will be at
http://192.168.1.1; use it to upload the sysupgrade image.
Note:
Four MAC addresses are stored in the "art" partition (read-only):
- 0x0000: 40:A5:EF:AA:AA:A0
- 0x0006: 40:A5:EF:AA:AA:A2
- 0x1002: 40:A5:EF:AA:AA:A1
- 0x5006: 40:A5:EF:AA.AA:A3 (inside the 5 GHz calibration data)
The stock firmware assigns MAC addresses to physical and virtual
interfaces in a very particular way:
- eth0 corresponds to the physical Ethernet port labeled as WAN
- eth1 corresponds to the physical Ethernet port labeled as LAN
- eth0 belongs to the bridge interface br-wan
- eth1 belongs to the bridge interface br-lan
- eth0 is assigned the MAC from 0x0 (*:A0)
- eth1 is assigned the MAC from 0x1002 (*:A1)
- br-wan is forced to use the MAC from 0x1002 (*:A1)
- br-lan is forced to use the MAC from 0x0 (*:A0)
- radio0 uses the calibration data from 0x5000 (which contains
a valid MAC address, *:A3). However, it is overwritten by the
one at 0x6 (*:A2)
This commit preserves the LAN/WAN roles of the physical Ethernet
ports (as labeled on the router) and the MAC addresses they expose
by default (i.e., *:A0 on LAN, *:A1 on WAN), but swaps the position
of the eth0/eth1 compared to the stock firmware:
- eth0 corresponds to the physical Ethernet port labeled as LAN
- eth1 corresponds to the physical Ethernet port labeled as WAN
- eth0 belongs to the bridge interface br-lan
- eth1 is the interface at @wan
- eth0 is assigned the MAC from 0x0 (*:A0)
- eth1 is assigned the MAC from 0x1002 (*:A1)
- br-lan inherits the MAC from eth0 (*:A0)
- @wan inherits the MAC from eth1 (*:A1)
- radio0's MAC is overwritten to the one at 0x6
This way, eth0/eth1's positions differ from the stock firmware, but
the weird MAC ressignations in br-lan/br-wan are avoided while the
external behaviour of the router is maintained. Additionally, WAN
port is connected to the PHY gmac, allowing to monitor the link
status (e.g., to restart DHCP negotiation when plugging a cable).
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
2019-03-18 12:20:47 +00:00
|
|
|
comfast,cf-e313ac)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(mtd_get_mac_binary art 0x6)
|
ath79: add support for COMFAST CF-E313AC
This patch adds support for the COMFAST CF-E313AC, an outdoor wireless
CPE with two Ethernet ports and a 802.11ac radio.
Specifications:
- QCA9531 SoC
- 650/400/216 MHz (CPU/DDR/AHB)
- 1x 10/100 Mbps WAN Ethernet, 48V PoE-in
- 1x 10/100 Mbps LAN Ethernet, pass-through 48V PoE-out
- 1x manual pass-through PoE switch
- 64 MB RAM (DDR2)
- 16 MB FLASH
- QCA9886 2T2R 5 GHz 802.11ac, 23 dBm
- 12 dBi built-in antenna
- POWER/LAN/WAN/WLAN green LEDs
- 4x RSSI LEDs (2x red, 2x green)
- UART (115200 8N1)
Flashing instructions:
The original firmware is based on OpenWrt so a sysupgrade image can be
installed via the stock web GUI. Settings from the original firmware
will be saved and restored on the new one, so a factory reset will be
needed. To do so, once the new firmware is flashed, enter into failsafe
mode by pressing the reset button several times during the boot
process, while the WAN LED flashes, until it starts flashing faster.
Once in failsafe mode, perform a factory reset as usual.
Alternatively, the U-boot bootloader contains a recovery HTTP server
to upload the firmware. Push the reset button while powering the
device on and keep it pressed for >10 seconds. The device's LEDs will
blink several times and the recovery page will be at
http://192.168.1.1; use it to upload the sysupgrade image.
Note:
Four MAC addresses are stored in the "art" partition (read-only):
- 0x0000: 40:A5:EF:AA:AA:A0
- 0x0006: 40:A5:EF:AA:AA:A2
- 0x1002: 40:A5:EF:AA:AA:A1
- 0x5006: 40:A5:EF:AA.AA:A3 (inside the 5 GHz calibration data)
The stock firmware assigns MAC addresses to physical and virtual
interfaces in a very particular way:
- eth0 corresponds to the physical Ethernet port labeled as WAN
- eth1 corresponds to the physical Ethernet port labeled as LAN
- eth0 belongs to the bridge interface br-wan
- eth1 belongs to the bridge interface br-lan
- eth0 is assigned the MAC from 0x0 (*:A0)
- eth1 is assigned the MAC from 0x1002 (*:A1)
- br-wan is forced to use the MAC from 0x1002 (*:A1)
- br-lan is forced to use the MAC from 0x0 (*:A0)
- radio0 uses the calibration data from 0x5000 (which contains
a valid MAC address, *:A3). However, it is overwritten by the
one at 0x6 (*:A2)
This commit preserves the LAN/WAN roles of the physical Ethernet
ports (as labeled on the router) and the MAC addresses they expose
by default (i.e., *:A0 on LAN, *:A1 on WAN), but swaps the position
of the eth0/eth1 compared to the stock firmware:
- eth0 corresponds to the physical Ethernet port labeled as LAN
- eth1 corresponds to the physical Ethernet port labeled as WAN
- eth0 belongs to the bridge interface br-lan
- eth1 is the interface at @wan
- eth0 is assigned the MAC from 0x0 (*:A0)
- eth1 is assigned the MAC from 0x1002 (*:A1)
- br-lan inherits the MAC from eth0 (*:A0)
- @wan inherits the MAC from eth1 (*:A1)
- radio0's MAC is overwritten to the one at 0x6
This way, eth0/eth1's positions differ from the stock firmware, but
the weird MAC ressignations in br-lan/br-wan are avoided while the
external behaviour of the router is maintained. Additionally, WAN
port is connected to the PHY gmac, allowing to monitor the link
status (e.g., to restart DHCP negotiation when plugging a cable).
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
2019-03-18 12:20:47 +00:00
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
rm /lib/firmware/ath10k/QCA9888/hw2.0/board-2.bin
|
|
|
|
|
;;
|
ath79: add support for Comfast CF-EW72
Specifications:
Qualcomm/Atheros QCA9531 + QCA9886
2x 10/100 Mbps Ethernet, with 48v PoE
2T2R 2.4 GHz, 802.11b/g/n
2T2R 5 GHz, 802.11a/n/ac
128MB RAM
16MB SPI Flash
4x LED (Always On Power, LAN, WAN, WLAN)
Flashing Instructions:
Original firmware is based on OpenWRT, so flashing the sysupgrade image on
the factory firmware is sufficient.
Tested: Reset button, WAN LED, LAN LED, Power LED (always on, not much
to test), WLAN LED (one LED only for 2 interfaces, by default it gets
assigned to the first interface), MAC addresses (match factory firmware).
My LAN factory MAC address ends in F2.
use stock_mac art_loc
lan :f2 0x0
wan :f3 0x1002
5g :f4 0x6
2g :f5 0x5006
Since MAC address flash locations do not really match their use in vendor
firmware (e.g. address from 5 GHz calibration data is assigned to 2.4 GHz
WiFi), just calculate the MAC addresses with an offset based on 0x0 address.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
[add MAC address comment]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-03-11 21:00:42 +00:00
|
|
|
comfast,cf-e560ac|\
|
ath79: add support for Comfast CF-WR752AC v1
Specifications:
- Qualcomm QCA9531 + QCA9886
- dual band, antenna 2*3dBi
- Output power 50mW (17dBm)
- 1x 10/100 Mbps LAN RJ45
- 128 MB RAM / 16 MB FLASH (w25q128)
- 3 LEDs (red/green/blue)
incorporated in
"color wheel reset switch"
- UART 115200 8N1
Flashing instructions:
The U-boot bootloader contains a recovery HTTP server
to upload the firmware. Push the reset button while powering the
device on and keep it pressed for ~10 seconds. The device's LEDs will
blink several times and the recovery page will be at
http://192.168.1.1; use it to upload the sysupgrade image.
Alternatively, the original firmware is based on OpenWrt so a
sysupgrade image can be installed via the stock web GUI. Settings from
the original firmware will be saved and restored on the new one, so a
factory reset will be needed. To do so, once the new firmware is flashed,
enter into failsafe mode by pressing the reset button several times during
the boot process, until it starts flashing. Once in failsafe mode, perform
a factory reset as usual.
LED-Info:
The LEDs on the Comfast stock fw have a very proprietary behaviour,
corresponding to the user selected working mode (AP, ROUTER or REPEATER).
In the first two cases, only blue is used for status and LAN signaling. When
using the latter, blue is always off (except for sysupgrade), either red
signals bad rssi on master-link, or green good. Since the default working
mode of OpenWrt resembles that of a router/AP, the default behavior is
implemented accordingly.
MAC addresses (art partition):
location address (example) use in vendor firmware
0x0 xx:xx:xx:xx:xc:f8 -> eth0
0x6 xx:xx:xx:xx:xc:fa -> wlan5g (+2)
0x1002 xx:xx:xx:xx:xc:f9 -> not used
0x5006 xx:xx:xx:xx:xc:fb -> not used
--- xx:xx:xx:xx:xd:02 -> wlan2g (+10)
The same strange situation has already been observed and documented
for COMFAST CF-E560AC.
Signed-off-by: Roman Hampel <rhamp@arcor.de>
Co-developed-by: Joao Albuquerque <joaohccalbu@gmail.com>
Signed-off-by: Joao Albuquerque <joaohccalbu@gmail.com>
[adjust and extend commit message, rebase, minor DTS adjustments,
add correct MAC address for wmac, change RSSI LED names and behavior]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-03-20 16:32:30 +00:00
|
|
|
comfast,cf-ew72|\
|
|
|
|
|
comfast,cf-wr752ac-v1)
|
ath79: add support for COMFAST CF-E560AC
This commit adds support for the COMFAST CF-E560AC, an ap143 based
in-wall access point.
Specifications:
- SoC: Qualcomm Atheros QCA9531
- RAM: 128 MB DDR2 (Winbond W971GG6SB-25)
- Storage: 16 MB NOR (Winbond 25Q128JVSO)
- WAN: 1x 10/100 PoE ethernet (48v)
- LAN: 4x 10/100 ethernet
- WLAN1: QCA9531 - 802.11b/g/n - 2x SKY85303-21 FEM
- WLAN2: QCA9886 - 802.11ac/n/a - 2x SKY85735-11 FEM
- USB: one external USB2.0 port
- UART: 3.3v, 2.54mm headers already populated on board
- LED: 7x external
- Button: 1x external
- Boot: U-Boot 1.1.4 (pepe2k/u-boot_mod)
MAC addressing:
- stock
LAN *:40 (label)
WAN *:41
5G *:42
2.4G *:4a
- flash (art partition)
0x0 *:40 (label)
0x6 *:42
0x1002 *:41
0x5006 *:43
This device contains valid MAC addresses in art 0x0, 0x6, 0x1002 and
0x5006, however the vendor firmware only reads from art:0x0 for the LAN
interface and then increments in 02_network. They also jump 8 addresses
for the second wifi interface (2.4 GHz). This behavior has been duplicated
in the DTS and ath10k hotplug to align addresses with the vendor firmware
v2.6.0.
Recovery instructions:
This device contains built-in u-boot tftp recovery.
1. Configure PC with static IP 192.168.1.10/24 and tftp server.
2. Place desired image at /firmware_auto.bin at tftp root.
3. Connect device to PC, and power on.
4. Device will fetch flash from tftp, flash and reboot into new image.
Signed-off-by: August Huber <auh@google.com>
[move jtag_disable_pins, remove unnecessary statuses in DTS, remove
duplicate entry in 11-ath10k-caldata, remove hub_port0 label in DTS]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-01-26 16:55:11 +00:00
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
|
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x0) +2)
|
|
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
rm /lib/firmware/ath10k/QCA9888/hw2.0/board-2.bin
|
|
|
|
|
;;
|
2019-07-25 14:44:11 +00:00
|
|
|
dlink,dir-842-c1|\
|
2019-07-20 07:37:12 +00:00
|
|
|
dlink,dir-842-c2|\
|
2019-08-09 12:19:51 +00:00
|
|
|
dlink,dir-842-c3|\
|
2019-03-16 04:27:32 +00:00
|
|
|
nec,wg1200cr)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(mtd_get_mac_ascii devdata wlan5mac)
|
2019-03-16 04:27:32 +00:00
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
;;
|
ath79: add support for Netgear EX6400 and EX7300
This is sold as a dual-band 802.11ac range extender. It has a sliding
switch for Extender mode or Access Point mode, a WPS button, a recessed
Reset button, a hard-power button, and a multitude of LED's, some
multiplexed via an NXP 74AHC164D chip. The internal serial header pinout is
Vcc, Tx, Rx, GND, with GND closest to the corner of the board. You may
connect at 115200 bps, 8 data bits, no parity, 1 stop bit.
Specification:
- System-On-Chip: QCA9558
- CPU/Speed: 720 MHz
- Flash-Chip: Winbond 25Q128FVSG
- Flash size: 16 MiB
- RAM: 128 MiB
- Wireless No1: QCA9558 on-chip 2.4GHz 802.11bgn, 3x3
- Wireless No2: QCA99x0 chip 5GHz 802.11an+ac, 4x4
- PHY: Atheros AR8035-A
Installation:
If you can get to the stock firmware's firmware upgrade option, just feed
it the factory.img and boot as usual. As an alternative, TFTP the
factory.img to the bootloader.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[whitespace fix in DTS and reorder of make variables]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2018-09-14 04:08:51 +00:00
|
|
|
netgear,ex6400|\
|
|
|
|
|
netgear,ex7300)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "caldata" 0x5000 0x2f20
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(mtd_get_mac_binary caldata 0xc)
|
ath79: add support for Netgear EX6400 and EX7300
This is sold as a dual-band 802.11ac range extender. It has a sliding
switch for Extender mode or Access Point mode, a WPS button, a recessed
Reset button, a hard-power button, and a multitude of LED's, some
multiplexed via an NXP 74AHC164D chip. The internal serial header pinout is
Vcc, Tx, Rx, GND, with GND closest to the corner of the board. You may
connect at 115200 bps, 8 data bits, no parity, 1 stop bit.
Specification:
- System-On-Chip: QCA9558
- CPU/Speed: 720 MHz
- Flash-Chip: Winbond 25Q128FVSG
- Flash size: 16 MiB
- RAM: 128 MiB
- Wireless No1: QCA9558 on-chip 2.4GHz 802.11bgn, 3x3
- Wireless No2: QCA99x0 chip 5GHz 802.11an+ac, 4x4
- PHY: Atheros AR8035-A
Installation:
If you can get to the stock firmware's firmware upgrade option, just feed
it the factory.img and boot as usual. As an alternative, TFTP the
factory.img to the bootloader.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[whitespace fix in DTS and reorder of make variables]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2018-09-14 04:08:51 +00:00
|
|
|
;;
|
2018-06-13 13:14:49 +00:00
|
|
|
phicomm,k2t)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
2019-10-14 12:02:40 +00:00
|
|
|
ath10k_patch_mac $(k2t_get_mac "5g_mac")
|
2018-06-13 13:14:49 +00:00
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
;;
|
ath79: add support for Archer C58/C59 v1
This commit adds support for the Archer C58 v1 and C59 v1, previously
supported in the ar71xx target.
CPU: Qualcomm QCA9561
RAM: 64M (C58) / 128M (C59)
FLASH: 8M (C58) / 16M (C59)
WiFi: QCA9561 bgn 3x3:3
QCA9888 nac 2x2:2
LED: Power, WiFi 2.4, WiFi 5, WAN green, WAN amber, LAN, WPS
Only C59: USB
BTN: WPS, WiFi, Reset
Installation
------------
Via Web-UI:
Update factory image via Web-UI.
Via TFTP:
Rename factory image to "tp_recovery.bin" and place it in the root-dir
of your tftp server. Configure to listen on 192.168.0.66. Power up the
router while holding down the reset-button. The router will flash itself
and reboot.
Note: For TFTP, you might need a switch between router and computer, as
link establishment might take to long.
Signed-off-by: David Bauer <mail@david-bauer.net>
2018-10-31 19:19:49 +00:00
|
|
|
tplink,archer-c58-v1|\
|
2018-12-28 08:24:01 +00:00
|
|
|
tplink,archer-c59-v1|\
|
2019-09-16 16:45:02 +00:00
|
|
|
tplink,archer-c59-v2|\
|
2019-05-05 16:36:43 +00:00
|
|
|
tplink,archer-c60-v1|\
|
2019-05-05 16:46:09 +00:00
|
|
|
tplink,archer-c60-v2|\
|
ath79: add support for TP-Link Archer C60 v3
TP-Link Archer C60 v3 is a dual-band AC1350 router,
based on Qualcomm/Atheros QCA9561 + QCA9886.
It seems to be identical to the v2 revision, except that
it lacks a WPS LED and has different GPIO for amber WAN LED.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- 6x LED, 2x button
- UART header on PCB
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed IP address 192.168.0.66
2. Download *-factory.bin image and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root
directory
4. Turn off the router
5. Press and hold reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time the firmware should
be transferred from the tftp server
8. Wait ~30 second to complete recovery
While TFTP works for OpenWrt images, my device didn't accept the
only available official firmware "Archer C60(EU)_V3.0_190115.bin".
In contrast to earlier revisions (v2), the v3 contains the (same)
MAC address twice, once in 0x1fa08 and again in 0x1fb08.
While the partition-table on the device refers to the latter, the
firmware image contains a different partition-table for that region:
name device firmware
factory-boot 0x00000-0x1fb00 0x00000-0x1fa00
default-mac 0x1fb00-0x1fd00 0x1fa00-0x1fc00
pin 0x1fd00-0x1fe00 0x1fc00-0x1fd00
product-info 0x1fe00-0x1ff00 0x1fd00-0x1ff00
device-id 0x1ff00-0x20000 0x1ff00-0x20000
While the MAC address is present twice, other data like the PIN isn't,
so with the partitioning from the firmware image the PIN on the device
would actually be outside of its partition.
Consequently, the patch uses the MAC location from the device (which
is the same as for the v2).
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-02-12 13:43:15 +00:00
|
|
|
tplink,archer-c60-v3|\
|
ath79: add support for TP-Link Archer C6 v2 (US) and A6 (US/TW)
This patch is based on #1689 and adds support for TP-Link Archer
C6 v2 (US) and A6 (US/TW).
The hardware is the same as EU and RU variant, except for GPIOs
(LEDS/Buttons), flash(chip/partitions) and UART being available
on the board.
- SOC: Qualcomm QCA9563 @ 775MHz
- Flash: GigaDevice GD25Q127CS1G (16MiB)
- RAM: Zentel A3R1GE40JBF (128 MiB DDR2)
- Ethernet: Qualcomm QCA8337N: 4x 1Gbps LAN + 1x 1Gbps WAN
- Wireless:
- 2.4GHz (bgn) QCA9563 integrated (3x3)
- 5GHz (ac) Qualcomm QCA9886 (2x2)
- Button: 1x power, 1x reset, 1x wps
- LED: 6x LEDs: power, wlan2g, wlan5g, lan, wan, wps
- UART: 115200, 8n1 (header available on board)
Known issues:
- Wireless: 5GHz is known to have lower RSSI signal, it affects speed and range.
Flash instructions:
Upload openwrt-ath79-generic-tplink_archer-c6-v2-us-squashfs-factory.bin
via the router Web interface.
Flash instruction using tftp recovery:
1. Connect the computer to one of the LAN ports of the router
2. Set the computer IP to 192.168.0.66
3. Start a tftp server with the OpenWrt factory image in the
tftp root directory renamed to ArcherA6v2_tp_recovery.bin.
4. Connect power cable to router, press and hold the
reset button and turn the router on
5. Keep the reset button pressed until the WPS LED lights up
6. Wait ~150 seconds to complete flashing
Flash partitioning: I've followed #1689 for defining the partition layout
for this patch. The partition named as "tplink" @ 0xfd0000 is marked
as read only as it is where some config for stock firmware are stored.
On stock firmware those stock partitions starts at 0xfd9400 however
I had not been able to make it functional starting on the same address as
on stock fw, so it has been partitioned following #1689 and not the stock
partition layout for this specific partition. Due to that firmware/rootfs
partition lenght is 0xf80000 and not 0xf89400 as stock.
According to the GPL code, the EU/RU/JP variant does have different GPIO pins
assignment to LEDs and buttons, also the flash memory layout is different.
GPL Source Code: https://static.tp-link.com/resources/gpl/gpl-A6v2_us.tar.gz
Signed-off-by: Anderson Vulczak <andi@andi.com.br>
[wrap commit message, remove soft_ver change for C6 v2 EU, move LED aliases
to DTS files, remove dts-v1 in DTSI, node/property reorder in DTSI]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-10-05 13:44:55 +00:00
|
|
|
tplink,archer-c6-v2|\
|
2020-04-17 22:19:51 +00:00
|
|
|
tplink,archer-c6-v2-us)
|
|
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
|
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary mac 0x8) -1)
|
|
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
;;
|
ath79: add support for TP-Link TL-WPA8630P v2
The TL-WPA8630P v2 is a HomePlug AV2 compatible device with a QCA9563 SoC
and 2.4GHz and 5GHz WiFi modules.
Specifications
--------------
- QCA9563 750MHz, 2.4GHz WiFi
- QCA9888 5GHz WiFi
- 8MiB SPI Flash
- 128MiB RAM
- 3 GBit Ports (QCA8337)
- PLC (QCA7550)
MAC address assignment
----------------------
WiFi 2.4GHz and LAN share the same MAC address as printed on the label.
5GHz WiFi uses LAN-1, based on assumptions from similar devices.
LAN Port assignment
-------------------
While there are 3 physical LAN ports on the device, there will be 4
visible ports in OpenWrt. The fourth port (internal port 5) is used
by the PowerLine Communication SoC and thus treated like a regular
LAN port.
Versions
--------
Note that both TL-WPA8630 and TL-WPA8630P, as well as the different
country-versions, differ in partitioning, and therefore shouldn't be
cross-flashed.
This adds support for the two known partitioning variants of the
TL-WPA8630P, where the variants can be safely distinguished via the
tplink-safeloader SupportList. For the non-P variants (TL-WPA8630),
at least two additional partitioning schemes exist, and the same
SupportList entry can have different partitioning.
Thus, we don't support those officially (yet).
Also note that the P version for Germany (DE) requires the international
image version, but is properly protected by SupportList.
In any case, please check the OpenWrt Wiki pages for the device
before flashing anything!
Installation
------------
Installation is possible from the OEM web interface. Make sure to
install the latest OEM firmware first, so that the PLC firmware is
at the latest version. However, please also check the Wiki page
for hints according to altered partitioning between OEM firmware
revisions.
Additional thanks to Jon Davies and Joe Mullally for bringing
order into the partitioning mess.
Signed-off-by: Andreas Böhler <dev@aboehler.at>
[minor DTS adjustments, add label-mac-device, drop chosen, move
common partitions to DTSI, rename de to int, add AU support strings,
adjust TPLINK_BOARD_ID, create common node in generic-tp-link.mk,
adjust commit message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-03-14 23:20:22 +00:00
|
|
|
tplink,tl-wpa8630p-v2-eu|\
|
|
|
|
|
tplink,tl-wpa8630p-v2-int)
|
2019-09-22 09:57:13 +00:00
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
2020-04-17 22:19:51 +00:00
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary mac 0x8) +1)
|
ath79: add support for Archer C58/C59 v1
This commit adds support for the Archer C58 v1 and C59 v1, previously
supported in the ar71xx target.
CPU: Qualcomm QCA9561
RAM: 64M (C58) / 128M (C59)
FLASH: 8M (C58) / 16M (C59)
WiFi: QCA9561 bgn 3x3:3
QCA9888 nac 2x2:2
LED: Power, WiFi 2.4, WiFi 5, WAN green, WAN amber, LAN, WPS
Only C59: USB
BTN: WPS, WiFi, Reset
Installation
------------
Via Web-UI:
Update factory image via Web-UI.
Via TFTP:
Rename factory image to "tp_recovery.bin" and place it in the root-dir
of your tftp server. Configure to listen on 192.168.0.66. Power up the
router while holding down the reset-button. The router will flash itself
and reboot.
Note: For TFTP, you might need a switch between router and computer, as
link establishment might take to long.
Signed-off-by: David Bauer <mail@david-bauer.net>
2018-10-31 19:19:49 +00:00
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
;;
|
ath79: add support for TP-Link EAP245-v3
TP-Link EAP245 v3 is an AC1750 (802.11ac Wave-2) ceiling mount access
point. UART access (for debricking) requires non-trivial soldering.
Specifications:
* SoC: QCA9563 (CPU/DDR/AHB @ 775/650/258 MHz)
* RAM: 128MiB
* Flash: 16MiB SPI-NOR
* Wireless 2.4GHz (SoC): b/g/n 3x3
* Wireless 5GHz (QCA9982): a/n/ac 3x3 with MU-MIMO
* Ethernet (QCA8337N switch): 2× 1GbE, ETH1 (802.3at PoE) and ETH2
* Green and amber status LEDs
* Reset switch (GPIO, available for failsafe)
Flashing instructions:
All recent firmware versions (latest is 2.20.0), can disable firmware
signature verification and use a padded firmware file to flash OpenWrt:
* ssh into target device and run `cliclientd stopcs`
* upload factory image via web interface
The stopcs-method is supported from firmware version 2.3.0. Earlier
versions need to be upgraded to a newer stock version before flashing
OpenWrt.
Factory images for these devices are RSA signed by TP-Link. While the
signature verification can be disabled, the factory image still needs to
have a (fake) 1024 bit signature added to pass file checks.
Debricking instructions:
You can recover using u-boot via the serial port:
* Serial port is available from J3 (1:TX, 2:RX, 3:GND, 4:3.3V)
* Bridge R237 to connect RX, located next to J3
* Bridge R225 to connect TX, located inside can on back-side of board
* Serial port is 115200 baud, 8n1, interrupt u-boot by holding ctrl+B
* Upload initramfs with tftp and upgrade via OpenWrt
Device mac addresses:
Stock firmware has the same mac address for 2.4GHz wireless and
ethernet, 5GHz is incremented by one. The base mac address is stored in
the 'default-mac' partition (offset 0x90000) at an offset of 8 bytes.
ART blobs contain no mac addresses.
From OEM ifconfig:
ath0 Link encap:Ethernet HWaddr 74:..:E2
ath10 Link encap:Ethernet HWaddr 74:..:E3
br0 Link encap:Ethernet HWaddr 74:..:E2
eth0 Link encap:Ethernet HWaddr 74:..:E2
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2020-06-04 18:59:13 +00:00
|
|
|
tplink,eap245-v3)
|
|
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
|
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary info 0x8) +1)
|
|
|
|
|
;;
|
ath79: add support for YunCore XD4200 and A782
YunCore XD4200 ('XD4200_W6.0' marking on PCB) is Qualcomm/Atheros based
(QCA9563, QCA9886, QCA8334) dual-band, Wave-2 AC1200 ceiling AP with PoE
(802.3at) support. A782 model ('T750_V5.1' marking on PCB) is a smaller
version of the XD4200, with similar specification but lower TX power.
Specification:
- QCA9563 (775 MHz)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 2x 10/100/1000 Mbps Ethernet (QCA8334), with 802.3at PoE support (WAN)
- Wi-Fi 2.4 GHz:
- XD4200: 2T2R (QCA9563), with ext. PA (SKY65174-21) and LNA
- A782: 2T2R (QCA9563), with ext. FEM (SKY85329-11)
- Wi-Fi 5 GHz:
- XD4200: 2T2R (QCA9886), with ext. FEM (SKY85728-11)
- A782: 2T2R (QCA9886), with ext. FEM (SKY85735-11)
- LEDs:
- XD4200: 5x (2x driven by SOC, 1x driven by AC radio, 2x Ethernet)
- A782: 3x (1x RGB, driven by SOC and radio, 2x Ethernet)
- 1x button (reset)
- 1x UART (4-pin, 2.54 mm pitch) header on PCB
- 1x DC jack (12 V)
Flash instructions:
If your device comes with generic QSDK based firmware, you can login
over telnet (login: root, empty password, default IP: 192.168.188.253),
issue first (important!) 'fw_setenv' command and then perform regular
upgrade, using 'sysupgrade -n -F ...' (you can use 'wget' to download
image to the device, SSH server is not available):
fw_setenv bootcmd "bootm 0x9f050000 || bootm 0x9fe80000"
sysupgrade -n -F openwrt-...-yuncore_...-squashfs-sysupgrade.bin
In case your device runs firmware with YunCore custom GUI, you can use
U-Boot recovery mode:
1. Set a static IP 192.168.0.141/24 on PC and start TFTP server with
'tftp' image renamed to 'upgrade.bin'
2. Power the device with reset button pressed and release it after 5-7
seconds, recovery mode should start downloading image from server
(unfortunately, there is no visible indication that recovery got
enabled - in case of problems check TFTP server logs)
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
2019-11-12 21:36:28 +00:00
|
|
|
yuncore,a782|\
|
|
|
|
|
yuncore,xd4200)
|
|
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
|
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
;;
|
2018-06-13 13:14:49 +00:00
|
|
|
esac
|
|
|
|
|
;;
|
2018-05-06 08:20:11 +00:00
|
|
|
*)
|
|
|
|
|
exit 1
|
|
|
|
|
;;
|
|
|
|
|
esac
|
